[][Remove mt7981 snand clock default on]
[Description]
Remove mt7981 snand clock default on for clock integration
[Release-Log]
N/A
Change-Id: I75057f932124625fb91894789c21086504ebf9f3
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/5348157
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
index 96cee87..653c4b2 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
@@ -45,8 +45,8 @@
<&infracfg CK_INFRA_MUX_UART0>,
<&infracfg CK_INFRA_MUX_UART1>,
<&infracfg CK_INFRA_MUX_UART2>,
- <&infracfg CK_INFRA_NFI_CK>,
- <&infracfg CK_INFRA_SPINFI_CK>,
+ <&clk40m>,
+ <&clk40m>,
<&infracfg CK_INFRA_MUX_SPI0>,
<&infracfg CK_INFRA_MUX_SPI1>,
<&infracfg CK_INFRA_RTC_32K>,
@@ -91,9 +91,9 @@
<&infracfg_ao CK_INFRA_UART2_CK>,
<&infracfg_ao CK_INFRA_SPI2_CK>,
<&infracfg_ao CK_INFRA_SPI2_HCK_CK>,
- <&infracfg_ao CK_INFRA_NFI1_CK>,
- <&infracfg_ao CK_INFRA_SPINFI1_CK>,
- <&infracfg_ao CK_INFRA_NFI_HCK_CK>,
+ <&clk40m>,
+ <&clk40m>,
+ <&clk40m>,
<&infracfg_ao CK_INFRA_SPI0_CK>,
<&infracfg_ao CK_INFRA_SPI1_CK>,
<&infracfg_ao CK_INFRA_SPI0_HCK_CK>,
@@ -139,12 +139,12 @@
<&clk40m>,
<&topckgen CK_TOP_CB_RTC_32K>,
<&topckgen CK_TOP_CB_RTC_32P7K>,
- <&topckgen CK_TOP_NFI1X>,
+ <&clk40m>,
<&topckgen CK_TOP_USB_EQ_RX250M>,
<&topckgen CK_TOP_USB_TX250M>,
<&topckgen CK_TOP_USB_LN0_CK>,
<&topckgen CK_TOP_USB_CDR_CK>,
- <&topckgen CK_TOP_SPINFI_BCK>,
+ <&clk40m>,
<&topckgen CK_TOP_I2C_BCK>,
<&topckgen CK_TOP_PEXTP_TL>,
<&topckgen CK_TOP_EMMC_208M>,
@@ -162,8 +162,8 @@
<&topckgen CK_TOP_U2U3_SYS>,
<&topckgen CK_TOP_U2U3_XHCI>,
<&topckgen CK_TOP_AP2CNN_HOST>,
- <&topckgen CK_TOP_NFI1X_SEL>,
- <&topckgen CK_TOP_SPINFI_SEL>,
+ <&clk40m>,
+ <&clk40m>,
<&topckgen CK_TOP_UART_SEL>,
<&topckgen CK_TOP_PWM_SEL>,
<&topckgen CK_TOP_I2C_SEL>,