diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
index 7584f92..205395c 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
@@ -25,7 +25,7 @@
 			<&apmixedsys  CK_APMIXED_MPLL>,
 			<&apmixedsys  CK_APMIXED_APLL2>,
 			<&infracfg CK_INFRA_CK_F26M>,
-			<&infracfg CK_INFRA_UART>,
+			<&clk40m>,
 			<&infracfg CK_INFRA_ISPI0>,
 			<&infracfg CK_INFRA_I2C>,
 			<&infracfg CK_INFRA_ISPI1>,
@@ -42,11 +42,11 @@
 			<&infracfg CK_INFRA_FAUD_AUD_CK>,
 			<&infracfg CK_INFRA_FAUD_EG2_CK>,
 			<&infracfg CK_INFRA_I2CS_CK>,
-			<&infracfg CK_INFRA_MUX_UART0>,
-			<&infracfg CK_INFRA_MUX_UART1>,
-			<&infracfg CK_INFRA_MUX_UART2>,
+			<&clk40m>,
+			<&clk40m>,
 			<&clk40m>,
 			<&clk40m>,
+			<&clk40m>,
 			<&infracfg CK_INFRA_MUX_SPI0>,
 			<&infracfg CK_INFRA_MUX_SPI1>,
 			<&infracfg CK_INFRA_RTC_32K>,
@@ -59,15 +59,15 @@
 			<&infracfg CK_INFRA_USB_XHCI_CK>,
 			<&clk40m>,
 			<&infracfg CK_INFRA_F26M_CK0>,
-			<&infracfg_ao CK_INFRA_UART0_SEL>,
-			<&infracfg_ao CK_INFRA_UART1_SEL>,	
-			<&infracfg_ao CK_INFRA_UART2_SEL>,
+			<&clk40m>,
 			<&clk40m>,
 			<&clk40m>,
 			<&clk40m>,
 			<&clk40m>,
 			<&clk40m>,
 			<&clk40m>,
+			<&clk40m>,
+			<&clk40m>,
 			<&infracfg_ao CK_INFRA_GPT_STA>,
 			<&clk40m>,
 			<&clk40m>,
@@ -86,9 +86,7 @@
 			<&infracfg_ao CK_INFRA_SEJ_13M_CK>,
 			<&infracfg_ao CK_INFRA_THERM_CK>,
 			<&infracfg_ao CK_INFRA_I2CO_CK>,
-			<&infracfg_ao CK_INFRA_UART0_CK>,
-			<&infracfg_ao CK_INFRA_UART1_CK>,
-			<&infracfg_ao CK_INFRA_UART2_CK>,
+			<&clk40m>,
 			<&clk40m>,
 			<&clk40m>,
 			<&clk40m>,
@@ -98,6 +96,8 @@
 			<&clk40m>,
 			<&clk40m>,
 			<&clk40m>,
+			<&clk40m>,
+			<&clk40m>,
 			<&infracfg_ao CK_INFRA_FRTC_CK>,
 			<&infracfg_ao CK_INFRA_MSDC_CK>,
 			<&infracfg_ao CK_INFRA_MSDC_HCK_CK>,
@@ -164,7 +164,7 @@
 			<&topckgen CK_TOP_AP2CNN_HOST>,
 			<&clk40m>,
 			<&clk40m>,
-			<&topckgen CK_TOP_UART_SEL>,
+			<&clk40m>,
 			<&clk40m>,
 			<&topckgen CK_TOP_I2C_SEL>,
 			<&clk40m>,
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
index 0f50a15..0f5c805 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
@@ -182,12 +182,6 @@
 		#clock-cells = <0>;
 	};
 
-	uart_clk: dummy_uart_clk {
-		compatible = "fixed-clock";
-		clock-frequency = <40000000>;
-		#clock-cells = <0>;
-	};
-
 	gpt_clk: dummy_gpt_clk {
 		compatible = "fixed-clock";
 		clock-frequency = <20000000>;
@@ -225,29 +219,38 @@
 	};
 
 	uart0: serial@11002000 {
-		compatible = "mediatek,mt7986-uart",
-			     "mediatek,mt6577-uart";
+		compatible = "mediatek,mt6577-uart";
 		reg = <0 0x11002000 0 0x400>;
 		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&uart_clk>;
+		clocks = <&infracfg_ao CK_INFRA_UART0_CK>;
+		assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
+				  <&infracfg_ao CK_INFRA_UART0_SEL>;
+		assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+					 <&infracfg CK_INFRA_UART>;
 		status = "disabled";
 	};
 
 	uart1: serial@11003000 {
-		compatible = "mediatek,mt7986-uart",
-			     "mediatek,mt6577-uart";
+		compatible = "mediatek,mt6577-uart";
 		reg = <0 0x11003000 0 0x400>;
 		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&uart_clk>;
+		clocks = <&infracfg_ao CK_INFRA_UART1_CK>;
+		assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
+				  <&infracfg_ao CK_INFRA_UART1_SEL>;
+		assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+					 <&infracfg CK_INFRA_UART>;
 		status = "disabled";
 	};
 
 	uart2: serial@11004000 {
-		compatible = "mediatek,mt7986-uart",
-			     "mediatek,mt6577-uart";
+		compatible = "mediatek,mt6577-uart";
 		reg = <0 0x11004000 0 0x400>;
 		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&uart_clk>;
+		clocks = <&infracfg_ao CK_INFRA_UART2_CK>;
+		assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
+				  <&infracfg_ao CK_INFRA_UART2_SEL>;
+		assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+					 <&infracfg CK_INFRA_UART>;
 		status = "disabled";
 	};