[][kernel][mt7981/mt7988][eth][phy: mediatek-ge: Change patches' sequence and get ready for upstream]
[Description]
Change patches' sequence and get ready for upstream. Also fix patches'
dependency.
[Release-log]
N/A
Change-Id: I0010b82d47deeef25fd305ed2cee863f0efed48a
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/7232830
diff --git a/target/linux/mediatek/patches-5.4/756-net-phy-mediatek-ge-add-mt798x-support.patch b/target/linux/mediatek/patches-5.4/756-net-phy-mediatek-ge-add-mt798x-support.patch
new file mode 100644
index 0000000..aee8abf
--- /dev/null
+++ b/target/linux/mediatek/patches-5.4/756-net-phy-mediatek-ge-add-mt798x-support.patch
@@ -0,0 +1,36 @@
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -582,6 +582,23 @@ config MEDIATEK_2P5GE_PHY
+ ---help---
+ Supports MediaTek internal 2.5Gb Ethernet PHYs.
+
++config MEDIATEK_GE_PHY
++ tristate "MediaTek Gigabit Ethernet PHYs"
++ help
++ Supports the MediaTek Gigabit Ethernet PHYs.
++
+++config MEDIATEK_GE_PHY_SOC
++ bool "MediaTek SoC Ethernet PHYs"
++ depends on (ARM64 && ARCH_MEDIATEK && MEDIATEK_GE_PHY) || COMPILE_TEST
++ select NVMEM_MTK_EFUSE
++ help
++ Supports MediaTek SoC built-in Gigabit Ethernet PHYs.
++
++ Include support for built-in Ethernet PHYs which are present in
++ the MT7981 and MT7988 SoCs. These PHYs need calibration data
++ present in the SoCs efuse and will dynamically calibrate VCM
++ (common-mode voltage) during startup.
++
+ config MICREL_PHY
+ tristate "Micrel PHYs"
+ ---help---
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -100,6 +100,7 @@ obj-$(CONFIG_MARVELL_PHY) += marvell.o
+ obj-$(CONFIG_MARVELL_10G_PHY) += marvell10g.o
+ obj-$(CONFIG_MAXLINEAR_GPHY) += mxl-gpy.o
+ obj-$(CONFIG_MEDIATEK_2P5GE_PHY)+= mediatek-2p5ge.o
++obj-$(CONFIG_MEDIATEK_GE_PHY) += mediatek-ge.o
+ obj-$(CONFIG_MESON_GXL_PHY) += meson-gxl.o
+ obj-$(CONFIG_MICREL_KS8995MA) += spi_ks8995.o
+ obj-$(CONFIG_MICREL_PHY) += micrel.o