From b83743c16da6fa4da206df3e5a1a9c29485bb613 Mon Sep 17 00:00:00 2001
From: Bo Jiao <Bo.Jiao@mediatek.com>
Date: Wed, 22 Jun 2022 16:36:42 +0800
Subject: [PATCH 3/8] 9992-dts-mt7986-wed-changes

---
 arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 33 ++++++++---------------
 arch/arm64/boot/dts/mediatek/mt7986b.dtsi | 33 ++++++++---------------
 2 files changed, 22 insertions(+), 44 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index ba27b95f5..7f78de6b9 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -58,32 +58,20 @@
 		};
 	};
 
-	wed: wed@15010000 {
-		compatible = "mediatek,wed";
-		wed_num = <2>;
-		/* add this property for wed get the pci slot number. */
-		pci_slot_map = <0>, <1>;
-		reg = <0 0x15010000 0 0x1000>,
-		      <0 0x15011000 0 0x1000>;
+	wed0: wed@15010000 {
+		compatible = "mediatek,mt7986-wed",
+			     "syscon";
+		reg = <0 0x15010000 0 0x1000>;
 		interrupt-parent = <&gic>;
-		interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
-	wed2: wed2@15011000 {
-		compatible = "mediatek,wed2";
-		wed_num = <2>;
-		reg = <0 0x15010000 0 0x1000>,
-		      <0 0x15011000 0 0x1000>;
+	wed1: wed@15011000 {
+		compatible = "mediatek,mt7986-wed",
+			     "syscon";
+		reg = <0 0x15011000 0 0x1000>;
 		interrupt-parent = <&gic>;
-		interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
-	};
-
-	wdma: wdma@15104800 {
-		compatible = "mediatek,wed-wdma";
-		reg = <0 0x15104800 0 0x400>,
-		      <0 0x15104c00 0 0x400>;
+		interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
 	ap2woccif: ap2woccif@151A5000 {
@@ -490,6 +478,7 @@
 					 <&topckgen CK_TOP_CB_SGM_325M>;
                 mediatek,ethsys = <&ethsys>;
 		mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
+		mediatek,wed = <&wed0>, <&wed1>;
                 #reset-cells = <1>;
                 #address-cells = <1>;
                 #size-cells = <0>;
diff --git a/arch/arm64/boot/dts/mediatek/mt7986b.dtsi b/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
index 523d585cb..0e5f116a2 100644
--- a/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
@@ -58,32 +58,20 @@
 		};
 	};
 
-	wed: wed@15010000 {
-		compatible = "mediatek,wed";
-		wed_num = <2>;
-		/* add this property for wed get the pci slot number. */
-		pci_slot_map = <0>, <1>;
-		reg = <0 0x15010000 0 0x1000>,
-		      <0 0x15011000 0 0x1000>;
+	wed0: wed@15010000 {
+		compatible = "mediatek,mt7986-wed",
+			     "syscon";
+		reg = <0 0x15010000 0 0x1000>;
 		interrupt-parent = <&gic>;
-		interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
-	wed2: wed2@15011000 {
-		compatible = "mediatek,wed2";
-		wed_num = <2>;
-		reg = <0 0x15010000 0 0x1000>,
-		      <0 0x15011000 0 0x1000>;
+	wed1: wed@15011000 {
+		compatible = "mediatek,mt7986-wed",
+			     "syscon";
+		reg = <0 0x15011000 0 0x1000>;
 		interrupt-parent = <&gic>;
-		interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
-	};
-
-	wdma: wdma@15104800 {
-		compatible = "mediatek,wed-wdma";
-		reg = <0 0x15104800 0 0x400>,
-		      <0 0x15104c00 0 0x400>;
+		interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
 	ap2woccif: ap2woccif@151A5000 {
@@ -405,6 +393,7 @@
 					 <&topckgen CK_TOP_CB_SGM_325M>;
                 mediatek,ethsys = <&ethsys>;
 		mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
+		mediatek,wed = <&wed0>, <&wed1>;
                 #reset-cells = <1>;
                 #address-cells = <1>;
                 #size-cells = <0>;
-- 
2.18.0