tree b7f4396c1899c32ba9ea0671c2fc2c2c79f38e47
parent 77d03a70c896155ff97c514c3fd06aa65a681979
author developer <developer@mediatek.com> 1622728388 +0800
committer developer <developer@mediatek.com> 1623120946 +0800

[][Add clock and pinctrl setting and i2c pwm to mt7986 DT]

[Description]
Add more pinctrl pinmux list into DT
Modify DT according to releated clock driver
Add i2c and pwm in DT

Change since v1:
Add mt7986 compatiable string to i2c and pwm driver
Enable i2c in mt7986 kernel config
Fix pwm reg info in DT
Add memory node back to prevent hang when u-boot can't carry memery size info.

Change since v2:
fix pwm clock and it's  pinctrl node

Change since v3:
Add ethernet clock parent

Change since v4:
Fix ethernet clock parent

Change since v5:
Fix auxadc and ethernet (ethsys)

[Release-log]
Build Pass
Boot-up from spim-nand flash pass

Update since v1:
I2C test pass with i2cdetect command

Update since v2:
PWM test pass with blinking led

Update since V5:
Ethernet test pass with ping
auxadc test pass with cat sysfs

INFRACFG driver in pwm2_ck_sel, and pwm1_ck_sel have bug,
We got 32k instead of csw_pwm_ck, need clock owner to fix this.
--> Fix by change 4619106

Change-Id: Icac52cae356796fec6b9e3652747e14fed9cf4e0
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4610073