commit | 81bcad3eea19df0e23926f26dedc7e90938ae67a | [log] [tgz] |
---|---|---|
author | developer <developer@mediatek.com> | Thu Jul 15 14:14:38 2021 +0800 |
committer | developer <developer@mediatek.com> | Thu Jul 15 17:34:04 2021 +0800 |
tree | 884b51c570f7dabcc5fd9d3a31d7d508dd45a314 | |
parent | 15d0d28d0546567a88a27bde584fb3cee57c173c [diff] [blame] |
[][Update PSE Drop Configuration for P8/P9] [Description] Change PSE drop configuration to prevent packets from WDMA0/WDMA1 being dropped. (DE suggested) If without this setting, it might lead to WED hang in some corner cases. [Release-log] N/A Change-Id: Iec5b6842c6ec0e7b8621f56733bfd284fcba5183 Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4757465
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h index 8f152ab..49e605a 100755 --- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -111,6 +111,7 @@ /* PSE Free Queue Flow Control */ #define PSE_FQFC_CFG1 0x100 #define PSE_FQFC_CFG2 0x104 +#define PSE_DROP_CFG 0x108 /* PSE Input Queue Reservation Register*/ #define PSE_IQ_REV(x) (0x140 + ((x - 1) * 0x4))