[][modify some clk div setting]

[Description]
Change some clk div setting
Change gpt clk freerun

[Release-log]
N/A

Change-Id: Iec2d1ecb7ebd44e608064fde42527a974e36eda4
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4887260
diff --git a/target/linux/mediatek/files-5.4/drivers/clk/mediatek/clk-mt7986.c b/target/linux/mediatek/files-5.4/drivers/clk/mediatek/clk-mt7986.c
index 2d3f966..2238414 100644
--- a/target/linux/mediatek/files-5.4/drivers/clk/mediatek/clk-mt7986.c
+++ b/target/linux/mediatek/files-5.4/drivers/clk/mediatek/clk-mt7986.c
@@ -45,7 +45,7 @@
 	FACTOR(CK_INFRA_PWM_CK2, "infra_pwm_ck2", "infra_pwm2_sel", 1, 1),

 	FACTOR(CK_INFRA_133M_HCK, "infra_133m_hck", "sysaxi", 1, 1),

 	FACTOR(CK_INFRA_EIP_CK, "infra_eip", "eip_b", 1, 1),

-	FACTOR(CK_INFRA_66M_PHCK, "infra_66m_phck", "infra_133m_hck", 1, 1),

+	FACTOR(CK_INFRA_66M_PHCK, "infra_66m_phck", "infra_133m_hck", 1, 2),

 	FACTOR(CK_INFRA_FAUD_L_CK, "infra_faud_l", "aud_l", 1, 1),

 	FACTOR(CK_INFRA_FAUD_AUD_CK, "infra_faud_aud", "a1sys", 1, 1),

 	FACTOR(CK_INFRA_FAUD_EG2_CK, "infra_faud_eg2", "a_tuner", 1, 1),

@@ -77,12 +77,12 @@
 	FACTOR(CK_TOP_CB_M_D4, "cb_m_d4", "mpll", 1, 4),

 	FACTOR(CK_TOP_CB_M_D8, "cb_m_d8", "mpll", 1, 8),

 	FACTOR(CK_TOP_M_D8_D2, "m_d8_d2", "mpll", 1, 16),

-	FACTOR(CK_TOP_M_D3_D2, "m_d3_d2", "mpll", 1, 2),

+	FACTOR(CK_TOP_M_D3_D2, "m_d3_d2", "mpll", 1, 6),

 	FACTOR(CK_TOP_CB_MM_D2, "cb_mm_d2", "mmpll", 1, 2),

 	FACTOR(CK_TOP_CB_MM_D4, "cb_mm_d4", "mmpll", 1, 4),

 	FACTOR(CK_TOP_CB_MM_D8, "cb_mm_d8", "mmpll", 1, 8),

 	FACTOR(CK_TOP_MM_D8_D2, "mm_d8_d2", "mmpll", 1, 16),

-	FACTOR(CK_TOP_MM_D3_D8, "mm_d3_d8", "mmpll", 1, 8),

+	FACTOR(CK_TOP_MM_D3_D8, "mm_d3_d8", "mmpll", 1, 24),

 	FACTOR(CK_TOP_CB_U2_PHYD_CK, "cb_u2_phyd", "mmpll", 1, 30),

 	FACTOR(CK_TOP_CB_APLL2_196M, "cb_apll2_196m", "apll2", 1, 1),

 	FACTOR(CK_TOP_APLL2_D4, "apll2_d4", "apll2", 1, 4),

@@ -95,7 +95,7 @@
 	FACTOR(CK_TOP_CB_NET2_800M, "cb_net2_800m", "net2pll", 1, 1),

 	FACTOR(CK_TOP_CB_NET2_D4, "cb_net2_d4", "net2pll", 1, 4),

 	FACTOR(CK_TOP_NET2_D4_D2, "net2_d4_d2", "net2pll", 1, 8),

-	FACTOR(CK_TOP_NET2_D3_D2, "net2_d3_d2", "net2pll", 1, 2),

+	FACTOR(CK_TOP_NET2_D3_D2, "net2_d3_d2", "net2pll", 1, 6),

 	FACTOR(CK_TOP_CB_WEDMCU_760M, "cb_wedmcu_760m", "wedmcupll", 1, 1),

 	FACTOR(CK_TOP_WEDMCU_D5_D2, "wedmcu_d5_d2", "wedmcupll", 1, 10),

 	FACTOR(CK_TOP_CB_SGM_325M, "cb_sgm_325m", "sgmpll", 1, 1),

@@ -490,7 +490,6 @@
 

 static const struct mtk_gate infra_clks[] __initconst = {

 	/* INFRA0 */

-	GATE_INFRA0(CK_INFRA_GPT_STA, "infra_gpt_sta", "infra_66m_mck", 0),

 	GATE_INFRA0(CK_INFRA_PWM_HCK, "infra_pwm_hck", "infra_66m_mck", 1),

 	GATE_INFRA0(CK_INFRA_PWM_STA, "infra_pwm_sta", "infra_pwm_bck", 2),

 	GATE_INFRA0(CK_INFRA_PWM1_CK, "infra_pwm1", "infra_pwm_ck1", 3),