| commit | 7d3ad47fab80c901633430a7d32e96aaac3f1d54 | [log] [tgz] |
|---|---|---|
| author | developer <developer@mediatek.com> | Mon Sep 16 17:27:01 2024 +0800 |
| committer | developer <developer@mediatek.com> | Wed Sep 18 10:37:42 2024 +0800 |
| tree | 10678d631b953277c96f136ee2c971d615bc8f04 | |
| parent | 38d34c34398caa168cb6dff26e6cda1b64b30be3 [diff] |
[][kernel][mt7987][eth][net: phy: mediatek: mtk-2p5ge: Force phy to enter AN state at beginning] [Description] Fix and force built-in 2.5Gphy to enter AN state at beginning. Without this patch, built-in 2.5Gphy may hang at firmware loading. [Release-log] N/A Change-Id: I87668b2c8c134d1bef7e3ea15fbc310edace8652 Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/9641682
diff --git a/21.02/files/target/linux/mediatek/files-5.4/drivers/net/phy/mediatek/mtk-2p5ge.c b/21.02/files/target/linux/mediatek/files-5.4/drivers/net/phy/mediatek/mtk-2p5ge.c index 87a91e9..88696da 100644 --- a/21.02/files/target/linux/mediatek/files-5.4/drivers/net/phy/mediatek/mtk-2p5ge.c +++ b/21.02/files/target/linux/mediatek/files-5.4/drivers/net/phy/mediatek/mtk-2p5ge.c
@@ -197,6 +197,9 @@ goto release_fw; } + /* Force 2.5Gphy back to AN state */ + phy_set_bits(phydev, MII_BMCR, BMCR_RESET); + usleep_range(5000, 6000); phy_set_bits(phydev, MII_BMCR, BMCR_PDOWN); reg = readw(apb_base + SW_RESET);