[][Update Ethernet procfs-based debug register dump]

[Description]
Change Ethernet procfs-based debug register dump.

- Usage:
	- cat /proc/mtketh/dbg_regs
- What's new:
	- FE_INT_STA: Frame Engine Interrupt Status
	- PSE_IQ_STA5: PSE Input Queue Status part5
	- PSE_OQ_STA5: PSE Output Queue Status part5
	- PDMA_CRX_IDX: PDMA CPU pointer
	- PDMA_DRX_IDX: PDMA DMA pointer
	- QDMA_CTX_IDX: QDMA CPU pointer
	- QDMA_DTX_IDX: QDMA DMA pointer
	- MAC_P1_FSM: GMAC1 finite state machine
	- MAC_P2_FSM: GMAC2 finite state machine
	- FE_CDM3_FSM: CDM finite state machine for WDMA0
	- FE_CDM4_FSM: CDM finite state machine for WDMA1
	- SGMII_EFUSE: SGMII E-Fuse value, which can be used
		       to check whether DUT is calibrated
	- SGMII_RX_CNT: SGMII false carrier count, which can
			be used to check whether SGMII detects
			frame starts
	- WED_RTQM_GLO: WED Rx route QM global configuration,
			which can be used to check whether
			WED stays in Q_FULL state

[Release-log]
N/A

Change-Id: I9f95e9140d1e99415d14b7cc6bc2ebbe504b40a2
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/5081805
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.h
index b44f93e..ea147b7 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.h
@@ -22,12 +22,18 @@
 #define MTK_PSE_FQFC_CFG		0x100
 #define MTK_FE_CDM1_FSM			0x220
 #define MTK_FE_CDM2_FSM			0x224
+#define MTK_FE_CDM3_FSM			0x238
+#define MTK_FE_CDM4_FSM			0x298
 #define MTK_FE_GDM1_FSM			0x228
 #define MTK_FE_GDM2_FSM			0x22C
 #define MTK_FE_PSE_FREE			0x240
 #define MTK_FE_DROP_FQ			0x244
 #define MTK_FE_DROP_FC			0x248
 #define MTK_FE_DROP_PPE			0x24C
+#define MTK_MAC_FSM(x)			(0x1010C + ((x) * 0x100))
+#define MTK_SGMII_FALSE_CARRIER_CNT(x)	(0x10060028 + ((x) * 0x10000))
+#define MTK_SGMII_EFUSE			0x11D008C8
+#define MTK_WED_RTQM_GLO_CFG		0x15010B00
 
 #if defined(CONFIG_MEDIATEK_NETSYS_V2)
 #define MTK_PSE_IQ_STA(x)		(0x180 + (x) * 0x4)