[][Update Ethernet procfs-based debug register dump]
[Description]
Change Ethernet procfs-based debug register dump.
- Usage:
- cat /proc/mtketh/dbg_regs
- What's new:
- FE_INT_STA: Frame Engine Interrupt Status
- PSE_IQ_STA5: PSE Input Queue Status part5
- PSE_OQ_STA5: PSE Output Queue Status part5
- PDMA_CRX_IDX: PDMA CPU pointer
- PDMA_DRX_IDX: PDMA DMA pointer
- QDMA_CTX_IDX: QDMA CPU pointer
- QDMA_DTX_IDX: QDMA DMA pointer
- MAC_P1_FSM: GMAC1 finite state machine
- MAC_P2_FSM: GMAC2 finite state machine
- FE_CDM3_FSM: CDM finite state machine for WDMA0
- FE_CDM4_FSM: CDM finite state machine for WDMA1
- SGMII_EFUSE: SGMII E-Fuse value, which can be used
to check whether DUT is calibrated
- SGMII_RX_CNT: SGMII false carrier count, which can
be used to check whether SGMII detects
frame starts
- WED_RTQM_GLO: WED Rx route QM global configuration,
which can be used to check whether
WED stays in Q_FULL state
[Release-log]
N/A
Change-Id: I9f95e9140d1e99415d14b7cc6bc2ebbe504b40a2
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/5081805
4 files changed