commit | 66b5c8d2bafeeaca5e37b5882cbe75d09409bff2 | [log] [tgz] |
---|---|---|
author | developer <developer@mediatek.com> | Fri Jul 16 14:02:47 2021 +0800 |
committer | developer <developer@mediatek.com> | Tue Jul 20 17:41:04 2021 +0800 |
tree | 57273543df182fa6e2e2c950ca853e25d8af0d69 | |
parent | 3c3ce6bf4a52993340fd47023d27a3cec86dd476 [diff] [blame] |
[][MT7986 enbale ice debug clock] [Description] Fix ice debug clock,enable jtag sel clock. [Release-log] N/A Change-Id: Iee61ef4ddd04c520a71a0dbdf677e84e15a39050 Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4762113
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index a592af9..611893e 100644 --- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -728,8 +728,9 @@ ice: ice_debug { compatible = "mediatek,mt7986-ice_debug", "mediatek,mt2701-ice_debug"; - clocks = <&infracfg_ao CK_INFRA_DBG_CK>; - clock-names = "ice_dbg"; + clocks = <&infracfg_ao CK_INFRA_DBG_CK>, + <&topckgen CK_TOP_ARM_DB_JTSEL>; + clock-names = "ice_dbg", "dbg_jtsel"; }; efuse: efuse@11d00000 {