[][Refactor mt7981 dts/image naming rule]
[Description]
Refactor mt7981 dts/image naming rule
[Release-log]
N/A
Change-Id: I2e62091d89df4e12871237b5b47765a85210539f
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/5266015
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-no-clk.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-no-clk.dtsi
deleted file mode 100644
index 95493b3..0000000
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-no-clk.dtsi
+++ /dev/null
@@ -1,481 +0,0 @@
-/*
- * Copyright (c) 2020 MediaTek Inc.
- * Author: Sam.Shih <sam.shih@mediatek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <dt-bindings/interrupt-controller/irq.h>
-#include <dt-bindings/interrupt-controller/arm-gic.h>
-#include <dt-bindings/phy/phy.h>
-#include <dt-bindings/reset/ti-syscon.h>
-/ {
- compatible = "mediatek,mt7981-rfb";
- interrupt-parent = <&gic>;
- #address-cells = <2>;
- #size-cells = <2>;
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
- cpu@0 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- enable-method = "psci";
- reg = <0x0>;
- };
-
- cpu@1 {
- device_type = "cpu";
- compatible = "arm,cortex-a53";
- enable-method = "psci";
- reg = <0x1>;
- };
- };
-
- auxadc: adc@1100d000 {
- compatible = "mediatek,mt7981-auxadc",
- "mediatek,mt7622-auxadc";
- reg = <0 0x1100d000 0 0x1000>;
- clocks = <&system_clk>;
- clock-names = "main";
- #io-channel-cells = <1>;
- };
-
- wed: wed@15010000 {
- compatible = "mediatek,wed";
- wed_num = <2>;
- /* add this property for wed get the pci slot number. */
- pci_slot_map = <0>, <1>;
- reg = <0 0x15010000 0 0x1000>,
- <0 0x15011000 0 0x1000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- wdma: wdma@15104800 {
- compatible = "mediatek,wed-wdma";
- reg = <0 0x15104800 0 0x400>,
- <0 0x15104c00 0 0x400>;
- };
-
- ap2woccif: ap2woccif@151A5000 {
- compatible = "mediatek,ap2woccif";
- reg = <0 0x151A5000 0 0x1000>,
- <0 0x151AD000 0 0x1000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- wocpu0_ilm: wocpu0_ilm@151E0000 {
- compatible = "mediatek,wocpu0_ilm";
- reg = <0 0x151E0000 0 0x8000>;
- };
-
- wocpu_dlm: wocpu_dlm@151E8000 {
- compatible = "mediatek,wocpu_dlm";
- reg = <0 0x151E8000 0 0x2000>,
- <0 0x151F8000 0 0x2000>;
-
- resets = <ðsysrst 0>;
- reset-names = "wocpu_rst";
- };
-
- cpu_boot: wocpu_boot@15194000 {
- compatible = "mediatek,wocpu_boot";
- reg = <0 0x15194000 0 0x1000>;
- };
-
- reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- /* 192 KiB reserved for ARM Trusted Firmware (BL31) */
- secmon_reserved: secmon@43000000 {
- reg = <0 0x43000000 0 0x30000>;
- no-map;
- };
-
- wmcpu_emi: wmcpu-reserved@47CC0000 {
- compatible = "mediatek,wmcpu-reserved";
- no-map;
- reg = <0 0x47CC0000 0 0x00100000>;
- };
-
- wocpu0_emi: wocpu0_emi@47DC0000 {
- compatible = "mediatek,wocpu0_emi";
- no-map;
- reg = <0 0x47D80000 0 0x40000>;
- shared = <0>;
- };
-
- wocpu_data: wocpu_data@47E00000 {
- compatible = "mediatek,wocpu_data";
- no-map;
- reg = <0 0x47DC0000 0 0x240000>;
- shared = <1>;
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- system_clk: dummy_system_clk {
- compatible = "fixed-clock";
- clock-frequency = <40000000>;
- #clock-cells = <0>;
- };
-
- uart_clk: dummy_uart_clk {
- compatible = "fixed-clock";
- clock-frequency = <40000000>;
- #clock-cells = <0>;
- };
-
- gpt_clk: dummy_gpt_clk {
- compatible = "fixed-clock";
- clock-frequency = <20000000>;
- #clock-cells = <0>;
- };
-
- timer {
- compatible = "arm,armv8-timer";
- interrupt-parent = <&gic>;
- clock-frequency = <40000000>;
- interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
- <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
-
- };
-
- watchdog: watchdog@1001c000 {
- compatible = "mediatek,mt7622-wdt",
- "mediatek,mt6589-wdt";
- reg = <0 0x1001c000 0 0x1000>;
- interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
- #reset-cells = <1>;
- };
-
- gic: interrupt-controller@c000000 {
- compatible = "arm,gic-v3";
- #interrupt-cells = <3>;
- interrupt-parent = <&gic>;
- interrupt-controller;
- reg = <0 0x0c000000 0 0x40000>, /* GICD */
- <0 0x0c080000 0 0x200000>; /* GICR */
-
- interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
- };
-
- uart0: serial@11002000 {
- compatible = "mediatek,mt7986-uart",
- "mediatek,mt6577-uart";
- reg = <0 0x11002000 0 0x400>;
- interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>;
- status = "disabled";
- };
-
- uart1: serial@11003000 {
- compatible = "mediatek,mt7986-uart",
- "mediatek,mt6577-uart";
- reg = <0 0x11003000 0 0x400>;
- interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>;
- status = "disabled";
- };
-
- uart2: serial@11004000 {
- compatible = "mediatek,mt7986-uart",
- "mediatek,mt6577-uart";
- reg = <0 0x11004000 0 0x400>;
- interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>;
- status = "disabled";
- };
-
- pcie: pcie@11280000 {
- compatible = "mediatek,mt7981-pcie",
- "mediatek,mt7986-pcie";
- device_type = "pci";
- reg = <0 0x11280000 0 0x4000>;
- reg-names = "pcie-mac";
- #address-cells = <3>;
- #size-cells = <2>;
- interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
- bus-range = <0x00 0xff>;
- ranges = <0x82000000 0 0x20000000
- 0x0 0x20000000 0 0x10000000>;
- status = "disabled";
-
- phys = <&u3port0 PHY_TYPE_PCIE>;
- phy-names = "pcie-phy";
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 7>;
- interrupt-map = <0 0 0 1 &pcie_intc 0>,
- <0 0 0 2 &pcie_intc 1>,
- <0 0 0 3 &pcie_intc 2>,
- <0 0 0 4 &pcie_intc 3>;
- pcie_intc: interrupt-controller {
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <1>;
- };
- };
-
- pio: pinctrl@11d00000 {
- compatible = "mediatek,mt7981-pinctrl";
- reg = <0 0x11d00000 0 0x1000>,
- <0 0x11c00000 0 0x1000>,
- <0 0x11c10000 0 0x1000>,
- <0 0x11d20000 0 0x1000>,
- <0 0x11e00000 0 0x1000>,
- <0 0x11e20000 0 0x1000>,
- <0 0x11f00000 0 0x1000>,
- <0 0x11f10000 0 0x1000>,
- <0 0x1000b000 0 0x1000>;
- reg-names = "gpio_base", "iocfg_rt_base", "iocfg_rm_base",
- "iocfg_rb_base", "iocfg_lb_base", "iocfg_bl_base",
- "iocfg_tm_base", "iocfg_tl_base", "eint";
- gpio-controller;
- #gpio-cells = <2>;
- gpio-ranges = <&pio 0 0 56>;
- interrupt-controller;
- interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-parent = <&gic>;
- #interrupt-cells = <2>;
- };
-
- ethsys: syscon@15000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "mediatek,mt7986-ethsys",
- "syscon";
- reg = <0 0x15000000 0 0x1000>;
- #clock-cells = <1>;
- #reset-cells = <1>;
-
- ethsysrst: reset-controller {
- compatible = "ti,syscon-reset";
- #reset-cells = <1>;
- ti,reset-bits = <0x34 4 0x34 4 0x34 4 (ASSERT_SET | DEASSERT_CLEAR | STATUS_SET)>;
- };
- };
-
- eth: ethernet@15100000 {
- compatible = "mediatek,mt7981-eth";
- reg = <0 0x15100000 0 0x80000>;
- interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>;
- clock-names = "fe", "gp2", "gp1", "wocpu1", "wocpu0",
- "sgmii_tx250m", "sgmii_rx250m",
- "sgmii_cdr_ref", "sgmii_cdr_fb",
- "sgmii2_tx250m", "sgmii2_rx250m",
- "sgmii2_cdr_ref", "sgmii2_cdr_fb";
- mediatek,ethsys = <ðsys>;
- mediatek,sgmiisys = <&sgmiisys0>, <&sgmiisys1>;
- mediatek,infracfg = <&topmisc>;
- #reset-cells = <1>;
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- hnat: hnat@15000000 {
- compatible = "mediatek,mtk-hnat_v4";
- reg = <0 0x15100000 0 0x80000>;
- resets = <ðsys 0>;
- reset-names = "mtketh";
- status = "disabled";
- };
-
- sgmiisys0: syscon@10060000 {
- compatible = "mediatek,mt7986-sgmiisys", "syscon";
- reg = <0 0x10060000 0 0x1000>;
- pn_swap;
- #clock-cells = <1>;
- };
-
- sgmiisys1: syscon@10070000 {
- compatible = "mediatek,mt7986-sgmiisys", "syscon";
- reg = <0 0x10070000 0 0x1000>;
- #clock-cells = <1>;
- };
-
- topmisc: topmisc@11d10000 {
- compatible = "mediatek,mt7981-topmisc", "syscon";
- reg = <0 0x11d10000 0 0x10000>;
- #clock-cells = <1>;
- };
-
- snand: snfi@11005000 {
- compatible = "mediatek,mt7986-snand";
- reg = <0 0x11005000 0 0x1000>, <0 0x11006000 0 0x1000>;
- reg-names = "nfi", "ecc";
- interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&system_clk>,
- <&system_clk>,
- <&system_clk>;
- clock-names = "nfi_clk", "pad_clk", "ecc_clk";
- #address-cells = <1>;
- #size-cells = <0>;
- status = "disabled";
- };
-
- mmc0: mmc@11230000 {
- compatible = "mediatek,mt7986-mmc";
- reg = <0 0x11230000 0 0x1000>, <0 0x11c20000 0 0x1000>;
- interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&system_clk>,
- <&system_clk>,
- <&system_clk>;
- clock-names = "source", "hclk", "source_cg";
- status = "disabled";
- };
-
- wbsys: wbsys@18000000 {
- compatible = "mediatek,wbsys";
- reg = <0 0x18000000 0 0x1000000>;
- interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
- chip_id = <0x7981>;
- };
-
- wed_pcie: wed_pcie@10003000 {
- compatible = "mediatek,wed_pcie";
- reg = <0 0x10003000 0 0x10>;
- };
-
- spi0: spi@1100a000 {
- compatible = "mediatek,ipm-spi-quad";
- reg = <0 0x1100a000 0 0x100>;
- interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>;
- clock-names = "parent-clk", "sel-clk", "spi-clk", "spi-hclk";
- status = "disabled";
- };
-
- spi1: spi@1100b000 {
- compatible = "mediatek,ipm-spi-single";
- reg = <0 0x1100b000 0 0x100>;
- interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>;
- clock-names = "parent-clk", "sel-clk", "spi-clk", "spi-hclk";
- status = "disabled";
- };
-
- spi2: spi@11009000 {
- compatible = "mediatek,ipm-spi-quad";
- reg = <0 0x11009000 0 0x100>;
- interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>;
- clock-names = "parent-clk", "sel-clk", "spi-clk", "spi-hclk";
- status = "disabled";
- };
-
-
- consys: consys@10000000 {
- compatible = "mediatek,mt7981-consys";
- reg = <0 0x10000000 0 0x8600000>;
- memory-region = <&wmcpu_emi>;
- };
-
- xhci: xhci@11200000 {
- compatible = "mediatek,mt7986-xhci",
- "mediatek,mtk-xhci";
- reg = <0 0x11200000 0 0x2e00>,
- <0 0x11203e00 0 0x0100>;
- reg-names = "mac", "ippc";
- interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&u2port0 PHY_TYPE_USB2>;
- clocks = <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>,
- <&system_clk>;
- clock-names = "sys_ck",
- "xhci_ck",
- "ref_ck",
- "mcu_ck",
- "dma_ck";
- #address-cells = <2>;
- #size-cells = <2>;
- mediatek,u3p-dis-msk = <0x01>;
- status = "disabled";
- };
-
- usbtphy: usb-phy@11e10000 {
- compatible = "mediatek,mt7986",
- "mediatek,generic-tphy-v2";
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
- status = "okay";
-
- u2port0: usb-phy@11e10000 {
- reg = <0 0x11e10000 0 0x700>;
- clocks = <&system_clk>;
- clock-names = "ref";
- #phy-cells = <1>;
- status = "okay";
- };
-
- u3port0: usb-phy@11e10700 {
- reg = <0 0x11e10700 0 0x900>;
- clocks = <&system_clk>;
- clock-names = "ref";
- #phy-cells = <1>;
- mediatek,syscon-type = <&topmisc 0x218 0>;
- status = "okay";
- };
-
- };
-
- reg_3p3v: regulator-3p3v {
- compatible = "regulator-fixed";
- regulator-name = "fixed-3.3V";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- };
-};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981a-snfi-nand-2500wan-p5.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-snfi-nand-2500wan-p5.dts
similarity index 98%
rename from target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981a-snfi-nand-2500wan-p5.dts
rename to target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-snfi-nand-2500wan-p5.dts
index 060c272..38231e3 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981a-snfi-nand-2500wan-p5.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-snfi-nand-2500wan-p5.dts
@@ -2,7 +2,7 @@
#include "mt7981.dtsi"
/ {
model = "MediaTek MT7981 RFB";
- compatible = "mediatek,mt7981a-snand-2500wan-p5-rfb";
+ compatible = "mediatek,mt7981-snand-pcie-2500wan-p5-rfb";
chosen {
bootargs = "console=ttyS0,115200n1 loglevel=8 \
earlycon=uart8250,mmio32,0x11002000";
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-snfi-nand-2500wan-gmac2.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nand-2500wan-gmac2.dts
similarity index 69%
rename from target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-snfi-nand-2500wan-gmac2.dts
rename to target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nand-2500wan-gmac2.dts
index 6bfc8f9..920deaa 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-snfi-nand-2500wan-gmac2.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nand-2500wan-gmac2.dts
@@ -2,7 +2,7 @@
#include "mt7981.dtsi"
/ {
model = "MediaTek MT7981 RFB";
- compatible = "mediatek,mt7981-snfi-snand-rfb";
+ compatible = "mediatek,mt7981-spim-snand-rfb";
chosen {
bootargs = "console=ttyS0,115200n1 loglevel=8 \
earlycon=uart8250,mmio32,0x11002000";
@@ -13,15 +13,14 @@
reg = <0 0x40000000 0 0x10000000>;
};
- nmbm_snfi {
+ nmbm_spim_nand {
compatible = "generic,nmbm";
#address-cells = <1>;
#size-cells = <1>;
- lower-mtd-device = <&snand>;
+ lower-mtd-device = <&spi_nand>;
forced-create;
- empty-page-ecc-protected;
partitions {
compatible = "fixed-partitions";
@@ -39,7 +38,7 @@
reg = <0x0100000 0x0080000>;
};
- factory: partition@180000 {
+ partition@180000 {
label = "Factory";
reg = <0x180000 0x0200000>;
};
@@ -96,9 +95,9 @@
#address-cells = <1>;
#size-cells = <0>;
- phy6: phy@6 {
+ phy5: phy@5 {
compatible = "ethernet-phy-id67c9.de0a";
- reg = <6>;
+ reg = <5>;
phy-mode = "2500base-x";
};
@@ -106,7 +105,6 @@
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 0>;
-
ports {
#address-cells = <1>;
#size-cells = <0>;
@@ -155,43 +153,18 @@
status = "okay";
};
-&snand {
+&spi0 {
pinctrl-names = "default";
- /* pin shared with spic */
- pinctrl-0 = <&snfi_pins>;
+ pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
- mediatek,quad-spi;
-
- partitions {
- compatible = "fixed-partitions";
+ spi_nand: spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
-
- partition@0 {
- label = "BL2";
- reg = <0x00000 0x0100000>;
- read-only;
- };
-
- partition@100000 {
- label = "u-boot-env";
- reg = <0x0100000 0x0080000>;
- };
-
- partition@180000 {
- label = "Factory";
- reg = <0x180000 0x0200000>;
- };
-
- partition@380000 {
- label = "FIP";
- reg = <0x380000 0x0200000>;
- };
-
- partition@580000 {
- label = "ubi";
- reg = <0x580000 0x4000000>;
- };
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <52000000>;
+ spi-tx-buswidth = <4>;
+ spi-rx-buswidth = <4>;
};
};
@@ -203,10 +176,45 @@
&pio {
+ i2c_pins: i2c-pins-g0 {
+ mux {
+ function = "i2c";
+ groups = "i2c0_0";
+ };
+ };
+
+ pcm_pins: pcm-pins-g0 {
+ mux {
+ function = "pcm";
+ groups = "pcm";
+ };
+ };
+
- snfi_pins: snfi-pins {
+ pwm0_pin: pwm0-pin-g0 {
+ mux {
+ function = "pwm";
+ groups = "pwm0_0";
+ };
+ };
+
+ pwm1_pin: pwm1-pin-g0 {
+ mux {
+ function = "pwm";
+ groups = "pwm1_0";
+ };
+ };
+
+ pwm2_pin: pwm2-pin {
+ mux {
+ function = "pwm";
+ groups = "pwm2";
+ };
+ };
+
+ spi0_flash_pins: spi0-pins {
mux {
- function = "flash";
- groups = "snfi";
+ function = "spi";
+ groups = "spi0", "spi0_wp_hold";
};
};
@@ -216,8 +224,25 @@
groups = "spi1_1";
};
};
+
+ uart1_pins: uart1-pins-g1 {
+ mux {
+ function = "uart";
+ groups = "uart1_1";
+ };
+ };
+
+ uart2_pins: uart2-pins-g1 {
+ mux {
+ function = "uart";
+ groups = "uart2_1";
+ };
+ };
};
&xhci {
+ mediatek,u3p-dis-msk = <0x0>;
+ phys = <&u2port0 PHY_TYPE_USB2>,
+ <&u3port0 PHY_TYPE_USB3>;
status = "okay";
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981a-spim-nand-rfb.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981a-spim-nand-rfb.dts
deleted file mode 100644
index abc63d2..0000000
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981a-spim-nand-rfb.dts
+++ /dev/null
@@ -1,202 +0,0 @@
-/dts-v1/;
-#include "mt7981.dtsi"
-/ {
- model = "MediaTek MT7981A RFB";
- compatible = "mediatek,mt7981a-spim-snand-rfb";
- chosen {
- bootargs = "console=ttyS0,115200n1 loglevel=8 \
- earlycon=uart8250,mmio32,0x11002000";
- };
-
- memory {
- // fpga ddr2: 128MB*2
- reg = <0 0x40000000 0 0x10000000>;
- };
-
- nmbm_spim_nand {
- compatible = "generic,nmbm";
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- lower-mtd-device = <&spi_nand>;
- forced-create;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "BL2";
- reg = <0x00000 0x0100000>;
- read-only;
- };
-
- partition@100000 {
- label = "u-boot-env";
- reg = <0x0100000 0x0080000>;
- };
-
- partition@180000 {
- label = "Factory";
- reg = <0x180000 0x0200000>;
- };
-
- partition@380000 {
- label = "FIP";
- reg = <0x380000 0x0200000>;
- };
-
- partition@580000 {
- label = "ubi";
- reg = <0x580000 0x4000000>;
- };
- };
- };
-};
-
-&uart0 {
- status = "okay";
-};
-
-&watchdog {
- status = "okay";
-};
-
-ð {
- status = "okay";
-
- gmac0: mac@0 {
- compatible = "mediatek,eth-mac";
- reg = <0>;
- phy-mode = "2500base-x";
-
- fixed-link {
- speed = <2500>;
- full-duplex;
- pause;
- };
- };
-
- gmac1: mac@1 {
- compatible = "mediatek,eth-mac";
- reg = <1>;
- phy-mode = "gmii";
- phy-handle = <&phy0>;
- };
-
- mdio: mdio-bus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- phy0: ethernet-phy@0 {
- reg = <0>;
- };
-
- switch@0 {
- compatible = "mediatek,mt7531";
- reg = <31>;
- reset-gpios = <&pio 39 0>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
- label = "lan1";
- };
-
- port@1 {
- reg = <1>;
- label = "lan2";
- };
-
- port@2 {
- reg = <2>;
- label = "lan3";
- };
-
- port@3 {
- reg = <3>;
- label = "lan4";
- };
-
- port@6 {
- reg = <6>;
- label = "cpu";
- ethernet = <&gmac0>;
- phy-mode = "2500base-x";
-
- fixed-link {
- speed = <2500>;
- full-duplex;
- pause;
- };
- };
- };
- };
- };
-};
-
-&hnat {
- mtketh-wan = "eth1";
- mtketh-lan = "lan";
- mtketh-max-gmac = <2>;
- status = "okay";
-};
-
-&spi0 {
- pinctrl-names = "default";
- pinctrl-0 = <&spi0_flash_pins>;
- status = "okay";
- spi_nand: spi_nand@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "spi-nand";
- reg = <0>;
- spi-max-frequency = <52000000>;
- spi-tx-buswidth = <4>;
- spi-rx-buswidth = <4>;
- };
-};
-
-&spi1 {
- pinctrl-names = "default";
- pinctrl-0 = <&spic_pins>;
- status = "disabled";
-};
-
-&pcie {
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_pins>;
- status = "okay";
-};
-
-&pio {
- pcie_pins: pcie-pins {
- mux {
- function = "pcie";
- groups = "pcie_pereset", "pcie_clk", "pcie_wake";
- };
- };
-
- spi0_flash_pins: spi0-pins {
- mux {
- function = "spi";
- groups = "spi0", "spi0_wp_hold";
- };
- };
-
- spic_pins: spi1-pins {
- mux {
- function = "spi";
- groups = "spi1_1";
- };
- };
-};
-
-&xhci {
- status = "okay";
-};
diff --git a/target/linux/mediatek/image/mt7981.mk b/target/linux/mediatek/image/mt7981.mk
index 277b3d4..f42ca75 100755
--- a/target/linux/mediatek/image/mt7981.mk
+++ b/target/linux/mediatek/image/mt7981.mk
@@ -1,17 +1,17 @@
KERNEL_LOADADDR := 0x48080000
-define Device/mt7981b-spim-nor-rfb
+define Device/mt7981-spim-nor-rfb
DEVICE_VENDOR := MediaTek
- DEVICE_MODEL := mt7981b-spim-nor-rfb
+ DEVICE_MODEL := mt7981-spim-nor-rfb
DEVICE_DTS := mt7981-spim-nor-rfb
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
endef
-TARGET_DEVICES += mt7981b-spim-nor-rfb
+TARGET_DEVICES += mt7981-spim-nor-rfb
-define Device/mt7981b-snfi-nand-2500wan-gmac2
+define Device/mt7981-spim-nand-2500wan-gmac2
DEVICE_VENDOR := MediaTek
- DEVICE_MODEL := mt7981b-snfi-nand-2500wan-gmac2
- DEVICE_DTS := mt7981-snfi-nand-2500wan-gmac2
+ DEVICE_MODEL := mt7981-spim-nand-2500wan-gmac2
+ DEVICE_DTS := mt7981-spim-nand-2500wan-gmac2
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
SUPPORTED_DEVICES := mediatek,mt7981-rfb,ubi
UBINIZE_OPTS := -E 5
@@ -23,11 +23,11 @@
IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
-TARGET_DEVICES += mt7981b-snfi-nand-2500wan-gmac2
+TARGET_DEVICES += mt7981-spim-nand-2500wan-gmac2
-define Device/mt7981b-spim-nand-rfb
+define Device/mt7981-spim-nand-rfb
DEVICE_VENDOR := MediaTek
- DEVICE_MODEL := mt7981b-spim-nand-rfb
+ DEVICE_MODEL := mt7981-spim-nand-rfb
DEVICE_DTS := mt7981-spim-nand-rfb
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
SUPPORTED_DEVICES := mediatek,mt7981-rfb,ubi
@@ -40,23 +40,23 @@
IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
-TARGET_DEVICES += mt7981b-spim-nand-rfb
+TARGET_DEVICES += mt7981-spim-nand-rfb
-define Device/mt7981b-emmc-rfb
+define Device/mt7981-emmc-rfb
DEVICE_VENDOR := MediaTek
- DEVICE_MODEL := mt7981b-emmc-rfb
+ DEVICE_MODEL := mt7981-emmc-rfb
DEVICE_DTS := mt7981-emmc-rfb
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
DEVICE_PACKAGES := mkf2fs e2fsprogs kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 kmod-mmc
IMAGES := sysupgrade-emmc.bin.gz
IMAGE/sysupgrade-emmc.bin.gz := sysupgrade-emmc | gzip | append-metadata
endef
-TARGET_DEVICES += mt7981b-emmc-rfb
+TARGET_DEVICES += mt7981-emmc-rfb
-define Device/mt7981a-spim-nand-rfb
+define Device/mt7981-snfi-nand-2500wan-p5
DEVICE_VENDOR := MediaTek
- DEVICE_MODEL := mt7981a-spim-nand-rfb
- DEVICE_DTS := mt7981a-spim-nand-rfb
+ DEVICE_MODEL := mt7981-snfi-nand-2500wan-p5
+ DEVICE_DTS := mt7981-snfi-nand-2500wan-p5
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
SUPPORTED_DEVICES := mediatek,mt7981-rfb,ubi
UBINIZE_OPTS := -E 5
@@ -68,24 +68,7 @@
IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
-TARGET_DEVICES += mt7981a-spim-nand-rfb
-
-define Device/mt7981a-snfi-nand-2500wan-p5
- DEVICE_VENDOR := MediaTek
- DEVICE_MODEL := mt7981a-snfi-nand-2500wan-p5
- DEVICE_DTS := mt7981a-snfi-nand-2500wan-p5
- DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
- SUPPORTED_DEVICES := mediatek,mt7981-rfb,ubi
- UBINIZE_OPTS := -E 5
- BLOCKSIZE := 128k
- PAGESIZE := 2048
- IMAGE_SIZE := 65536k
- KERNEL_IN_UBI := 1
- IMAGES += factory.bin
- IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
- IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
-endef
-TARGET_DEVICES += mt7981a-snfi-nand-2500wan-p5
+TARGET_DEVICES += mt7981-snfi-nand-2500wan-p5
define Device/mt7981-fpga-spim-nor
DEVICE_VENDOR := MediaTek