[][config emmc/SD clock & compatiable name for eMMC/SD run HighSpeed in kernel]
[Description]
Refactor emmc clocks configure & compatiable name of mmc in mt7981.dtsi
[Test]
Build pass & eMMC/SD boot up
[Release-log]
N/A
Change-Id: I19626121157c33f6df84f72ae5166aae5df94677
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/5374467
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
index 3f8ccfb..7cf2d06 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
@@ -467,12 +467,17 @@
};
mmc0: mmc@11230000 {
- compatible = "mediatek,mt7986-mmc";
+ compatible = "mediatek,mt7986-mmc",
+ "mediatek,mt7981-mmc";
reg = <0 0x11230000 0 0x1000>, <0 0x11c20000 0 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&system_clk>,
- <&system_clk>,
- <&system_clk>;
+ clocks = <&topckgen CK_TOP_EMMC_208M>,
+ <&topckgen CK_TOP_EMMC_400M>,
+ <&infracfg_ao CK_INFRA_MSDC_CK>;
+ assigned-clocks = <&topckgen CK_TOP_EMMC_208M_SEL>,
+ <&topckgen CK_TOP_EMMC_400M_SEL>;
+ assigned-clock-parents = <&topckgen CK_TOP_CB_M_D2>,
+ <&topckgen CK_TOP_CB_NET2_D2>;
clock-names = "source", "hclk", "source_cg";
status = "disabled";
};