/dts-v1/;
#include "mt7981.dtsi"
/ {
	model = "MediaTek MT7981 RFB";
	compatible = "mediatek,mt7981-spim-nor-rfb";
	chosen {
		bootargs = "console=ttyS0,115200n1 loglevel=8  \
				earlycon=uart8250,mmio32,0x11002000";
	};

	memory {
		// fpga ddr2: 128MB*2
		reg = <0 0x40000000 0 0x10000000>;
	};
};

&uart0 {
	status = "okay";
};

&watchdog {
	status = "okay";
};

&eth {
        status = "okay";

        gmac0: mac@0 {
                compatible = "mediatek,eth-mac";
                reg = <0>;
                phy-mode = "2500base-x";

                fixed-link {
                        speed = <2500>;
                        full-duplex;
                        pause;
                };
        };

	gmac1: mac@1 {
		compatible = "mediatek,eth-mac";
		reg = <1>;
		phy-mode = "gmii";
		phy-handle = <&phy0>;
	};

        mdio: mdio-bus {
                #address-cells = <1>;
                #size-cells = <0>;

		phy0: ethernet-phy@0 {
			compatible = "ethernet-phy-id03a2.9461";
			reg = <0>;
			phy-mode = "gmii";
			nvmem-cells = <&phy_calibration>;
			nvmem-cell-names = "phy-cal-data";
		};

		switch@0 {
                        compatible = "mediatek,mt7531";
                        reg = <31>;
                        reset-gpios = <&pio 39 0>;

                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;

                                port@0 {
                                        reg = <0>;
                                        label = "lan1";
                                };

                                port@1 {
                                        reg = <1>;
                                        label = "lan2";
                                };

                                port@2 {
                                        reg = <2>;
                                        label = "lan3";
                                };

                                port@3 {
                                        reg = <3>;
                                        label = "lan4";
                                };

                                port@6 {
                                        reg = <6>;
                                        label = "cpu";
                                        ethernet = <&gmac0>;
                                        phy-mode = "2500base-x";

                                        fixed-link {
                                                speed = <2500>;
                                                full-duplex;
                                                pause;
                                        };
                                };
                        };
                };
        };
};

&hnat {
	mtketh-wan = "eth1";
	mtketh-lan = "lan";
	mtketh-max-gmac = <2>;
	status = "okay";
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spic_pins>;
	status = "disabled";
};

&spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi2_flash_pins>;
	status = "okay";
	spi_nor@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		spi-cal-enable;
		spi-cal-mode = "read-data";
		spi-cal-datalen = <7>;
		spi-cal-data = /bits/ 8 <
			0x53 0x46 0x5F 0x42 0x4F 0x4F 0x54>; /* SF_BOOT */
		spi-cal-addrlen = <1>;
		spi-cal-addr = /bits/ 32 <0x0>;
		reg = <0>;
		spi-max-frequency = <52000000>;
		spi-tx-bus-width = <4>;
		spi-rx-bus-width = <4>;

		partition@00000 {
			label = "BL2";
			reg = <0x00000 0x0040000>;
		};
		partition@40000 {
			label = "u-boot-env";
			reg = <0x40000 0x0010000>;
		};
		partition@50000 {
			label = "Factory";
			reg = <0x50000 0x00B0000>;
		};
		partition@100000 {
			label = "FIP";
			reg = <0x100000 0x0080000>;
		};
		partition@180000 {
			label = "firmware";
			reg = <0x180000 0xE00000>;
		};
	};
};

&pio {
	spic_pins: spi1-pins {
		mux {
			function = "spi";
			groups = "spi1_1";
		};
	};

	spi2_flash_pins: spi2-pins {
		mux {
			function = "spi";
			groups = "spi2", "spi2_wp_hold";
		};

		conf-pu {
			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
		};

		conf-pd {
			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
		};
	};
};

&xhci {  
        status = "okay";
};

&wed {
	dy_txbm_enable = "true";
	dy_txbm_budget = <8>;
	txbm_init_sz = <8>;
	txbm_max_sz = <32>;
	status = "okay";
};