[][kernel][common][eth][Update Airoha EN8811H 2.5G PHY driver to v1.2.2]
[Description]
Change Airoha EN8811H 2.5G PHY driver to v1.2.2.
Change Log:
[2023/09/01] v1.2.2
1.Add DEBUGFS for debugging
2.Modified for Linux coding style.
[2023/07/18] v1.2.1
* MD32 EN8811_0717_05 updated:
1.Fix the system hang issue (need power down/up to link up)
2.Fix Pause frame issue during system initialization
3.Improve linkup time and IoT performance
[2023/06/08] v1.2.0
* MD32 EN8811_0608_01 updated:
1.Improved IoT performance and stability
[2023/06/06] v1.1.9
* MD32 EN8811_0606_01 updated:
1.Improved IoT performance and stability
[2023/06/02] v1.1.8
* MD32 EN8811_0531_01 updated:
1.Improved IoT performance and stability
2.Keep LED settings after power down
3.Fixed MT7986 integration issues
[2023/05/15] v1.1.7
* MD32 EN8811_0512_09 updated:
1.Improved IoT performance and stability
[2023/04/15] v1.1.6
* MD32 FW_8811_SOC_0411_a updated:
1.Improved IoT performance and stability
=====================================================================
If your board that GMAC2 connects with Airoha EN8811H, please change
the eth node as following.
ð {
...
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "2500base-x";
phy-handle = <&phy15>;
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
phy15: phy@15 {
compatible = "ethernet-phy-id03a2.a411";
reg = <15>;
phy-mode = "2500base-x";
full-duplex;
pause;
};
...
};
};
=====================================================================
In addition, if EN8811H connects with a RESET GPIO, please check the
GPIO number, and then add reset-gpio related definition to above phy
node.
=====================================================================
reset-gpios = <&gpio 6 1>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
=====================================================================
If without this patch, kernel cannot load up-to-date PHY driver
for the Airoha EN8811H.
[Release-log]
N/A
Change-Id: Ib115130d67a4c5fe4b21bddc0cd0e6ee7a48ec2e
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/7957288
diff --git a/target/linux/mediatek/files-5.4/drivers/net/phy/air_en8811h_api.h b/target/linux/mediatek/files-5.4/drivers/net/phy/air_en8811h_api.h
new file mode 100644
index 0000000..a1d97ce
--- /dev/null
+++ b/target/linux/mediatek/files-5.4/drivers/net/phy/air_en8811h_api.h
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*************************************************
+ * FILE NAME: air_en8811h_api.h
+ * PURPOSE:
+ * EN8811H PHY Driver for Linux
+ * NOTES:
+ *
+ * Copyright (C) 2023 Airoha Technology Corp.
+ *************************************************/
+#ifndef __EN8811H_API_H
+#define __EN8811H_API_H
+#include <linux/version.h>
+
+#if (KERNEL_VERSION(4, 5, 0) > LINUX_VERSION_CODE)
+#define phydev_mdio_bus(_dev) (_dev->bus)
+#define phydev_addr(_dev) (_dev->addr)
+#define phydev_dev(_dev) (&_dev->dev)
+#else
+#define phydev_mdio_bus(_dev) (_dev->mdio.bus)
+#define phydev_addr(_dev) (_dev->mdio.addr)
+#define phydev_dev(_dev) (&_dev->mdio.dev)
+#endif
+
+#define BUFFER_LENGTH 512
+
+#define DEBUGFS_COUNTER "counter"
+#define DEBUGFS_DRIVER_INFO "drvinfo"
+#define DEBUGFS_PORT_MODE "port_mode"
+#define DEBUGFS_BUCKPBUS_OP "buckpbus_op"
+#define DEBUGFS_PBUS_OP "pbus_op"
+#define DEBUGFS_POLARITY "polarity"
+#define DEBUGFS_LINK_STATUS "link_status"
+#define DEBUGFS_DBG_REG_SHOW "dbg_regs_show"
+
+enum air_port_mode {
+ AIR_PORT_MODE_FORCE_100,
+ AIR_PORT_MODE_FORCE_1000,
+ AIR_PORT_MODE_FORCE_2500,
+ AIR_PORT_MODE_AUTONEGO,
+ AIR_PORT_MODE_POWER_DOWN,
+ AIR_PORT_MODE_POWER_UP,
+ AIR_PORT_MODE_FC_UNSUPPORT,
+ AIR_PORT_MODE_FC_SUPPORT,
+ AIR_PORT_MODE_FC_DIS,
+ AIR_PORT_MODE_FC_EN,
+ AIR_PORT_MODE_LAST = 0xFF,
+};
+
+enum air_polarity {
+ AIR_POL_TX_REV_RX_NOR,
+ AIR_POL_TX_NOR_RX_NOR,
+ AIR_POL_TX_REV_RX_REV,
+ AIR_POL_TX_NOR_RX_REV,
+ AIR_POL_TX_NOR_RX_LAST = 0xff,
+};
+
+/* Link mode bit indices */
+enum air_link_mode_bit {
+ AIR_LINK_MODE_10baseT_Half_BIT = 0,
+ AIR_LINK_MODE_10baseT_Full_BIT = 1,
+ AIR_LINK_MODE_100baseT_Half_BIT = 2,
+ AIR_LINK_MODE_100baseT_Full_BIT = 3,
+ AIR_LINK_MODE_1000baseT_Full_BIT = 4,
+ AIR_LINK_MODE_2500baseT_Full_BIT = 5,
+};
+
+#ifndef unlikely
+# define unlikely(x) (x)
+#endif
+int air_pbus_reg_write(struct phy_device *phydev,
+ unsigned int pbus_address, unsigned int pbus_data);
+int air_mii_cl22_write(struct mii_bus *ebus, int addr,
+ unsigned int phy_register, unsigned int write_data);
+int air_mii_cl22_read(struct mii_bus *ebus,
+ int addr, unsigned int phy_register);
+int air_mii_cl45_read(struct phy_device *phydev, int devad, u16 reg);
+int air_mii_cl45_write(struct phy_device *phydev,
+ int devad, u16 reg, u16 write_data);
+unsigned int air_buckpbus_reg_read(struct phy_device *phydev,
+ unsigned int pbus_address);
+int air_buckpbus_reg_write(struct phy_device *phydev,
+ unsigned int pbus_address, unsigned int pbus_data);
+#ifdef CONFIG_AIROHA_EN8811H_PHY_DEBUGFS
+int airphy_debugfs_init(struct phy_device *phydev);
+void air_debugfs_remove(struct phy_device *phydev);
+#endif /*CONFIG_AIROHA_EN8811H_PHY_DEBUGFS*/
+#endif /* End of __EN8811H_API_H */