[][openwrt][update the patches in accordance with the new naming rules]
[Description]
Change all mtk patches in accordance with the new naming rules
"999-20xx-" : Basic Part
"999-21xx-" : Slow Speed I/O
"999-22xx-" : Slow Speed I/O
"999-23xx-" : SPI & Storage
"999-24xx-" : SPI & Storage
"999-25xx-" : Advanced features
"999-26xx-" : High Speed I/O
"999-27xx-" : Networking
"999-28xx-" : MISC
"999-29xx-" : Uncategorized
[Release-log]
N/A
Change-Id: I245da3b0e5b7299b42473c20cc6f0899cffc1ad2
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/7530987
diff --git a/target/linux/generic/backport-5.4/430-mtd-spinand-macronix-Add-support-for-MX31LF1GE4BC.patch b/target/linux/generic/backport-5.4/430-mtd-spinand-macronix-Add-support-for-MX31LF1GE4BC.patch
deleted file mode 100644
index 3292a6b..0000000
--- a/target/linux/generic/backport-5.4/430-mtd-spinand-macronix-Add-support-for-MX31LF1GE4BC.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 051e070d0a019df6be9e21be1fb63352e4c4412e Mon Sep 17 00:00:00 2001
-From: YouChing Lin <ycllin@mxic.com.tw>
-Date: Wed, 22 Jul 2020 16:02:57 +0800
-Subject: [PATCH] mtd: spinand: macronix: Add support for MX31LF1GE4BC
-
-The Macronix MX31LF1GE4BC is a 3V, 1Gbit (128MB) serial
-NAND flash device.
-
-Validated by read, erase, read back, write and read back
-on Xilinx Zynq PicoZed FPGA board which included
-Macronix SPI Host (driver/spi/spi-mxic.c).
-
-Signed-off-by: YouChing Lin <ycllin@mxic.com.tw>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/1595404978-31079-2-git-send-email-ycllin@mxic.com.tw
----
- drivers/mtd/nand/spi/macronix.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
-index 9ff8debd599418..9ae48ce1c46f91 100644
---- a/drivers/mtd/nand/spi/macronix.c
-+++ b/drivers/mtd/nand/spi/macronix.c
-@@ -119,6 +119,16 @@ static const struct spinand_info macronix_spinand_table[] = {
- &update_cache_variants),
- SPINAND_HAS_QE_BIT,
- SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
-+ SPINAND_INFO("MX31LF1GE4BC",
-+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e),
-+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
-+ NAND_ECCREQ(8, 512),
-+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-+ &write_cache_variants,
-+ &update_cache_variants),
-+ 0 /*SPINAND_HAS_QE_BIT*/,
-+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
-+ mx35lf1ge4ab_ecc_get_status)),
- };
-
- static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
diff --git a/target/linux/generic/backport-5.4/431-mtd-spinand-macronix-Add-support-for-MX31UF1GE4BC.patch b/target/linux/generic/backport-5.4/431-mtd-spinand-macronix-Add-support-for-MX31UF1GE4BC.patch
deleted file mode 100644
index 9f48d4a..0000000
--- a/target/linux/generic/backport-5.4/431-mtd-spinand-macronix-Add-support-for-MX31UF1GE4BC.patch
+++ /dev/null
@@ -1,40 +0,0 @@
-From 75b049bb7f89a58a25592f17baf91d703f0f548e Mon Sep 17 00:00:00 2001
-From: YouChing Lin <ycllin@mxic.com.tw>
-Date: Wed, 22 Jul 2020 16:02:58 +0800
-Subject: [PATCH] mtd: spinand: macronix: Add support for MX31UF1GE4BC
-
-The Macronix MX31UF1GE4BC is a 1.8V, 1Gbit (128MB) serial
-NAND flash device.
-
-Validated by read, erase, read back, write and read back
-on Xilinx Zynq PicoZed FPGA board which included
-Macronix SPI Host (driver/spi/spi-mxic.c).
-
-Signed-off-by: YouChing Lin <ycllin@mxic.com.tw>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/1595404978-31079-3-git-send-email-ycllin@mxic.com.tw
----
- drivers/mtd/nand/spi/macronix.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
-index 9ae48ce1c46f91..8e801e4c3a006f 100644
---- a/drivers/mtd/nand/spi/macronix.c
-+++ b/drivers/mtd/nand/spi/macronix.c
-@@ -129,6 +129,16 @@ static const struct spinand_info macronix_spinand_table[] = {
- 0 /*SPINAND_HAS_QE_BIT*/,
- SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
- mx35lf1ge4ab_ecc_get_status)),
-+ SPINAND_INFO("MX31UF1GE4BC",
-+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x9e),
-+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
-+ NAND_ECCREQ(8, 512),
-+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-+ &write_cache_variants,
-+ &update_cache_variants),
-+ 0 /*SPINAND_HAS_QE_BIT*/,
-+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
-+ mx35lf1ge4ab_ecc_get_status)),
- };
-
- static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
diff --git a/target/linux/generic/backport-5.4/451-mtd-spinand-micron-Describe-the-SPI-NAND-device-MT29F2G01ABAGD.patch b/target/linux/generic/backport-5.4/451-mtd-spinand-micron-Describe-the-SPI-NAND-device-MT29F2G01ABAGD.patch
deleted file mode 100644
index 31141db..0000000
--- a/target/linux/generic/backport-5.4/451-mtd-spinand-micron-Describe-the-SPI-NAND-device-MT29F2G01ABAGD.patch
+++ /dev/null
@@ -1,29 +0,0 @@
-From 8511a3a9937e30949b34bea46c3dc3f65d11034b Mon Sep 17 00:00:00 2001
-From: Shivamurthy Shastri <sshivamurthy@micron.com>
-Date: Wed, 11 Mar 2020 18:57:31 +0100
-Subject: [PATCH] mtd: spinand: micron: Describe the SPI NAND device
- MT29F2G01ABAGD
-
-Add the SPI NAND device MT29F2G01ABAGD series number, size and voltage
-details as a comment.
-
-Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-3-sshivamurthy@micron.com
----
- drivers/mtd/nand/spi/micron.c | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
-index cc1ee68421c8e1..4727933c894bc8 100644
---- a/drivers/mtd/nand/spi/micron.c
-+++ b/drivers/mtd/nand/spi/micron.c
-@@ -91,6 +91,7 @@ static int micron_8_ecc_get_status(struct spinand_device *spinand,
- }
-
- static const struct spinand_info micron_spinand_table[] = {
-+ /* M79A 2Gb 3.3V */
- SPINAND_INFO("MT29F2G01ABAGD",
- SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24),
- NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
diff --git a/target/linux/generic/backport-5.4/453-mtd-spinand-micron-identify-SPI-NAND-device-with-Continuous-Read-mode.patch b/target/linux/generic/backport-5.4/453-mtd-spinand-micron-identify-SPI-NAND-device-with-Continuous-Read-mode.patch
deleted file mode 100644
index 59a4234..0000000
--- a/target/linux/generic/backport-5.4/453-mtd-spinand-micron-identify-SPI-NAND-device-with-Continuous-Read-mode.patch
+++ /dev/null
@@ -1,79 +0,0 @@
-From 0bc68af9137dc3f30b161de4ce546c7799f88d1e Mon Sep 17 00:00:00 2001
-From: Shivamurthy Shastri <sshivamurthy@micron.com>
-Date: Wed, 11 Mar 2020 18:57:33 +0100
-Subject: [PATCH] mtd: spinand: micron: identify SPI NAND device with
- Continuous Read mode
-
-Add SPINAND_HAS_CR_FEAT_BIT flag to identify the SPI NAND device with
-the Continuous Read mode.
-
-Some of the Micron SPI NAND devices have the "Continuous Read" feature
-enabled by default, which does not fit the subsystem needs.
-
-In this mode, the READ CACHE command doesn't require the starting column
-address. The device always output the data starting from the first
-column of the cache register, and once the end of the cache register
-reached, the data output continues through the next page. With the
-continuous read mode, it is possible to read out the entire block using
-a single READ command, and once the end of the block reached, the output
-pins become High-Z state. However, during this mode the read command
-doesn't output the OOB area.
-
-Hence, we disable the feature at probe time.
-
-Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-5-sshivamurthy@micron.com
----
- drivers/mtd/nand/spi/micron.c | 16 ++++++++++++++++
- include/linux/mtd/spinand.h | 1 +
- 2 files changed, 17 insertions(+)
-
-diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
-index 26925714a9fbac..956f7710aca263 100644
---- a/drivers/mtd/nand/spi/micron.c
-+++ b/drivers/mtd/nand/spi/micron.c
-@@ -18,6 +18,8 @@
- #define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4)
- #define MICRON_STATUS_ECC_7TO8_BITFLIPS (5 << 4)
-
-+#define MICRON_CFG_CR BIT(0)
-+
- static SPINAND_OP_VARIANTS(read_cache_variants,
- SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
- SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
-@@ -137,7 +139,21 @@ static const struct spinand_info micron_spinand_table[] = {
- micron_8_ecc_get_status)),
- };
-
-+static int micron_spinand_init(struct spinand_device *spinand)
-+{
-+ /*
-+ * M70A device series enable Continuous Read feature at Power-up,
-+ * which is not supported. Disable this bit to avoid any possible
-+ * failure.
-+ */
-+ if (spinand->flags & SPINAND_HAS_CR_FEAT_BIT)
-+ return spinand_upd_cfg(spinand, MICRON_CFG_CR, 0);
-+
-+ return 0;
-+}
-+
- static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
-+ .init = micron_spinand_init,
- };
-
- const struct spinand_manufacturer micron_spinand_manufacturer = {
-diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
-index f4c4ae87181b27..1077c45721ff25 100644
---- a/include/linux/mtd/spinand.h
-+++ b/include/linux/mtd/spinand.h
-@@ -284,6 +284,7 @@ struct spinand_ecc_info {
- };
-
- #define SPINAND_HAS_QE_BIT BIT(0)
-+#define SPINAND_HAS_CR_FEAT_BIT BIT(1)
-
- /**
- * struct spinand_info - Structure used to describe SPI NAND chips
diff --git a/target/linux/generic/backport-5.4/790-v5.7-iopoll-introduce-read_poll_timeout-macro.patch b/target/linux/generic/backport-5.4/790-v5.7-iopoll-introduce-read_poll_timeout-macro.patch
deleted file mode 100644
index 26de067..0000000
--- a/target/linux/generic/backport-5.4/790-v5.7-iopoll-introduce-read_poll_timeout-macro.patch
+++ /dev/null
@@ -1,269 +0,0 @@
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-Subject: [PATCH net-next v7 01/10] iopoll: introduce read_poll_timeout macro
-Date: Mon, 23 Mar 2020 23:05:51 +0800
-Message-Id: <20200323150600.21382-2-zhengdejin5@gmail.com>
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-
-this macro is an extension of readx_poll_timeout macro. the accessor
-function op just supports only one parameter in the readx_poll_timeout
-macro, but this macro can supports multiple variable parameters for
-it. so functions like phy_read(struct phy_device *phydev, u32 regnum)
-and phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) can
-also use this poll timeout core. and also expand it can sleep some time
-before read operation.
-
-Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com>
----
-v6 -> v7:
- - add a parameter sleep_before_read to support that it can sleep
- some time before read operation in read_poll_timeout macro.
-v5 -> v6:
- - no changed
-v4 -> v5:
- - no changed
-v3 -> v4:
- - no changed
-v2 -> v3:
- - no changed
-v1 -> v2:
- - no changed
-
- include/linux/iopoll.h | 44 ++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 44 insertions(+)
-
---- a/include/linux/iopoll.h
-+++ b/include/linux/iopoll.h
-@@ -14,36 +14,41 @@
- #include <linux/io.h>
-
- /**
-- * readx_poll_timeout - Periodically poll an address until a condition is met or a timeout occurs
-- * @op: accessor function (takes @addr as its only argument)
-- * @addr: Address to poll
-+ * read_poll_timeout - Periodically poll an address until a condition is
-+ * met or a timeout occurs
-+ * @op: accessor function (takes @args as its arguments)
- * @val: Variable to read the value into
- * @cond: Break condition (usually involving @val)
- * @sleep_us: Maximum time to sleep between reads in us (0
- * tight-loops). Should be less than ~20ms since usleep_range
- * is used (see Documentation/timers/timers-howto.rst).
- * @timeout_us: Timeout in us, 0 means never timeout
-+ * @sleep_before_read: if it is true, sleep @sleep_us before read.
-+ * @args: arguments for @op poll
- *
- * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
-- * case, the last read value at @addr is stored in @val. Must not
-+ * case, the last read value at @args is stored in @val. Must not
- * be called from atomic context if sleep_us or timeout_us are used.
- *
- * When available, you'll probably want to use one of the specialized
- * macros defined below rather than this macro directly.
- */
--#define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us) \
-+#define read_poll_timeout(op, val, cond, sleep_us, timeout_us, \
-+ sleep_before_read, args...) \
- ({ \
- u64 __timeout_us = (timeout_us); \
- unsigned long __sleep_us = (sleep_us); \
- ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
- might_sleep_if((__sleep_us) != 0); \
-+ if (sleep_before_read && __sleep_us) \
-+ usleep_range((__sleep_us >> 2) + 1, __sleep_us); \
- for (;;) { \
-- (val) = op(addr); \
-+ (val) = op(args); \
- if (cond) \
- break; \
- if (__timeout_us && \
- ktime_compare(ktime_get(), __timeout) > 0) { \
-- (val) = op(addr); \
-+ (val) = op(args); \
- break; \
- } \
- if (__sleep_us) \
-@@ -53,6 +58,27 @@
- })
-
- /**
-+ * readx_poll_timeout - Periodically poll an address until a condition is met or a timeout occurs
-+ * @op: accessor function (takes @addr as its only argument)
-+ * @addr: Address to poll
-+ * @val: Variable to read the value into
-+ * @cond: Break condition (usually involving @val)
-+ * @sleep_us: Maximum time to sleep between reads in us (0
-+ * tight-loops). Should be less than ~20ms since usleep_range
-+ * is used (see Documentation/timers/timers-howto.rst).
-+ * @timeout_us: Timeout in us, 0 means never timeout
-+ *
-+ * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
-+ * case, the last read value at @addr is stored in @val. Must not
-+ * be called from atomic context if sleep_us or timeout_us are used.
-+ *
-+ * When available, you'll probably want to use one of the specialized
-+ * macros defined below rather than this macro directly.
-+ */
-+#define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us) \
-+ read_poll_timeout(op, val, cond, sleep_us, timeout_us, false, addr)
-+
-+/**
- * readx_poll_timeout_atomic - Periodically poll an address until a condition is met or a timeout occurs
- * @op: accessor function (takes @addr as its only argument)
- * @addr: Address to poll
---- a/include/linux/phy.h
-+++ b/include/linux/phy.h
-@@ -21,6 +21,7 @@
- #include <linux/timer.h>
- #include <linux/workqueue.h>
- #include <linux/mod_devicetable.h>
-+#include <linux/iopoll.h>
-
- #include <linux/atomic.h>
-
-@@ -714,6 +715,19 @@ static inline int phy_read(struct phy_de
- return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
- }
-
-+#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
-+ timeout_us, sleep_before_read) \
-+({ \
-+ int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
-+ sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
-+ if (val < 0) \
-+ __ret = val; \
-+ if (__ret) \
-+ phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
-+ __ret; \
-+})
-+
-+
- /**
- * __phy_read - convenience function for reading a given PHY register
- * @phydev: the phy_device struct
-@@ -766,6 +780,19 @@ static inline int __phy_write(struct phy
- */
- int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
-
-+#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
-+ sleep_us, timeout_us, sleep_before_read) \
-+({ \
-+ int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
-+ sleep_us, timeout_us, sleep_before_read, \
-+ phydev, devaddr, regnum); \
-+ if (val < 0) \
-+ __ret = val; \
-+ if (__ret) \
-+ phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
-+ __ret; \
-+})
-+
- /**
- * __phy_read_mmd - Convenience function for reading a register
- * from an MMD on a given PHY.
---- a/drivers/net/phy/phy_device.c
-+++ b/drivers/net/phy/phy_device.c
-@@ -1056,18 +1056,12 @@ EXPORT_SYMBOL(phy_disconnect);
- static int phy_poll_reset(struct phy_device *phydev)
- {
- /* Poll until the reset bit clears (50ms per retry == 0.6 sec) */
-- unsigned int retries = 12;
-- int ret;
--
-- do {
-- msleep(50);
-- ret = phy_read(phydev, MII_BMCR);
-- if (ret < 0)
-- return ret;
-- } while (ret & BMCR_RESET && --retries);
-- if (ret & BMCR_RESET)
-- return -ETIMEDOUT;
-+ int ret, val;
-
-+ ret = phy_read_poll_timeout(phydev, MII_BMCR, val, !(val & BMCR_RESET),
-+ 50000, 600000, true);
-+ if (ret)
-+ return ret;
- /* Some chips (smsc911x) may still need up to another 1ms after the
- * BMCR_RESET bit is cleared before they are usable.
- */
diff --git a/target/linux/generic/backport-5.4/792-v5.9-net-phy-add-support-for-a-common-probe-between-shared-PHYs.patch b/target/linux/generic/backport-5.4/792-v5.9-net-phy-add-support-for-a-common-probe-between-shared-PHYs.patch
deleted file mode 100644
index 39b29ad..0000000
--- a/target/linux/generic/backport-5.4/792-v5.9-net-phy-add-support-for-a-common-probe-between-shared-PHYs.patch
+++ /dev/null
@@ -1,109 +0,0 @@
-From patchwork Tue Jun 23 14:30:07 2020
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-X-Patchwork-Submitter: Antoine Tenart <antoine.tenart@bootlin.com>
-X-Patchwork-Id: 1315292
-X-Patchwork-Delegate: davem@davemloft.net
-Return-Path: <netdev-owner@vger.kernel.org>
-X-Original-To: patchwork-incoming-netdev@ozlabs.org
-Delivered-To: patchwork-incoming-netdev@ozlabs.org
-Authentication-Results: ozlabs.org;
- spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org
- (client-ip=23.128.96.18; helo=vger.kernel.org;
- envelope-from=netdev-owner@vger.kernel.org; receiver=<UNKNOWN>)
-Authentication-Results: ozlabs.org;
- dmarc=none (p=none dis=none) header.from=bootlin.com
-Received: from vger.kernel.org (vger.kernel.org [23.128.96.18])
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- for <patchwork-incoming-netdev@ozlabs.org>;
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- by relay3-d.mail.gandi.net (Postfix) with ESMTPSA id 38BE860006;
- Tue, 23 Jun 2020 14:35:19 +0000 (UTC)
-From: Antoine Tenart <antoine.tenart@bootlin.com>
-To: davem@davemloft.net, andrew@lunn.ch, f.fainelli@gmail.com,
- hkallweit1@gmail.com, richardcochran@gmail.com,
- alexandre.belloni@bootlin.com, UNGLinuxDriver@microchip.com
-Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
- thomas.petazzoni@bootlin.com, allan.nielsen@microchip.com,
- foss@0leil.net, antoine.tenart@bootlin.com
-Subject: [PATCH net-next v4 1/8] net: phy: add support for a common probe
- between shared PHYs
-Date: Tue, 23 Jun 2020 16:30:07 +0200
-Message-Id: <20200623143014.47864-2-antoine.tenart@bootlin.com>
-X-Mailer: git-send-email 2.26.2
-In-Reply-To: <20200623143014.47864-1-antoine.tenart@bootlin.com>
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-MIME-Version: 1.0
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-List-ID: <netdev.vger.kernel.org>
-X-Mailing-List: netdev@vger.kernel.org
-
-Shared PHYs (PHYs in the same hardware package) may have shared
-registers and their drivers would usually need to share information.
-There is currently a way to have a shared (part of the) init, by using
-phy_package_init_once(). This patch extends the logic to share parts of
-the probe to allow sharing the initialization of locks or resources
-retrieval.
-
-Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
-Reviewed-by: Andrew Lunn <andrew@lunn.ch>
----
- include/linux/phy.h | 18 +++++++++++++++---
- 1 file changed, 15 insertions(+), 3 deletions(-)
-
-diff --git a/include/linux/phy.h b/include/linux/phy.h
-index 9248dd2ce4ca..457489f1951c 100644
---- a/include/linux/phy.h
-+++ b/include/linux/phy.h
-@@ -244,7 +244,8 @@ struct phy_package_shared {
- };
-
- /* used as bit number in atomic bitops */
--#define PHY_SHARED_F_INIT_DONE 0
-+#define PHY_SHARED_F_INIT_DONE 0
-+#define PHY_SHARED_F_PROBE_DONE 1
-
- /*
- * The Bus class for PHYs. Devices which provide access to
-@@ -1558,14 +1559,25 @@ static inline int __phy_package_write(struct phy_device *phydev,
- return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
- }
-
--static inline bool phy_package_init_once(struct phy_device *phydev)
-+static inline bool __phy_package_set_once(struct phy_device *phydev,
-+ unsigned int b)
- {
- struct phy_package_shared *shared = phydev->shared;
-
- if (!shared)
- return false;
-
-- return !test_and_set_bit(PHY_SHARED_F_INIT_DONE, &shared->flags);
-+ return !test_and_set_bit(b, &shared->flags);
-+}
-+
-+static inline bool phy_package_init_once(struct phy_device *phydev)
-+{
-+ return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
-+}
-+
-+static inline bool phy_package_probe_once(struct phy_device *phydev)
-+{
-+ return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
- }
-
- extern struct bus_type mdio_bus_type;
\ No newline at end of file
diff --git a/target/linux/generic/backport-5.4/408-v5.7-mtd-nand-spi-rework-detect-procedure-for-different-read-id-op.patch b/target/linux/generic/backport-5.4/999-2310-v5.7-mtd-nand-spi-rework-detect-procedure-for-different-read-id-op.patch
similarity index 83%
rename from target/linux/generic/backport-5.4/408-v5.7-mtd-nand-spi-rework-detect-procedure-for-different-read-id-op.patch
rename to target/linux/generic/backport-5.4/999-2310-v5.7-mtd-nand-spi-rework-detect-procedure-for-different-read-id-op.patch
index e4e283c..f9c3542 100644
--- a/target/linux/generic/backport-5.4/408-v5.7-mtd-nand-spi-rework-detect-procedure-for-different-read-id-op.patch
+++ b/target/linux/generic/backport-5.4/999-2310-v5.7-mtd-nand-spi-rework-detect-procedure-for-different-read-id-op.patch
@@ -1,3 +1,22 @@
+From 0aeb63ff705a42b9140cad179ebe7f5fc54d285c Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:09 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2310-v5.7-mtd-nand-spi-rework-detect-procedure-for-different-read-id-op.patch]
+
+---
+ drivers/mtd/nand/spi/core.c | 86 ++++++++++++++++++++++---------
+ drivers/mtd/nand/spi/gigadevice.c | 45 +++++-----------
+ drivers/mtd/nand/spi/macronix.c | 30 +++--------
+ drivers/mtd/nand/spi/micron.c | 26 ++--------
+ drivers/mtd/nand/spi/paragon.c | 28 +++-------
+ drivers/mtd/nand/spi/toshiba.c | 42 +++++----------
+ drivers/mtd/nand/spi/winbond.c | 34 +++---------
+ include/linux/mtd/spinand.h | 66 ++++++++++++++++--------
+ 8 files changed, 155 insertions(+), 202 deletions(-)
+
+diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
+index 55e636efc..9f5f95ff7 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -16,6 +16,7 @@
@@ -23,7 +42,7 @@
int ret;
ret = spi_mem_exec_op(spinand->spimem, &op);
-@@ -760,24 +762,62 @@ static const struct spinand_manufacturer
+@@ -760,24 +762,62 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
&winbond_spinand_manufacturer,
};
@@ -95,7 +114,7 @@
static int spinand_manufacturer_init(struct spinand_device *spinand)
{
if (spinand->manufacturer->ops->init)
-@@ -833,9 +873,9 @@ spinand_select_op_variant(struct spinand
+@@ -833,9 +873,9 @@ spinand_select_op_variant(struct spinand_device *spinand,
* @spinand: SPI NAND object
* @table: SPI NAND device description table
* @table_size: size of the device description table
@@ -107,7 +126,7 @@
* entry in the SPI NAND description table. If a match is found, the spinand
* object will be initialized with information provided by the matching
* spinand_info entry.
-@@ -844,8 +884,10 @@ spinand_select_op_variant(struct spinand
+@@ -844,8 +884,10 @@ spinand_select_op_variant(struct spinand_device *spinand,
*/
int spinand_match_and_init(struct spinand_device *spinand,
const struct spinand_info *table,
@@ -119,7 +138,7 @@
struct nand_device *nand = spinand_to_nand(spinand);
unsigned int i;
-@@ -853,13 +895,17 @@ int spinand_match_and_init(struct spinan
+@@ -853,13 +895,17 @@ int spinand_match_and_init(struct spinand_device *spinand,
const struct spinand_info *info = &table[i];
const struct spi_mem_op *op;
@@ -138,7 +157,7 @@
spinand->select_target = table[i].select_target;
op = spinand_select_op_variant(spinand,
-@@ -896,13 +942,7 @@ static int spinand_detect(struct spinand
+@@ -896,13 +942,7 @@ static int spinand_detect(struct spinand_device *spinand)
if (ret)
return ret;
@@ -153,9 +172,11 @@
if (ret) {
dev_err(dev, "unknown raw ID %*phN\n", SPINAND_MAX_ID_LEN,
spinand->id.data);
+diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
+index b13b39763..a34c5ede1 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
-@@ -195,7 +195,8 @@ static int gd5fxgq4ufxxg_ecc_get_status(
+@@ -195,7 +195,8 @@ static int gd5fxgq4ufxxg_ecc_get_status(struct spinand_device *spinand,
}
static const struct spinand_info gigadevice_spinand_table[] = {
@@ -165,7 +186,7 @@
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -204,7 +205,8 @@ static const struct spinand_info gigadev
+@@ -204,7 +205,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
SPINAND_HAS_QE_BIT,
SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
gd5fxgq4xa_ecc_get_status)),
@@ -175,7 +196,7 @@
NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -213,7 +215,8 @@ static const struct spinand_info gigadev
+@@ -213,7 +215,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
SPINAND_HAS_QE_BIT,
SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
gd5fxgq4xa_ecc_get_status)),
@@ -185,7 +206,7 @@
NAND_MEMORG(1, 2048, 64, 64, 4096, 80, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -222,7 +225,8 @@ static const struct spinand_info gigadev
+@@ -222,7 +225,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
SPINAND_HAS_QE_BIT,
SPINAND_ECCINFO(&gd5fxgq4xa_ooblayout,
gd5fxgq4xa_ecc_get_status)),
@@ -195,7 +216,7 @@
NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -231,7 +235,8 @@ static const struct spinand_info gigadev
+@@ -231,7 +235,8 @@ static const struct spinand_info gigadevice_spinand_table[] = {
SPINAND_HAS_QE_BIT,
SPINAND_ECCINFO(&gd5fxgq4_variant2_ooblayout,
gd5fxgq4uexxg_ecc_get_status)),
@@ -205,7 +226,7 @@
NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants_f,
-@@ -242,39 +247,13 @@ static const struct spinand_info gigadev
+@@ -242,39 +247,13 @@ static const struct spinand_info gigadevice_spinand_table[] = {
gd5fxgq4ufxxg_ecc_get_status)),
};
@@ -247,9 +268,11 @@
+ .nchips = ARRAY_SIZE(gigadevice_spinand_table),
.ops = &gigadevice_spinand_manuf_ops,
};
+diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
+index 21def3f8f..0f900f3aa 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
-@@ -99,7 +99,8 @@ static int mx35lf1ge4ab_ecc_get_status(s
+@@ -99,7 +99,8 @@ static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,
}
static const struct spinand_info macronix_spinand_table[] = {
@@ -259,7 +282,7 @@
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
NAND_ECCREQ(4, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -108,7 +109,8 @@ static const struct spinand_info macroni
+@@ -108,7 +109,8 @@ static const struct spinand_info macronix_spinand_table[] = {
SPINAND_HAS_QE_BIT,
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
@@ -269,7 +292,7 @@
NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
NAND_ECCREQ(4, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -118,33 +120,13 @@ static const struct spinand_info macroni
+@@ -118,33 +120,13 @@ static const struct spinand_info macronix_spinand_table[] = {
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
};
@@ -305,9 +328,11 @@
+ .nchips = ARRAY_SIZE(macronix_spinand_table),
.ops = ¯onix_spinand_manuf_ops,
};
+diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
+index 7d7b1f7fc..f56f81325 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
-@@ -91,7 +91,8 @@ static int mt29f2g01abagd_ecc_get_status
+@@ -91,7 +91,8 @@ static int mt29f2g01abagd_ecc_get_status(struct spinand_device *spinand,
}
static const struct spinand_info micron_spinand_table[] = {
@@ -317,7 +342,7 @@
NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -102,32 +103,13 @@ static const struct spinand_info micron_
+@@ -102,32 +103,13 @@ static const struct spinand_info micron_spinand_table[] = {
mt29f2g01abagd_ecc_get_status)),
};
@@ -352,9 +377,11 @@
+ .nchips = ARRAY_SIZE(micron_spinand_table),
.ops = µn_spinand_manuf_ops,
};
+diff --git a/drivers/mtd/nand/spi/paragon.c b/drivers/mtd/nand/spi/paragon.c
+index 52307681c..519ade513 100644
--- a/drivers/mtd/nand/spi/paragon.c
+++ b/drivers/mtd/nand/spi/paragon.c
-@@ -97,7 +97,8 @@ static const struct mtd_ooblayout_ops pn
+@@ -97,7 +97,8 @@ static const struct mtd_ooblayout_ops pn26g0xa_ooblayout = {
static const struct spinand_info paragon_spinand_table[] = {
@@ -364,7 +391,7 @@
NAND_MEMORG(1, 2048, 128, 64, 1024, 21, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -106,7 +107,8 @@ static const struct spinand_info paragon
+@@ -106,7 +107,8 @@ static const struct spinand_info paragon_spinand_table[] = {
0,
SPINAND_ECCINFO(&pn26g0xa_ooblayout,
pn26g0xa_ecc_get_status)),
@@ -374,7 +401,7 @@
NAND_MEMORG(1, 2048, 128, 64, 2048, 41, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -117,31 +119,13 @@ static const struct spinand_info paragon
+@@ -117,31 +119,13 @@ static const struct spinand_info paragon_spinand_table[] = {
pn26g0xa_ecc_get_status)),
};
@@ -408,9 +435,11 @@
+ .nchips = ARRAY_SIZE(paragon_spinand_table),
.ops = ¶gon_spinand_manuf_ops,
};
+diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
+index 1cb3760ff..35da3c6e9 100644
--- a/drivers/mtd/nand/spi/toshiba.c
+++ b/drivers/mtd/nand/spi/toshiba.c
-@@ -95,7 +95,8 @@ static int tc58cxgxsx_ecc_get_status(str
+@@ -95,7 +95,8 @@ static int tc58cxgxsx_ecc_get_status(struct spinand_device *spinand,
static const struct spinand_info toshiba_spinand_table[] = {
/* 3.3V 1Gb */
@@ -420,7 +449,7 @@
NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -105,7 +106,8 @@ static const struct spinand_info toshiba
+@@ -105,7 +106,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
tc58cxgxsx_ecc_get_status)),
/* 3.3V 2Gb */
@@ -430,7 +459,7 @@
NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -115,7 +117,8 @@ static const struct spinand_info toshiba
+@@ -115,7 +117,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
tc58cxgxsx_ecc_get_status)),
/* 3.3V 4Gb */
@@ -440,7 +469,7 @@
NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -125,7 +128,8 @@ static const struct spinand_info toshiba
+@@ -125,7 +128,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
tc58cxgxsx_ecc_get_status)),
/* 1.8V 1Gb */
@@ -450,7 +479,7 @@
NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -135,7 +139,8 @@ static const struct spinand_info toshiba
+@@ -135,7 +139,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
tc58cxgxsx_ecc_get_status)),
/* 1.8V 2Gb */
@@ -460,7 +489,7 @@
NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -145,7 +150,8 @@ static const struct spinand_info toshiba
+@@ -145,7 +150,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
SPINAND_ECCINFO(&tc58cxgxsx_ooblayout,
tc58cxgxsx_ecc_get_status)),
/* 1.8V 4Gb */
@@ -470,7 +499,7 @@
NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
NAND_ECCREQ(8, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -156,33 +162,13 @@ static const struct spinand_info toshiba
+@@ -156,33 +162,13 @@ static const struct spinand_info toshiba_spinand_table[] = {
tc58cxgxsx_ecc_get_status)),
};
@@ -506,9 +535,11 @@
+ .nchips = ARRAY_SIZE(toshiba_spinand_table),
.ops = &toshiba_spinand_manuf_ops,
};
+diff --git a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
+index a6c17e0ca..766844283 100644
--- a/drivers/mtd/nand/spi/winbond.c
+++ b/drivers/mtd/nand/spi/winbond.c
-@@ -75,7 +75,8 @@ static int w25m02gv_select_target(struct
+@@ -75,7 +75,8 @@ static int w25m02gv_select_target(struct spinand_device *spinand,
}
static const struct spinand_info winbond_spinand_table[] = {
@@ -518,7 +549,7 @@
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 2),
NAND_ECCREQ(1, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -84,7 +85,8 @@ static const struct spinand_info winbond
+@@ -84,7 +85,8 @@ static const struct spinand_info winbond_spinand_table[] = {
0,
SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
SPINAND_SELECT_TARGET(w25m02gv_select_target)),
@@ -528,7 +559,7 @@
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
NAND_ECCREQ(1, 512),
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
-@@ -94,31 +96,6 @@ static const struct spinand_info winbond
+@@ -94,31 +96,6 @@ static const struct spinand_info winbond_spinand_table[] = {
SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
};
@@ -560,7 +591,7 @@
static int winbond_spinand_init(struct spinand_device *spinand)
{
struct nand_device *nand = spinand_to_nand(spinand);
-@@ -138,12 +115,13 @@ static int winbond_spinand_init(struct s
+@@ -138,12 +115,13 @@ static int winbond_spinand_init(struct spinand_device *spinand)
}
static const struct spinand_manufacturer_ops winbond_spinand_manuf_ops = {
@@ -575,6 +606,8 @@
+ .nchips = ARRAY_SIZE(winbond_spinand_table),
.ops = &winbond_spinand_manuf_ops,
};
+diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
+index 4ea558bd3..f4c4ae871 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -32,9 +32,9 @@
@@ -693,7 +726,7 @@
#define SPINAND_INFO_OP_VARIANTS(__read, __write, __update) \
{ \
.read_cache = __read, \
-@@ -451,9 +472,10 @@ static inline void spinand_set_of_node(s
+@@ -451,9 +472,10 @@ static inline void spinand_set_of_node(struct spinand_device *spinand,
nanddev_set_of_node(&spinand->base, np);
}
@@ -706,3 +739,6 @@
int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val);
int spinand_select_target(struct spinand_device *spinand, unsigned int target);
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/411-mtd-spinand-gigadevice-Support-GD5F1GQ5UExxG.patch b/target/linux/generic/backport-5.4/999-2311-mtd-spinand-gigadevice-Support-GD5F1GQ5UExxG.patch
similarity index 66%
rename from target/linux/generic/backport-5.4/411-mtd-spinand-gigadevice-Support-GD5F1GQ5UExxG.patch
rename to target/linux/generic/backport-5.4/999-2311-mtd-spinand-gigadevice-Support-GD5F1GQ5UExxG.patch
index d4e9497..e3e81e5 100644
--- a/target/linux/generic/backport-5.4/411-mtd-spinand-gigadevice-Support-GD5F1GQ5UExxG.patch
+++ b/target/linux/generic/backport-5.4/999-2311-mtd-spinand-gigadevice-Support-GD5F1GQ5UExxG.patch
@@ -1,48 +1,15 @@
-From 469b992489852b500d39048aa0013639dfe9f2e6 Mon Sep 17 00:00:00 2001
-From: Reto Schneider <reto.schneider@husqvarnagroup.com>
-Date: Thu, 11 Feb 2021 12:36:19 +0100
-Subject: [PATCH] mtd: spinand: gigadevice: Support GD5F1GQ5UExxG
+From 2f8ed664925318dacb6a92ca6383b5589cc2f7e1 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:09 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2311-mtd-spinand-gigadevice-Support-GD5F1GQ5UExxG.patch]
-The relevant changes to the already existing GD5F1GQ4UExxG support has
-been determined by consulting the GigaDevice product change notice
-AN-0392-10, version 1.0 from November 30, 2020.
-
-As the overlaps are huge, variable names have been generalized
-accordingly.
-
-Apart from the lowered ECC strength (4 instead of 8 bits per 512 bytes),
-the new device ID, and the extra quad IO dummy byte, no changes had to
-be taken into account.
-
-New hardware features are not supported, namely:
- - Power on reset
- - Unique ID
- - Double transfer rate (DTR)
- - Parameter page
- - Random data quad IO
-
-The inverted semantic of the "driver strength" register bits, defaulting
-to 100% instead of 50% for the Q5 devices, got ignored as the driver has
-never touched them anyway.
-
-The no longer supported "read from cache during block erase"
-functionality is not reflected as the current SPI NAND core does not
-support it anyway.
-
-Implementation has been tested on MediaTek MT7688 based GARDENA smart
-Gateways using both, GigaDevice GD5F1GQ5UEYIG and GD5F1GQ4UBYIG.
-
-Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
-Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
-Reviewed-by: Stefan Roese <sr@denx.de>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20210211113619.3502-1-code@reto-schneider.ch
---
drivers/mtd/nand/spi/gigadevice.c | 69 +++++++++++++++++++++++++++----
1 file changed, 60 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
-index 33c67403c4aa1e..1dd1c589809341 100644
+index a34c5ede1..937a04ce6 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -13,7 +13,10 @@
@@ -75,7 +42,7 @@
struct mtd_oob_region *region)
{
if (section)
-@@ -127,9 +130,10 @@ static int gd5fxgq4_variant2_ooblayout_free(struct mtd_info *mtd, int section,
+@@ -127,16 +130,17 @@ static int gd5fxgq4_variant2_ooblayout_free(struct mtd_info *mtd, int section,
return 0;
}
@@ -88,8 +55,7 @@
+ .free = gd5fxgqx_variant2_ooblayout_free,
};
- static int gd5fxgq4xc_ooblayout_256_ecc(struct mtd_info *mtd, int section,
-@@ -165,7 +169,7 @@ static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand,
+ static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand,
u8 status)
{
u8 status2;
@@ -98,7 +64,7 @@
&status2);
int ret;
-@@ -203,6 +207,43 @@ static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand,
+@@ -174,6 +178,43 @@ static int gd5fxgq4uexxg_ecc_get_status(struct spinand_device *spinand,
return -EINVAL;
}
@@ -142,7 +108,7 @@
static int gd5fxgq4ufxxg_ecc_get_status(struct spinand_device *spinand,
u8 status)
{
-@@ -282,7 +323,7 @@ static const struct spinand_info gigadevice_spinand_table[] = {
+@@ -233,7 +274,7 @@ static const struct spinand_info gigadevice_spinand_table[] = {
&write_cache_variants,
&update_cache_variants),
SPINAND_HAS_QE_BIT,
@@ -151,7 +117,7 @@
gd5fxgq4uexxg_ecc_get_status)),
SPINAND_INFO("GD5F1GQ4UFxxG",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE, 0xb1, 0x48),
-@@ -292,8 +333,18 @@ static const struct spinand_info gigadevice_spinand_table[] = {
+@@ -243,8 +284,18 @@ static const struct spinand_info gigadevice_spinand_table[] = {
&write_cache_variants,
&update_cache_variants),
SPINAND_HAS_QE_BIT,
@@ -171,3 +137,6 @@
};
static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = {
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/999-2312-mtd-spinand-macronix-Add-support-for-MX31LF1GE4BC.patch b/target/linux/generic/backport-5.4/999-2312-mtd-spinand-macronix-Add-support-for-MX31LF1GE4BC.patch
new file mode 100644
index 0000000..d55e946
--- /dev/null
+++ b/target/linux/generic/backport-5.4/999-2312-mtd-spinand-macronix-Add-support-for-MX31LF1GE4BC.patch
@@ -0,0 +1,34 @@
+From 9c8aa0697168dac0ad3638dc075c25087d4ee19c Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:10 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2312-mtd-spinand-macronix-Add-support-for-MX31LF1GE4BC.patch]
+
+---
+ drivers/mtd/nand/spi/macronix.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
+index 0f900f3aa..6e66d8710 100644
+--- a/drivers/mtd/nand/spi/macronix.c
++++ b/drivers/mtd/nand/spi/macronix.c
+@@ -118,6 +118,16 @@ static const struct spinand_info macronix_spinand_table[] = {
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
++ SPINAND_INFO("MX31LF1GE4BC",
++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e),
++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
++ NAND_ECCREQ(8, 512),
++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++ &write_cache_variants,
++ &update_cache_variants),
++ 0 /*SPINAND_HAS_QE_BIT*/,
++ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
++ mx35lf1ge4ab_ecc_get_status)),
+ };
+
+ static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/999-2313-mtd-spinand-macronix-Add-support-for-MX31UF1GE4BC.patch b/target/linux/generic/backport-5.4/999-2313-mtd-spinand-macronix-Add-support-for-MX31UF1GE4BC.patch
new file mode 100644
index 0000000..8dcf798
--- /dev/null
+++ b/target/linux/generic/backport-5.4/999-2313-mtd-spinand-macronix-Add-support-for-MX31UF1GE4BC.patch
@@ -0,0 +1,34 @@
+From 34485df92908238e8603d2c9de486e7c41db45fb Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:10 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2313-mtd-spinand-macronix-Add-support-for-MX31UF1GE4BC.patch]
+
+---
+ drivers/mtd/nand/spi/macronix.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
+index 6e66d8710..4964fe35b 100644
+--- a/drivers/mtd/nand/spi/macronix.c
++++ b/drivers/mtd/nand/spi/macronix.c
+@@ -128,6 +128,16 @@ static const struct spinand_info macronix_spinand_table[] = {
+ 0 /*SPINAND_HAS_QE_BIT*/,
+ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
+ mx35lf1ge4ab_ecc_get_status)),
++ SPINAND_INFO("MX31UF1GE4BC",
++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x9e),
++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
++ NAND_ECCREQ(8, 512),
++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
++ &write_cache_variants,
++ &update_cache_variants),
++ 0 /*SPINAND_HAS_QE_BIT*/,
++ SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
++ mx35lf1ge4ab_ecc_get_status)),
+ };
+
+ static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/432-mtd-spinand-macronix-Add-support-for-MX35LFxGE4AD.patch b/target/linux/generic/backport-5.4/999-2314-mtd-spinand-macronix-Add-support-for-MX35LFxGE4AD.patch
similarity index 63%
rename from target/linux/generic/backport-5.4/432-mtd-spinand-macronix-Add-support-for-MX35LFxGE4AD.patch
rename to target/linux/generic/backport-5.4/999-2314-mtd-spinand-macronix-Add-support-for-MX35LFxGE4AD.patch
index 313b373..eaa9851 100644
--- a/target/linux/generic/backport-5.4/432-mtd-spinand-macronix-Add-support-for-MX35LFxGE4AD.patch
+++ b/target/linux/generic/backport-5.4/999-2314-mtd-spinand-macronix-Add-support-for-MX35LFxGE4AD.patch
@@ -1,27 +1,18 @@
-From 5ece78de88739b4c68263e9f2582380c1fd8314f Mon Sep 17 00:00:00 2001
-From: YouChing Lin <ycllin@mxic.com.tw>
-Date: Thu, 5 Nov 2020 15:23:40 +0800
-Subject: [PATCH] mtd: spinand: macronix: Add support for MX35LFxGE4AD
+From 14f6824f11e1167bf2cbbd650cd6a7a2ad856555 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:10 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2314-mtd-spinand-macronix-Add-support-for-MX35LFxGE4AD.patch]
-The Macronix MX35LF2GE4AD / MX35LF4GE4AD are 3V, 2G / 4Gbit serial
-SLC NAND flash device (with on-die ECC).
-
-Validated by read, erase, read back, write, read back and nandtest
-on Xilinx Zynq PicoZed FPGA board which included Macronix SPI Host
-(drivers/spi/spi-mxic.c).
-
-Signed-off-by: YouChing Lin <ycllin@mxic.com.tw>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/1604561020-13499-1-git-send-email-ycllin@mxic.com.tw
---
drivers/mtd/nand/spi/macronix.c | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
-index 8e801e4c3a006f..3786b1b03b3b4b 100644
+index 4964fe35b..16d2acafb 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
-@@ -119,6 +119,26 @@ static const struct spinand_info macronix_spinand_table[] = {
+@@ -118,6 +118,26 @@ static const struct spinand_info macronix_spinand_table[] = {
&update_cache_variants),
SPINAND_HAS_QE_BIT,
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
@@ -48,3 +39,6 @@
SPINAND_INFO("MX31LF1GE4BC",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e),
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/433-mtd-spinand-macronix-Add-support-for-MX35LFxG24AD.patch b/target/linux/generic/backport-5.4/999-2315-mtd-spinand-macronix-Add-support-for-MX35LFxG24AD.patch
similarity index 64%
rename from target/linux/generic/backport-5.4/433-mtd-spinand-macronix-Add-support-for-MX35LFxG24AD.patch
rename to target/linux/generic/backport-5.4/999-2315-mtd-spinand-macronix-Add-support-for-MX35LFxG24AD.patch
index e323a53..41b540c 100644
--- a/target/linux/generic/backport-5.4/433-mtd-spinand-macronix-Add-support-for-MX35LFxG24AD.patch
+++ b/target/linux/generic/backport-5.4/999-2315-mtd-spinand-macronix-Add-support-for-MX35LFxG24AD.patch
@@ -1,28 +1,18 @@
-From ee4e0eafa43cfd9008722fe15e17b8bf62fb6e8d Mon Sep 17 00:00:00 2001
-From: YouChing Lin <ycllin@mxic.com.tw>
-Date: Thu, 10 Dec 2020 11:22:09 +0800
-Subject: [PATCH] mtd: spinand: macronix: Add support for MX35LFxG24AD
+From 1de538322f8e3b2586d5b41bdcc0383ecba9ce32 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:10 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2315-mtd-spinand-macronix-Add-support-for-MX35LFxG24AD.patch]
-The Macronix MX35LF1G24AD(/2G24AD/4G24AD) are 3V, 1G/2G/4Gbit serial
-SLC NAND flash device (without on-die ECC).
-
-Validated by read, erase, read back, write, read back on Xilinx Zynq
-PicoZed FPGA board which included Macronix SPI Host(drivers/spi/spi-mxic.c)
-& S/W BCH ecc(drivers/mtd/nand/ecc-sw-bch.c) with bug fixing patch
-(mtd: nand: ecc-bch: Fix the size of calc_buf/code_buf of the BCH).
-
-Signed-off-by: YouChing Lin <ycllin@mxic.com.tw>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/1607570529-22341-3-git-send-email-ycllin@mxic.com.tw
---
drivers/mtd/nand/spi/macronix.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
-index 3786b1b03b3b4b..6701aaa21a49df 100644
+index 16d2acafb..e0c71c654 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
-@@ -139,6 +139,33 @@ static const struct spinand_info macronix_spinand_table[] = {
+@@ -138,6 +138,33 @@ static const struct spinand_info macronix_spinand_table[] = {
0,
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
@@ -56,3 +46,6 @@
SPINAND_INFO("MX31LF1GE4BC",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e),
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/434-mtd-spinand-macronix-Add-support-for-serial-NAND-flash.patch b/target/linux/generic/backport-5.4/999-2316-mtd-spinand-macronix-Add-support-for-serial-NAND-flash.patch
similarity index 72%
rename from target/linux/generic/backport-5.4/434-mtd-spinand-macronix-Add-support-for-serial-NAND-flash.patch
rename to target/linux/generic/backport-5.4/999-2316-mtd-spinand-macronix-Add-support-for-serial-NAND-flash.patch
index 9900084..fbcca17 100644
--- a/target/linux/generic/backport-5.4/434-mtd-spinand-macronix-Add-support-for-serial-NAND-flash.patch
+++ b/target/linux/generic/backport-5.4/999-2316-mtd-spinand-macronix-Add-support-for-serial-NAND-flash.patch
@@ -1,55 +1,18 @@
-From c374839f9b4475173e536d1eaddff45cb481dbdf Mon Sep 17 00:00:00 2001
-From: Jaime Liao <jaimeliao@mxic.com.tw>
-Date: Thu, 20 May 2021 09:45:08 +0800
-Subject: [PATCH] mtd: spinand: macronix: Add support for serial NAND flash
+From 3b7dc97f2ff2d354c7f624d4d04fd5dd8595c923 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:11 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2316-mtd-spinand-macronix-Add-support-for-serial-NAND-flash.patch]
-Macronix NAND Flash devices are available in different configurations
-and densities.
-
-MX"35" means SPI NAND
-MX35"LF"/"UF" , LF means 3V and UF meands 1.8V
-MX35LF"2G" , 2G means 2Gbits
-MX35LF2G"E4"/"24"/"14",
-E4 means internal ECC and Quad I/O(x4)
-24 means 8-bit ecc requirement and Quad I/O(x4)
-14 means 4-bit ecc requirement and Quad I/O(x4)
-
-MX35LF2G14AC is 3V 2Gbit serial NAND flash device
-(without on-die ECC)
-https://www.mxic.com.tw/Lists/Datasheet/Attachments/7926/MX35LF2G14AC,%203V,%202Gb,%20v1.1.pdf
-
-MX35UF4G24AD is 1.8V 4Gbit serial NAND flash device
-(without on-die ECC)
-https://www.mxic.com.tw/Lists/Datasheet/Attachments/7980/MX35UF4G24AD,%201.8V,%204Gb,%20v0.00.pdf
-
-MX35UF4GE4AD/MX35UF2GE4AD are 1.8V 4G/2Gbit serial
-NAND flash device with 8-bit on-die ECC
-https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
-
-MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
-NAND flash device with 8-bit on-die ECC
-https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
-
-MX35UF2G14AC/MX35UF1G14AC are 1.8V 2G/1Gbit serial
-NAND flash device (without on-die ECC)
-https://www.mxic.com.tw/Lists/Datasheet/Attachments/7931/MX35UF2G14AC,%201.8V,%202Gb,%20v1.1.pdf
-
-Validated via normal(default) and QUAD mode by read, erase, read back,
-on Xilinx Zynq PicoZed FPGA board which included Macronix
-SPI Host(drivers/spi/spi-mxic.c).
-
-Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/1621475108-22523-1-git-send-email-jaimeliao@mxic.com.tw
---
drivers/mtd/nand/spi/macronix.c | 112 ++++++++++++++++++++++++++++++++
1 file changed, 112 insertions(+)
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
-index 6701aaa21a49df..a9890350db0293 100644
+index e0c71c654..ede66b71b 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
-@@ -186,6 +186,118 @@ static const struct spinand_info macronix_spinand_table[] = {
+@@ -185,6 +185,118 @@ static const struct spinand_info macronix_spinand_table[] = {
0 /*SPINAND_HAS_QE_BIT*/,
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
@@ -168,3 +131,6 @@
};
static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/435-mtd-spinand-macronix-Add-Quad-support-for-serial-NAND-flash.patch b/target/linux/generic/backport-5.4/999-2317-mtd-spinand-macronix-Add-Quad-support-for-serial-NAND-flash.patch
similarity index 70%
rename from target/linux/generic/backport-5.4/435-mtd-spinand-macronix-Add-Quad-support-for-serial-NAND-flash.patch
rename to target/linux/generic/backport-5.4/999-2317-mtd-spinand-macronix-Add-Quad-support-for-serial-NAND-flash.patch
index cc6900a..bcc9df8 100644
--- a/target/linux/generic/backport-5.4/435-mtd-spinand-macronix-Add-Quad-support-for-serial-NAND-flash.patch
+++ b/target/linux/generic/backport-5.4/999-2317-mtd-spinand-macronix-Add-Quad-support-for-serial-NAND-flash.patch
@@ -1,27 +1,18 @@
-From 6f802696c2faf0119781fc3b7977a4eedf9ab239 Mon Sep 17 00:00:00 2001
-From: Jaime Liao <jaimeliao@mxic.com.tw>
-Date: Mon, 9 Aug 2021 09:27:52 +0800
-Subject: [PATCH] mtd: spinand: macronix: Add Quad support for serial NAND
- flash
+From ec328d836a28d538c38f67f5467b9319d6a950a3 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:11 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2317-mtd-spinand-macronix-Add-Quad-support-for-serial-NAND-flash.patch]
-Adding FLAG "SPINAND_HAS_QE_BIT" for Quad mode support on Macronix
-Serial Flash.
-Validated via normal(default) and QUAD mode by read, erase, read back,
-on Xilinx Zynq PicoZed FPGA board which included Macronix
-SPI Host(drivers/spi/spi-mxic.c).
-
-Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/1628472472-32008-1-git-send-email-jaimeliao@mxic.com.tw
---
drivers/mtd/nand/spi/macronix.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/mtd/nand/spi/macronix.c b/drivers/mtd/nand/spi/macronix.c
-index a9890350db0293..3f31f1381a62c0 100644
+index ede66b71b..25319b4f8 100644
--- a/drivers/mtd/nand/spi/macronix.c
+++ b/drivers/mtd/nand/spi/macronix.c
-@@ -126,7 +126,7 @@ static const struct spinand_info macronix_spinand_table[] = {
+@@ -125,7 +125,7 @@ static const struct spinand_info macronix_spinand_table[] = {
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
@@ -30,7 +21,7 @@
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
SPINAND_INFO("MX35LF4GE4AD",
-@@ -136,7 +136,7 @@ static const struct spinand_info macronix_spinand_table[] = {
+@@ -135,7 +135,7 @@ static const struct spinand_info macronix_spinand_table[] = {
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
@@ -39,7 +30,7 @@
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
SPINAND_INFO("MX35LF1G24AD",
-@@ -146,16 +146,16 @@ static const struct spinand_info macronix_spinand_table[] = {
+@@ -145,16 +145,16 @@ static const struct spinand_info macronix_spinand_table[] = {
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
@@ -59,7 +50,7 @@
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
SPINAND_INFO("MX35LF4G24AD",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x35),
-@@ -164,7 +164,7 @@ static const struct spinand_info macronix_spinand_table[] = {
+@@ -163,7 +163,7 @@ static const struct spinand_info macronix_spinand_table[] = {
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
@@ -68,7 +59,7 @@
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
SPINAND_INFO("MX31LF1GE4BC",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x1e),
-@@ -173,7 +173,7 @@ static const struct spinand_info macronix_spinand_table[] = {
+@@ -172,7 +172,7 @@ static const struct spinand_info macronix_spinand_table[] = {
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
@@ -77,7 +68,7 @@
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
SPINAND_INFO("MX31UF1GE4BC",
-@@ -183,7 +183,7 @@ static const struct spinand_info macronix_spinand_table[] = {
+@@ -182,7 +182,7 @@ static const struct spinand_info macronix_spinand_table[] = {
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
&write_cache_variants,
&update_cache_variants),
@@ -86,3 +77,6 @@
SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
mx35lf1ge4ab_ecc_get_status)),
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/450-mtd-spinand-micron-Generalize-the-OOB-layout-structure-and-function-names.patch b/target/linux/generic/backport-5.4/999-2318-mtd-spinand-micron-Generalize-the-OOB-layout-structure-and-function-names.patch
similarity index 77%
rename from target/linux/generic/backport-5.4/450-mtd-spinand-micron-Generalize-the-OOB-layout-structure-and-function-names.patch
rename to target/linux/generic/backport-5.4/999-2318-mtd-spinand-micron-Generalize-the-OOB-layout-structure-and-function-names.patch
index b4fcfbc..2e888d3 100644
--- a/target/linux/generic/backport-5.4/450-mtd-spinand-micron-Generalize-the-OOB-layout-structure-and-function-names.patch
+++ b/target/linux/generic/backport-5.4/999-2318-mtd-spinand-micron-Generalize-the-OOB-layout-structure-and-function-names.patch
@@ -1,22 +1,15 @@
-From d3137043440fb1faaaf2481184f35b9ed0c1f2c2 Mon Sep 17 00:00:00 2001
-From: Shivamurthy Shastri <sshivamurthy@micron.com>
-Date: Wed, 11 Mar 2020 18:57:30 +0100
-Subject: [PATCH] mtd: spinand: micron: Generalize the OOB layout structure and
- function names
+From aebf853ada4f73280d4cf7a1799cb0ebf84f87e1 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:11 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2318-mtd-spinand-micron-Generalize-the-OOB-layout-structure-and-function-names.patch]
-In order to add new Micron SPI NAND devices, we generalized the OOB
-layout structure and function names.
-
-Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-2-sshivamurthy@micron.com
---
drivers/mtd/nand/spi/micron.c | 28 ++++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
-index f56f81325e10ac..cc1ee68421c8e1 100644
+index f56f81325..cc1ee6842 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -34,38 +34,38 @@ static SPINAND_OP_VARIANTS(update_cache_variants,
@@ -81,3 +74,6 @@
};
static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/999-2319-mtd-spinand-micron-Describe-the-SPI-NAND-device-MT29F2G01ABAGD.patch b/target/linux/generic/backport-5.4/999-2319-mtd-spinand-micron-Describe-the-SPI-NAND-device-MT29F2G01ABAGD.patch
new file mode 100644
index 0000000..3ff682b
--- /dev/null
+++ b/target/linux/generic/backport-5.4/999-2319-mtd-spinand-micron-Describe-the-SPI-NAND-device-MT29F2G01ABAGD.patch
@@ -0,0 +1,25 @@
+From 59766b3af8f603e740c38d2cc03c37226c78bb11 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:11 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2319-mtd-spinand-micron-Describe-the-SPI-NAND-device-MT29F2G01ABAGD.patch]
+
+---
+ drivers/mtd/nand/spi/micron.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
+index cc1ee6842..4727933c8 100644
+--- a/drivers/mtd/nand/spi/micron.c
++++ b/drivers/mtd/nand/spi/micron.c
+@@ -91,6 +91,7 @@ static int micron_8_ecc_get_status(struct spinand_device *spinand,
+ }
+
+ static const struct spinand_info micron_spinand_table[] = {
++ /* M79A 2Gb 3.3V */
+ SPINAND_INFO("MT29F2G01ABAGD",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x24),
+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/452-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices.patch b/target/linux/generic/backport-5.4/999-2320-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices.patch
similarity index 75%
rename from target/linux/generic/backport-5.4/452-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices.patch
rename to target/linux/generic/backport-5.4/999-2320-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices.patch
index be3a3b1..4c5e911 100644
--- a/target/linux/generic/backport-5.4/452-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices.patch
+++ b/target/linux/generic/backport-5.4/999-2320-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices.patch
@@ -1,20 +1,15 @@
-From a15335a17f4abf48ed9739c3b119232f9392cb60 Mon Sep 17 00:00:00 2001
-From: Shivamurthy Shastri <sshivamurthy@micron.com>
-Date: Wed, 11 Mar 2020 18:57:32 +0100
-Subject: [PATCH] mtd: spinand: micron: Add new Micron SPI NAND devices
+From 66ea40f7c5b196eee609c5e3322aac3a7ac59e03 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:12 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2320-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices.patch]
-Add device table for M79A and M78A series Micron SPI NAND devices.
-
-Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-4-sshivamurthy@micron.com
---
drivers/mtd/nand/spi/micron.c | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
-index 4727933c894bc8..26925714a9fbac 100644
+index 4727933c8..26925714a 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -102,6 +102,39 @@ static const struct spinand_info micron_spinand_table[] = {
@@ -57,3 +52,6 @@
};
static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/999-2321-mtd-spinand-micron-identify-SPI-NAND-device-with-Continuous-Read-mode.patch b/target/linux/generic/backport-5.4/999-2321-mtd-spinand-micron-identify-SPI-NAND-device-with-Continuous-Read-mode.patch
new file mode 100644
index 0000000..ae7ac72
--- /dev/null
+++ b/target/linux/generic/backport-5.4/999-2321-mtd-spinand-micron-identify-SPI-NAND-device-with-Continuous-Read-mode.patch
@@ -0,0 +1,61 @@
+From 65c3b878a33bb7edd5413860537fecdff94aaba6 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:12 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2321-mtd-spinand-micron-identify-SPI-NAND-device-with-Continuous-Read-mode.patch]
+
+---
+ drivers/mtd/nand/spi/micron.c | 16 ++++++++++++++++
+ include/linux/mtd/spinand.h | 1 +
+ 2 files changed, 17 insertions(+)
+
+diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
+index 26925714a..956f7710a 100644
+--- a/drivers/mtd/nand/spi/micron.c
++++ b/drivers/mtd/nand/spi/micron.c
+@@ -18,6 +18,8 @@
+ #define MICRON_STATUS_ECC_4TO6_BITFLIPS (3 << 4)
+ #define MICRON_STATUS_ECC_7TO8_BITFLIPS (5 << 4)
+
++#define MICRON_CFG_CR BIT(0)
++
+ static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+@@ -137,7 +139,21 @@ static const struct spinand_info micron_spinand_table[] = {
+ micron_8_ecc_get_status)),
+ };
+
++static int micron_spinand_init(struct spinand_device *spinand)
++{
++ /*
++ * M70A device series enable Continuous Read feature at Power-up,
++ * which is not supported. Disable this bit to avoid any possible
++ * failure.
++ */
++ if (spinand->flags & SPINAND_HAS_CR_FEAT_BIT)
++ return spinand_upd_cfg(spinand, MICRON_CFG_CR, 0);
++
++ return 0;
++}
++
+ static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = {
++ .init = micron_spinand_init,
+ };
+
+ const struct spinand_manufacturer micron_spinand_manufacturer = {
+diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
+index f4c4ae871..1077c4572 100644
+--- a/include/linux/mtd/spinand.h
++++ b/include/linux/mtd/spinand.h
+@@ -284,6 +284,7 @@ struct spinand_ecc_info {
+ };
+
+ #define SPINAND_HAS_QE_BIT BIT(0)
++#define SPINAND_HAS_CR_FEAT_BIT BIT(1)
+
+ /**
+ * struct spinand_info - Structure used to describe SPI NAND chips
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/454-mtd-spinand-micron-Add-M70A-series-Micron-SPI-NAND-devices.patch b/target/linux/generic/backport-5.4/999-2322-mtd-spinand-micron-Add-M70A-series-Micron-SPI-NAND-devices.patch
similarity index 70%
rename from target/linux/generic/backport-5.4/454-mtd-spinand-micron-Add-M70A-series-Micron-SPI-NAND-devices.patch
rename to target/linux/generic/backport-5.4/999-2322-mtd-spinand-micron-Add-M70A-series-Micron-SPI-NAND-devices.patch
index 158492f..426d674 100644
--- a/target/linux/generic/backport-5.4/454-mtd-spinand-micron-Add-M70A-series-Micron-SPI-NAND-devices.patch
+++ b/target/linux/generic/backport-5.4/999-2322-mtd-spinand-micron-Add-M70A-series-Micron-SPI-NAND-devices.patch
@@ -1,20 +1,15 @@
-From a7e5daccc310c3b892ae5e598cadb7a9274c2547 Mon Sep 17 00:00:00 2001
-From: Shivamurthy Shastri <sshivamurthy@micron.com>
-Date: Wed, 11 Mar 2020 18:57:34 +0100
-Subject: [PATCH] mtd: spinand: micron: Add M70A series Micron SPI NAND devices
+From 5a4cd6ba8f7ae6744ca44f78c761f26e843c0341 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:12 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2322-mtd-spinand-micron-Add-M70A-series-Micron-SPI-NAND-devices.patch]
-Add device table for M70A series Micron SPI NAND devices.
-
-Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-6-sshivamurthy@micron.com
---
drivers/mtd/nand/spi/micron.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
-index 956f7710aca263..d6fd630087822c 100644
+index 956f7710a..d6fd63008 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -137,6 +137,28 @@ static const struct spinand_info micron_spinand_table[] = {
@@ -46,3 +41,6 @@
};
static int micron_spinand_init(struct spinand_device *spinand)
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/455-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices-with-multiple-dies.patch b/target/linux/generic/backport-5.4/999-2323-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices-with-multiple-dies.patch
similarity index 83%
rename from target/linux/generic/backport-5.4/455-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices-with-multiple-dies.patch
rename to target/linux/generic/backport-5.4/999-2323-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices-with-multiple-dies.patch
index 8f8f1da..2e0a356 100644
--- a/target/linux/generic/backport-5.4/455-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices-with-multiple-dies.patch
+++ b/target/linux/generic/backport-5.4/999-2323-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices-with-multiple-dies.patch
@@ -1,24 +1,15 @@
-From 9f9ae0c253c1e058fbc845e26c4a32a7d777f0dc Mon Sep 17 00:00:00 2001
-From: Shivamurthy Shastri <sshivamurthy@micron.com>
-Date: Wed, 11 Mar 2020 18:57:35 +0100
-Subject: [PATCH] mtd: spinand: micron: Add new Micron SPI NAND devices with
- multiple dies
+From ac7be09336555cf993d904bd9e42c05d1769288a Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:12 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2323-mtd-spinand-micron-Add-new-Micron-SPI-NAND-devices-with-multiple-dies.patch]
-Add device table for new Micron SPI NAND devices, which have multiple
-dies.
-
-Also, enable support to select the dies.
-
-Signed-off-by: Shivamurthy Shastri <sshivamurthy@micron.com>
-Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20200311175735.2007-7-sshivamurthy@micron.com
---
drivers/mtd/nand/spi/micron.c | 58 +++++++++++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
-index d6fd630087822c..5d370cfcdaaaa9 100644
+index d6fd63008..5d370cfcd 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -20,6 +20,14 @@
@@ -107,3 +98,6 @@
};
static int micron_spinand_init(struct spinand_device *spinand)
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/456-mtd-spinand-micron-Use-more-specific-names.patch b/target/linux/generic/backport-5.4/999-2324-mtd-spinand-micron-Use-more-specific-names.patch
similarity index 92%
rename from target/linux/generic/backport-5.4/456-mtd-spinand-micron-Use-more-specific-names.patch
rename to target/linux/generic/backport-5.4/999-2324-mtd-spinand-micron-Use-more-specific-names.patch
index ec03ffe..e397967 100644
--- a/target/linux/generic/backport-5.4/456-mtd-spinand-micron-Use-more-specific-names.patch
+++ b/target/linux/generic/backport-5.4/999-2324-mtd-spinand-micron-Use-more-specific-names.patch
@@ -1,20 +1,15 @@
-From bdb84a22b02b0c2ca76bb3e3e16942338f67999b Mon Sep 17 00:00:00 2001
-From: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com>
-Date: Sun, 8 Nov 2020 19:37:34 +0800
-Subject: [PATCH] mtd: spinand: micron: Use more specific names
+From 5abef195abf3faa6f8e22a2e6996316f14c4f21c Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:13 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2324-mtd-spinand-micron-Use-more-specific-names.patch]
-Rename the read/write/update of SPINAND_OP_VARIANTS() to more
-specialized names.
-
-Signed-off-by: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20201108113735.2533-2-nthirumalesha7@gmail.com
---
drivers/mtd/nand/spi/micron.c | 60 +++++++++++++++++------------------
1 file changed, 30 insertions(+), 30 deletions(-)
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
-index 5d370cfcdaaaa9..afe3ba37dcfb8e 100644
+index 5d370cfcd..afe3ba37d 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -28,7 +28,7 @@
@@ -157,3 +152,6 @@
SPINAND_HAS_CR_FEAT_BIT,
SPINAND_ECCINFO(µn_8_ooblayout,
micron_8_ecc_get_status),
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/457-mtd-spinand-micron-Add-support-for-MT29F2G01AAAED.patch b/target/linux/generic/backport-5.4/999-2325-mtd-spinand-micron-Add-support-for-MT29F2G01AAAED.patch
similarity index 83%
rename from target/linux/generic/backport-5.4/457-mtd-spinand-micron-Add-support-for-MT29F2G01AAAED.patch
rename to target/linux/generic/backport-5.4/999-2325-mtd-spinand-micron-Add-support-for-MT29F2G01AAAED.patch
index ecd2b71..b6914ce 100644
--- a/target/linux/generic/backport-5.4/457-mtd-spinand-micron-Add-support-for-MT29F2G01AAAED.patch
+++ b/target/linux/generic/backport-5.4/999-2325-mtd-spinand-micron-Add-support-for-MT29F2G01AAAED.patch
@@ -1,20 +1,15 @@
-From 8c573d9419bf61f7b66b6114f1171f3a8a4a0e38 Mon Sep 17 00:00:00 2001
-From: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com>
-Date: Sun, 8 Nov 2020 19:37:35 +0800
-Subject: [PATCH] mtd: spinand: micron: Add support for MT29F2G01AAAED
+From 5cea72055a3bce2b8b5a1f8cb6d46165eeccd8b9 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:13 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2325-mtd-spinand-micron-Add-support-for-MT29F2G01AAAED.patch]
-The MT29F2G01AAAED is a single die, 2Gb Micron SPI NAND Flash with 4-bit
-ECC
-
-Signed-off-by: Thirumalesha Narasimhappa <nthirumalesha7@gmail.com>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20201108113735.2533-3-nthirumalesha7@gmail.com
---
drivers/mtd/nand/spi/micron.c | 64 +++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c
-index afe3ba37dcfb8e..50b7295bc92226 100644
+index afe3ba37d..50b7295bc 100644
--- a/drivers/mtd/nand/spi/micron.c
+++ b/drivers/mtd/nand/spi/micron.c
@@ -44,6 +44,19 @@ static SPINAND_OP_VARIANTS(x4_update_cache_variants,
@@ -102,3 +97,6 @@
};
static int micron_spinand_init(struct spinand_device *spinand)
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/470-mtd-spinand-toshiba-Rename-function-name-to-change-suffix-and-prefix-8Gbit.patch b/target/linux/generic/backport-5.4/999-2326-mtd-spinand-toshiba-Rename-function-name-to-change-suffix-and-prefix-8Gbit.patch
similarity index 73%
rename from target/linux/generic/backport-5.4/470-mtd-spinand-toshiba-Rename-function-name-to-change-suffix-and-prefix-8Gbit.patch
rename to target/linux/generic/backport-5.4/999-2326-mtd-spinand-toshiba-Rename-function-name-to-change-suffix-and-prefix-8Gbit.patch
index 80672e6..74bab62 100644
--- a/target/linux/generic/backport-5.4/470-mtd-spinand-toshiba-Rename-function-name-to-change-suffix-and-prefix-8Gbit.patch
+++ b/target/linux/generic/backport-5.4/999-2326-mtd-spinand-toshiba-Rename-function-name-to-change-suffix-and-prefix-8Gbit.patch
@@ -1,32 +1,18 @@
-From 6b49e58d6d9dab031a16af2af5439f28a37c4cd9 Mon Sep 17 00:00:00 2001
-From: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
-Date: Tue, 24 Mar 2020 15:49:44 +0900
-Subject: [PATCH] mtd: spinand: toshiba: Rename function name to change suffix
- and prefix (8Gbit)
+From af4301a675f4fcbaa787f1d3bd07df1c08a093c3 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:13 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2326-mtd-spinand-toshiba-Rename-function-name-to-change-suffix-and-prefix-8Gbit.patch]
-The suffix was changed from "G" to "J" to classify between 1st generation
-and 2nd generation serial NAND devices (which now belong to the Kioxia
-brand).
-As reference that's
-1st generation device of 1Gbit product is "TC58CVG0S3HRAIG"
-2nd generation device of 1Gbit product is "TC58CVG0S3HRAIJ".
-
-The 8Gbit type "TH58CxG3S0HRAIJ" is new to Kioxia's serial NAND lineup and
-the prefix was changed from "TC58" to "TH58".
-
-Thus the functions were renamed from tc58cxgxsx_*() to tx58cxgxsxraix_*().
-
-Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
-Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/0dedd9869569a17625822dba87878254d253ba0e.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
---
- drivers/mtd/nand/spi/toshiba.c | 60 +++++++++++++++++-----------------
- 1 file changed, 30 insertions(+), 30 deletions(-)
+ drivers/mtd/nand/spi/toshiba.c | 65 ++++++++++++++++++++--------------
+ 1 file changed, 38 insertions(+), 27 deletions(-)
+diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
+index 35da3c6e9..7ce5997dd 100644
--- a/drivers/mtd/nand/spi/toshiba.c
+++ b/drivers/mtd/nand/spi/toshiba.c
-@@ -25,8 +25,8 @@ static SPINAND_OP_VARIANTS(write_cache_v
+@@ -25,8 +25,8 @@ static SPINAND_OP_VARIANTS(write_cache_variants,
static SPINAND_OP_VARIANTS(update_cache_variants,
SPINAND_PROG_LOAD(false, 0, NULL, 0));
@@ -37,7 +23,7 @@
{
if (section > 0)
return -ERANGE;
-@@ -37,8 +37,8 @@ static int tc58cxgxsx_ooblayout_ecc(stru
+@@ -37,8 +37,8 @@ static int tc58cxgxsx_ooblayout_ecc(struct mtd_info *mtd, int section,
return 0;
}
@@ -48,7 +34,7 @@
{
if (section > 0)
return -ERANGE;
-@@ -50,13 +50,13 @@ static int tc58cxgxsx_ooblayout_free(str
+@@ -50,13 +50,13 @@ static int tc58cxgxsx_ooblayout_free(struct mtd_info *mtd, int section,
return 0;
}
@@ -67,7 +53,7 @@
{
struct nand_device *nand = spinand_to_nand(spinand);
u8 mbf = 0;
-@@ -95,7 +95,7 @@ static int tc58cxgxsx_ecc_get_status(str
+@@ -95,7 +95,7 @@ static int tc58cxgxsx_ecc_get_status(struct spinand_device *spinand,
static const struct spinand_info toshiba_spinand_table[] = {
/* 3.3V 1Gb */
@@ -76,7 +62,7 @@
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2),
NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
NAND_ECCREQ(8, 512),
-@@ -103,10 +103,10 @@ static const struct spinand_info toshiba
+@@ -103,10 +103,10 @@ static const struct spinand_info toshiba_spinand_table[] = {
&write_cache_variants,
&update_cache_variants),
0,
@@ -90,7 +76,7 @@
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB),
NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
NAND_ECCREQ(8, 512),
-@@ -114,10 +114,10 @@ static const struct spinand_info toshiba
+@@ -114,10 +114,10 @@ static const struct spinand_info toshiba_spinand_table[] = {
&write_cache_variants,
&update_cache_variants),
0,
@@ -104,7 +90,7 @@
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD),
NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
NAND_ECCREQ(8, 512),
-@@ -125,10 +125,21 @@ static const struct spinand_info toshiba
+@@ -125,10 +125,21 @@ static const struct spinand_info toshiba_spinand_table[] = {
&write_cache_variants,
&update_cache_variants),
0,
@@ -129,7 +115,7 @@
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),
NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
NAND_ECCREQ(8, 512),
-@@ -136,10 +147,10 @@ static const struct spinand_info toshiba
+@@ -136,10 +147,10 @@ static const struct spinand_info toshiba_spinand_table[] = {
&write_cache_variants,
&update_cache_variants),
0,
@@ -143,7 +129,7 @@
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB),
NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
NAND_ECCREQ(8, 512),
-@@ -147,10 +158,10 @@ static const struct spinand_info toshiba
+@@ -147,10 +158,10 @@ static const struct spinand_info toshiba_spinand_table[] = {
&write_cache_variants,
&update_cache_variants),
0,
@@ -157,7 +143,7 @@
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD),
NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
NAND_ECCREQ(8, 512),
-@@ -158,8 +169,8 @@ static const struct spinand_info toshiba
+@@ -158,8 +169,8 @@ static const struct spinand_info toshiba_spinand_table[] = {
&write_cache_variants,
&update_cache_variants),
0,
@@ -168,3 +154,6 @@
};
static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/471-mtd-spinand-toshiba-Support-for-new-Kioxia-Serial-NAND.patch b/target/linux/generic/backport-5.4/999-2327-mtd-spinand-toshiba-Support-for-new-Kioxia-Serial-NAND.patch
similarity index 85%
rename from target/linux/generic/backport-5.4/471-mtd-spinand-toshiba-Support-for-new-Kioxia-Serial-NAND.patch
rename to target/linux/generic/backport-5.4/999-2327-mtd-spinand-toshiba-Support-for-new-Kioxia-Serial-NAND.patch
index ffa1ad8..12a55cb 100644
--- a/target/linux/generic/backport-5.4/471-mtd-spinand-toshiba-Support-for-new-Kioxia-Serial-NAND.patch
+++ b/target/linux/generic/backport-5.4/999-2327-mtd-spinand-toshiba-Support-for-new-Kioxia-Serial-NAND.patch
@@ -1,25 +1,18 @@
-From 798fcdd010006e87b3154d6454c657af7b033002 Mon Sep 17 00:00:00 2001
-From: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
-Date: Tue, 24 Mar 2020 15:49:55 +0900
-Subject: [PATCH] mtd: spinand: toshiba: Support for new Kioxia Serial NAND
+From 1d16ff587875717c950c983af8eaa474d0a855ca Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:13 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2327-mtd-spinand-toshiba-Support-for-new-Kioxia-Serial-NAND.patch]
-Add support for new Kioxia products.
-The new Kioxia products support program load x4 command, and have
-HOLD_D bit which is equivalent to QE bit.
-
-Signed-off-by: Yoshio Furuyama <ytc-mb-yfuruyama7@kioxia.com>
-Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/aa69e455beedc5ce0d7141359b9364ed8aec9e65.1584949601.git.ytc-mb-yfuruyama7@kioxia.com
---
drivers/mtd/nand/spi/toshiba.c | 128 ++++++++++++++++++++++++++++-----
1 file changed, 111 insertions(+), 17 deletions(-)
diff --git a/drivers/mtd/nand/spi/toshiba.c b/drivers/mtd/nand/spi/toshiba.c
-index 5d217dd4b2539a..bc801d83343e5c 100644
+index 7ce5997dd..be51a2eaf 100644
--- a/drivers/mtd/nand/spi/toshiba.c
+++ b/drivers/mtd/nand/spi/toshiba.c
-@@ -20,6 +20,18 @@ static SPINAND_OP_VARIANTS(read_cache_variants,
+@@ -19,6 +19,18 @@ static SPINAND_OP_VARIANTS(read_cache_variants,
SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
@@ -38,7 +31,7 @@
static SPINAND_OP_VARIANTS(write_cache_variants,
SPINAND_PROG_LOAD(true, 0, NULL, 0));
-@@ -95,7 +107,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
+@@ -94,7 +106,7 @@ static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
}
static const struct spinand_info toshiba_spinand_table[] = {
@@ -47,7 +40,7 @@
SPINAND_INFO("TC58CVG0S3HRAIG",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2),
NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
-@@ -106,7 +118,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
+@@ -105,7 +117,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
0,
SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
tx58cxgxsxraix_ecc_get_status)),
@@ -56,7 +49,7 @@
SPINAND_INFO("TC58CVG1S3HRAIG",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB),
NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
-@@ -117,7 +129,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
+@@ -116,7 +128,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
0,
SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
tx58cxgxsxraix_ecc_get_status)),
@@ -65,7 +58,7 @@
SPINAND_INFO("TC58CVG2S0HRAIG",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD),
NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
-@@ -128,18 +140,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
+@@ -127,18 +139,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
0,
SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
tx58cxgxsxraix_ecc_get_status)),
@@ -85,7 +78,7 @@
SPINAND_INFO("TC58CYG0S3HRAIG",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),
NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
-@@ -150,7 +151,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
+@@ -149,7 +150,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
0,
SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
tx58cxgxsxraix_ecc_get_status)),
@@ -94,7 +87,7 @@
SPINAND_INFO("TC58CYG1S3HRAIG",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB),
NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
-@@ -161,7 +162,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
+@@ -160,7 +161,7 @@ static const struct spinand_info toshiba_spinand_table[] = {
0,
SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
tx58cxgxsxraix_ecc_get_status)),
@@ -103,7 +96,7 @@
SPINAND_INFO("TC58CYG2S0HRAIG",
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD),
NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
-@@ -172,6 +173,99 @@ static const struct spinand_info toshiba_spinand_table[] = {
+@@ -171,6 +172,99 @@ static const struct spinand_info toshiba_spinand_table[] = {
0,
SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
tx58cxgxsxraix_ecc_get_status)),
@@ -203,3 +196,6 @@
};
static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/827-v5.16-spi-add-power-control-when-set_cs.patch b/target/linux/generic/backport-5.4/999-2360-v5.16-spi-add-power-control-when-set_cs.patch
similarity index 62%
rename from target/linux/generic/backport-5.4/827-v5.16-spi-add-power-control-when-set_cs.patch
rename to target/linux/generic/backport-5.4/999-2360-v5.16-spi-add-power-control-when-set_cs.patch
index f3e7940..1016204 100644
--- a/target/linux/generic/backport-5.4/827-v5.16-spi-add-power-control-when-set_cs.patch
+++ b/target/linux/generic/backport-5.4/999-2360-v5.16-spi-add-power-control-when-set_cs.patch
@@ -1,14 +1,15 @@
-drivers: spi: backport PM improvement for SPI framework
+From 0078d23c468b3b3fd73d65f1652de0b355b95081 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:18 +0800
+Subject: [PATCH]
+ [spi-and-storage][999-2360-v5.16-spi-add-power-control-when-set_cs.patch]
-Fix PM improvement for SPI framework.
-As to set_cs takes effect immediately, power spi
-is needed when setup spi.
+---
+ drivers/spi/spi.c | 24 +++++++++++++++++++++++-
+ 1 file changed, 23 insertions(+), 1 deletion(-)
-(cherry picked from commit d948e6ca189985495a21cd622c31e30e72b6b688)
-Link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/spi/spi.c?h=v5.16-rc4&id=d948e6ca189985495a21cd622c31e30e72b6b688
-(cherry picked from commit 57a9460705f105e1d79d1410c5cfe285beda8986)
-Link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/drivers/spi/spi.c?h=v5.16-rc4&id=57a9460705f105e1d79d1410c5cfe285beda8986
-
+diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
+index 197a47eab..e562735a3 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -3170,7 +3170,29 @@ int spi_setup(struct spi_device *spi)
@@ -43,5 +44,5 @@
if (spi->rt && !spi->controller->rt) {
spi->controller->rt = true;
--
-2.18.0
+2.34.1
diff --git a/target/linux/generic/backport-5.4/999-2700-v5.7-iopoll-introduce-read_poll_timeout-macro.patch b/target/linux/generic/backport-5.4/999-2700-v5.7-iopoll-introduce-read_poll_timeout-macro.patch
new file mode 100644
index 0000000..d7fc25c
--- /dev/null
+++ b/target/linux/generic/backport-5.4/999-2700-v5.7-iopoll-introduce-read_poll_timeout-macro.patch
@@ -0,0 +1,176 @@
+From bc97a676615bd0ec66bb2a2a42c939455bf5bed6 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:27 +0800
+Subject: [PATCH]
+ [networking][999-2700-v5.7-iopoll-introduce-read_poll_timeout-macro.patch]
+
+---
+ drivers/net/phy/phy_device.c | 16 +++++----------
+ include/linux/iopoll.h | 40 +++++++++++++++++++++++++++++-------
+ include/linux/phy.h | 27 ++++++++++++++++++++++++
+ 3 files changed, 65 insertions(+), 18 deletions(-)
+
+diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
+index 76a68bb02..0349801df 100644
+--- a/drivers/net/phy/phy_device.c
++++ b/drivers/net/phy/phy_device.c
+@@ -1056,18 +1056,12 @@ EXPORT_SYMBOL(phy_disconnect);
+ static int phy_poll_reset(struct phy_device *phydev)
+ {
+ /* Poll until the reset bit clears (50ms per retry == 0.6 sec) */
+- unsigned int retries = 12;
+- int ret;
+-
+- do {
+- msleep(50);
+- ret = phy_read(phydev, MII_BMCR);
+- if (ret < 0)
+- return ret;
+- } while (ret & BMCR_RESET && --retries);
+- if (ret & BMCR_RESET)
+- return -ETIMEDOUT;
++ int ret, val;
+
++ ret = phy_read_poll_timeout(phydev, MII_BMCR, val, !(val & BMCR_RESET),
++ 50000, 600000, true);
++ if (ret)
++ return ret;
+ /* Some chips (smsc911x) may still need up to another 1ms after the
+ * BMCR_RESET bit is cleared before they are usable.
+ */
+diff --git a/include/linux/iopoll.h b/include/linux/iopoll.h
+index 35e15dfd4..cb20c733b 100644
+--- a/include/linux/iopoll.h
++++ b/include/linux/iopoll.h
+@@ -14,36 +14,41 @@
+ #include <linux/io.h>
+
+ /**
+- * readx_poll_timeout - Periodically poll an address until a condition is met or a timeout occurs
+- * @op: accessor function (takes @addr as its only argument)
+- * @addr: Address to poll
++ * read_poll_timeout - Periodically poll an address until a condition is
++ * met or a timeout occurs
++ * @op: accessor function (takes @args as its arguments)
+ * @val: Variable to read the value into
+ * @cond: Break condition (usually involving @val)
+ * @sleep_us: Maximum time to sleep between reads in us (0
+ * tight-loops). Should be less than ~20ms since usleep_range
+ * is used (see Documentation/timers/timers-howto.rst).
+ * @timeout_us: Timeout in us, 0 means never timeout
++ * @sleep_before_read: if it is true, sleep @sleep_us before read.
++ * @args: arguments for @op poll
+ *
+ * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
+- * case, the last read value at @addr is stored in @val. Must not
++ * case, the last read value at @args is stored in @val. Must not
+ * be called from atomic context if sleep_us or timeout_us are used.
+ *
+ * When available, you'll probably want to use one of the specialized
+ * macros defined below rather than this macro directly.
+ */
+-#define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us) \
++#define read_poll_timeout(op, val, cond, sleep_us, timeout_us, \
++ sleep_before_read, args...) \
+ ({ \
+ u64 __timeout_us = (timeout_us); \
+ unsigned long __sleep_us = (sleep_us); \
+ ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
+ might_sleep_if((__sleep_us) != 0); \
++ if (sleep_before_read && __sleep_us) \
++ usleep_range((__sleep_us >> 2) + 1, __sleep_us); \
+ for (;;) { \
+- (val) = op(addr); \
++ (val) = op(args); \
+ if (cond) \
+ break; \
+ if (__timeout_us && \
+ ktime_compare(ktime_get(), __timeout) > 0) { \
+- (val) = op(addr); \
++ (val) = op(args); \
+ break; \
+ } \
+ if (__sleep_us) \
+@@ -52,6 +57,27 @@
+ (cond) ? 0 : -ETIMEDOUT; \
+ })
+
++/**
++ * readx_poll_timeout - Periodically poll an address until a condition is met or a timeout occurs
++ * @op: accessor function (takes @addr as its only argument)
++ * @addr: Address to poll
++ * @val: Variable to read the value into
++ * @cond: Break condition (usually involving @val)
++ * @sleep_us: Maximum time to sleep between reads in us (0
++ * tight-loops). Should be less than ~20ms since usleep_range
++ * is used (see Documentation/timers/timers-howto.rst).
++ * @timeout_us: Timeout in us, 0 means never timeout
++ *
++ * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
++ * case, the last read value at @addr is stored in @val. Must not
++ * be called from atomic context if sleep_us or timeout_us are used.
++ *
++ * When available, you'll probably want to use one of the specialized
++ * macros defined below rather than this macro directly.
++ */
++#define readx_poll_timeout(op, addr, val, cond, sleep_us, timeout_us) \
++ read_poll_timeout(op, val, cond, sleep_us, timeout_us, false, addr)
++
+ /**
+ * readx_poll_timeout_atomic - Periodically poll an address until a condition is met or a timeout occurs
+ * @op: accessor function (takes @addr as its only argument)
+diff --git a/include/linux/phy.h b/include/linux/phy.h
+index a1070d60e..107dcbea4 100644
+--- a/include/linux/phy.h
++++ b/include/linux/phy.h
+@@ -21,6 +21,7 @@
+ #include <linux/timer.h>
+ #include <linux/workqueue.h>
+ #include <linux/mod_devicetable.h>
++#include <linux/iopoll.h>
+
+ #include <linux/atomic.h>
+
+@@ -714,6 +715,19 @@ static inline int phy_read(struct phy_device *phydev, u32 regnum)
+ return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
+ }
+
++#define phy_read_poll_timeout(phydev, regnum, val, cond, sleep_us, \
++ timeout_us, sleep_before_read) \
++({ \
++ int __ret = read_poll_timeout(phy_read, val, (cond) || val < 0, \
++ sleep_us, timeout_us, sleep_before_read, phydev, regnum); \
++ if (val < 0) \
++ __ret = val; \
++ if (__ret) \
++ phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
++ __ret; \
++})
++
++
+ /**
+ * __phy_read - convenience function for reading a given PHY register
+ * @phydev: the phy_device struct
+@@ -766,6 +780,19 @@ static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
+ */
+ int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
+
++#define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
++ sleep_us, timeout_us, sleep_before_read) \
++({ \
++ int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
++ sleep_us, timeout_us, sleep_before_read, \
++ phydev, devaddr, regnum); \
++ if (val < 0) \
++ __ret = val; \
++ if (__ret) \
++ phydev_err(phydev, "%s failed: %d\n", __func__, __ret); \
++ __ret; \
++})
++
+ /**
+ * __phy_read_mmd - Convenience function for reading a register
+ * from an MMD on a given PHY.
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/791-v5.8-net-phy-add-concept-of-shared-storage-for-PHYs.patch b/target/linux/generic/backport-5.4/999-2701-v5.8-net-phy-add-concept-of-shared-storage-for-PHYs.patch
similarity index 66%
rename from target/linux/generic/backport-5.4/791-v5.8-net-phy-add-concept-of-shared-storage-for-PHYs.patch
rename to target/linux/generic/backport-5.4/999-2701-v5.8-net-phy-add-concept-of-shared-storage-for-PHYs.patch
index b47f2bf..e74f20b 100644
--- a/target/linux/generic/backport-5.4/791-v5.8-net-phy-add-concept-of-shared-storage-for-PHYs.patch
+++ b/target/linux/generic/backport-5.4/999-2701-v5.8-net-phy-add-concept-of-shared-storage-for-PHYs.patch
@@ -1,97 +1,20 @@
-From patchwork Wed May 6 14:53:13 2020
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-From: Michael Walle <michael@walle.cc>
-To: linux-kernel@vger.kernel.org, netdev@vger.kernel.org
-Cc: Andrew Lunn <andrew@lunn.ch>,
- Florian Fainelli <f.fainelli@gmail.com>,
- Heiner Kallweit <hkallweit1@gmail.com>,
- Russell King <linux@armlinux.org.uk>,
- "David S . Miller" <davem@davemloft.net>,
- Vladimir Oltean <vladimir.oltean@nxp.com>,
- Antoine Tenart <antoine.tenart@bootlin.com>,
- Michael Walle <michael@walle.cc>
-Subject: [PATCH net-next v3 1/3] net: phy: add concept of shared storage for
- PHYs
-Date: Wed, 6 May 2020 16:53:13 +0200
-Message-Id: <20200506145315.13967-2-michael@walle.cc>
-X-Mailer: git-send-email 2.20.1
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+From 2dca4de7282d3003f3703f707d773f4dbbc0f28e Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:27 +0800
+Subject: [PATCH]
+ [networking][999-2701-v5.8-net-phy-add-concept-of-shared-storage-for-PHYs.patch]
-There are packages which contain multiple PHY devices, eg. a quad PHY
-transceiver. Provide functions to allocate and free shared storage.
-
-Usually, a quad PHY contains global registers, which don't belong to any
-PHY. Provide convenience functions to access these registers.
-
-Signed-off-by: Michael Walle <michael@walle.cc>
-Reviewed-by: Andrew Lunn <andrew@lunn.ch>
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/phy/mdio_bus.c | 1 +
drivers/net/phy/phy_device.c | 138 +++++++++++++++++++++++++++++++++++
include/linux/phy.h | 89 ++++++++++++++++++++++
3 files changed, 228 insertions(+)
+diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
+index fdf8221f4..d9f2cee33 100644
--- a/drivers/net/phy/mdio_bus.c
+++ b/drivers/net/phy/mdio_bus.c
-@@ -404,6 +404,7 @@ int __mdiobus_register(struct mii_bus *b
+@@ -404,6 +404,7 @@ int __mdiobus_register(struct mii_bus *bus, struct module *owner)
}
mutex_init(&bus->mdio_lock);
@@ -99,12 +22,15 @@
/* de-assert bus level PHY GPIO reset */
gpiod = devm_gpiod_get_optional(&bus->dev, "reset", GPIOD_OUT_LOW);
+diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
+index 0349801df..99f265a1c 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
-@@ -1448,6 +1448,144 @@ bool phy_driver_is_genphy_10g(struct phy
+@@ -1447,6 +1447,144 @@ bool phy_driver_is_genphy_10g(struct phy_device *phydev)
+ }
EXPORT_SYMBOL_GPL(phy_driver_is_genphy_10g);
- /**
++/**
+ * phy_package_join - join a common PHY group
+ * @phydev: target phy_device struct
+ * @addr: cookie and PHY address for global register access
@@ -242,10 +168,11 @@
+}
+EXPORT_SYMBOL_GPL(devm_phy_package_join);
+
-+/**
+ /**
* phy_detach - detach a PHY device from its network device
* @phydev: target phy_device struct
- *
+diff --git a/include/linux/phy.h b/include/linux/phy.h
+index 107dcbea4..d26dba255 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -22,6 +22,7 @@
@@ -256,7 +183,7 @@
#include <linux/atomic.h>
-@@ -208,6 +209,28 @@ struct sfp_bus;
+@@ -211,6 +212,28 @@ struct sfp_bus;
struct sfp_upstream_ops;
struct sk_buff;
@@ -285,7 +212,7 @@
/*
* The Bus class for PHYs. Devices which provide access to
* PHYs should register using this structure
-@@ -255,6 +278,12 @@ struct mii_bus {
+@@ -258,6 +281,12 @@ struct mii_bus {
int reset_delay_us;
/* RESET GPIO descriptor pointer */
struct gpio_desc *reset_gpiod;
@@ -298,7 +225,7 @@
};
#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
-@@ -434,6 +463,10 @@ struct phy_device {
+@@ -437,6 +466,10 @@ struct phy_device {
/* For use by PHYs to maintain extra state */
void *priv;
@@ -309,7 +236,7 @@
/* Interrupt and Polling infrastructure */
struct delayed_work state_queue;
-@@ -1232,6 +1265,10 @@ int phy_ethtool_get_link_ksettings(struc
+@@ -1242,6 +1275,10 @@ int phy_ethtool_get_link_ksettings(struct net_device *ndev,
int phy_ethtool_set_link_ksettings(struct net_device *ndev,
const struct ethtool_link_ksettings *cmd);
int phy_ethtool_nway_reset(struct net_device *ndev);
@@ -320,7 +247,7 @@
#if IS_ENABLED(CONFIG_PHYLIB)
int __init mdio_bus_init(void);
-@@ -1284,6 +1321,58 @@ static inline int phy_ethtool_get_stats(
+@@ -1294,6 +1331,58 @@ static inline int phy_ethtool_get_stats(struct phy_device *phydev,
return 0;
}
@@ -379,3 +306,6 @@
extern struct bus_type mdio_bus_type;
struct mdio_board_info {
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/999-2702-v5.9-net-phy-add-support-for-a-common-probe-between-shared-PHYs.patch b/target/linux/generic/backport-5.4/999-2702-v5.9-net-phy-add-support-for-a-common-probe-between-shared-PHYs.patch
new file mode 100644
index 0000000..c2f2c10
--- /dev/null
+++ b/target/linux/generic/backport-5.4/999-2702-v5.9-net-phy-add-support-for-a-common-probe-between-shared-PHYs.patch
@@ -0,0 +1,55 @@
+From 3fc10755d5f6a5618519f2b5b3a68febfc5984b0 Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:27 +0800
+Subject: [PATCH]
+ [networking][999-2702-v5.9-net-phy-add-support-for-a-common-probe-between-shared-PHYs.patch]
+
+---
+ include/linux/phy.h | 18 +++++++++++++++---
+ 1 file changed, 15 insertions(+), 3 deletions(-)
+
+diff --git a/include/linux/phy.h b/include/linux/phy.h
+index d26dba255..4f2c105f5 100644
+--- a/include/linux/phy.h
++++ b/include/linux/phy.h
+@@ -232,7 +232,8 @@ struct phy_package_shared {
+ };
+
+ /* used as bit number in atomic bitops */
+-#define PHY_SHARED_F_INIT_DONE 0
++#define PHY_SHARED_F_INIT_DONE 0
++#define PHY_SHARED_F_PROBE_DONE 1
+
+ /*
+ * The Bus class for PHYs. Devices which provide access to
+@@ -1373,14 +1374,25 @@ static inline int __phy_package_write(struct phy_device *phydev,
+ return __mdiobus_write(phydev->mdio.bus, shared->addr, regnum, val);
+ }
+
+-static inline bool phy_package_init_once(struct phy_device *phydev)
++static inline bool __phy_package_set_once(struct phy_device *phydev,
++ unsigned int b)
+ {
+ struct phy_package_shared *shared = phydev->shared;
+
+ if (!shared)
+ return false;
+
+- return !test_and_set_bit(PHY_SHARED_F_INIT_DONE, &shared->flags);
++ return !test_and_set_bit(b, &shared->flags);
++}
++
++static inline bool phy_package_init_once(struct phy_device *phydev)
++{
++ return __phy_package_set_once(phydev, PHY_SHARED_F_INIT_DONE);
++}
++
++static inline bool phy_package_probe_once(struct phy_device *phydev)
++{
++ return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
+ }
+
+ extern struct bus_type mdio_bus_type;
+--
+2.34.1
+
diff --git a/target/linux/generic/backport-5.4/793-net-phy-backport-v5.4-mediatek-ge-and-v6.4-mediatek-ge-soc.patch b/target/linux/generic/backport-5.4/999-2703-net-phy-backport-v5.4-mediatek-ge-and-v6.4-mediatek-ge-soc.patch
similarity index 63%
rename from target/linux/generic/backport-5.4/793-net-phy-backport-v5.4-mediatek-ge-and-v6.4-mediatek-ge-soc.patch
rename to target/linux/generic/backport-5.4/999-2703-net-phy-backport-v5.4-mediatek-ge-and-v6.4-mediatek-ge-soc.patch
index 83df94a..3551935 100644
--- a/target/linux/generic/backport-5.4/793-net-phy-backport-v5.4-mediatek-ge-and-v6.4-mediatek-ge-soc.patch
+++ b/target/linux/generic/backport-5.4/999-2703-net-phy-backport-v5.4-mediatek-ge-and-v6.4-mediatek-ge-soc.patch
@@ -1,17 +1,19 @@
---- a/drivers/net/phy/Makefile
-+++ b/drivers/net/phy/Makefile
-@@ -92,6 +92,8 @@ obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c
- obj-$(CONFIG_LXT_PHY) += lxt.o
- obj-$(CONFIG_MARVELL_PHY) += marvell.o
- obj-$(CONFIG_MARVELL_10G_PHY) += marvell10g.o
-+obj-$(CONFIG_MEDIATEK_GE_PHY) += mediatek-ge.o
-+obj-$(CONFIG_MEDIATEK_GE_SOC_PHY) += mediatek-ge-soc.o
- obj-$(CONFIG_MESON_GXL_PHY) += meson-gxl.o
- obj-$(CONFIG_MICREL_KS8995MA) += spi_ks8995.o
- obj-$(CONFIG_MICREL_PHY) += micrel.o
+From 0e0b69abbc9fdba0bf1ea723cee71b2a2402559e Mon Sep 17 00:00:00 2001
+From: Sam Shih <sam.shih@mediatek.com>
+Date: Fri, 2 Jun 2023 13:06:28 +0800
+Subject: [PATCH]
+ [networking][999-2703-net-phy-backport-v5.4-mediatek-ge-and-v6.4-mediatek-ge-soc.patch]
+
+---
+ drivers/net/phy/Kconfig | 17 +++++++++++++++++
+ drivers/net/phy/Makefile | 2 ++
+ 2 files changed, 19 insertions(+)
+
+diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
+index 5eeccfee2..ec5c66d0a 100644
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
-@@ -507,6 +507,23 @@ config MESON_GXL_PHY
+@@ -512,6 +512,23 @@ config MESON_GXL_PHY
---help---
Currently has a driver for the Amlogic Meson GXL Internal PHY
@@ -35,3 +37,19 @@
config MICREL_PHY
tristate "Micrel PHYs"
---help---
+diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
+index 437ff2a2c..f4feb0e3d 100644
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -94,6 +94,8 @@ obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
+ obj-$(CONFIG_LXT_PHY) += lxt.o
+ obj-$(CONFIG_MARVELL_PHY) += marvell.o
+ obj-$(CONFIG_MARVELL_10G_PHY) += marvell10g.o
++obj-$(CONFIG_MEDIATEK_GE_PHY) += mediatek-ge.o
++obj-$(CONFIG_MEDIATEK_GE_SOC_PHY) += mediatek-ge-soc.o
+ obj-$(CONFIG_MESON_GXL_PHY) += meson-gxl.o
+ obj-$(CONFIG_MICREL_KS8995MA) += spi_ks8995.o
+ obj-$(CONFIG_MICREL_PHY) += micrel.o
+--
+2.34.1
+