diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
index c9b1a43..3144511 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
@@ -426,7 +426,7 @@
 int mtk_gmac_xgmii_path_setup(struct mtk_eth *eth, int mac_id)
 {
 	int err;
-	u64 path;
+	u64 path = 0;
 
 	if (mac_id == 1)
 		path = MTK_ETH_PATH_GMAC2_XGMII;
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 2d2797d..98507af 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -209,7 +209,7 @@
 static int mt7621_gmac0_rgmii_adjust(struct mtk_eth *eth,
 				     phy_interface_t interface)
 {
-	u32 val;
+	u32 val = 0;
 
 	/* Check DDR memory type.
 	 * Currently TRGMII mode with DDR2 memory is not supported.
@@ -297,7 +297,7 @@
 					   phylink_config);
 	struct mtk_eth *eth = mac->hw;
 	u32 sid, i;
-	int val, ge_mode, err=0;
+	int val = 0, ge_mode, err = 0;
 
 	/* MT76x8 has no hardware settings between for the MAC */
 	if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) &&
@@ -535,7 +535,7 @@
 		struct mtk_xgmii *ss = eth->xgmii;
 		u32 id = mtk_mac2xgmii_id(eth, mac->id);
 		u32 pmsr = mtk_r32(mac->hw, MTK_MAC_MSR(mac->id));
-		u32 val;
+		u32 val = 0;
 
 		regmap_read(ss->regmap_sgmii[id], SGMSYS_PCS_CONTROL_1, &val);
 
@@ -3576,7 +3576,9 @@
 			continue;
 		call_netdevice_notifiers(MTK_FE_START_RESET, eth->netdev[i]);
 		rtnl_unlock();
-		wait_for_completion_timeout(&wait_ser_done, 5000);
+		if (!wait_for_completion_timeout(&wait_ser_done, 5000))
+			pr_warn("[%s] wait for MTK_FE_START_RESET failed\n",
+				__func__);
 		rtnl_lock();
 		break;
 	}
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c
index 872c27e..64a6353 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_sgmii.c
@@ -41,7 +41,7 @@
 {
 	u32 id = mtk_mac2xgmii_id(ss->eth, mac_id);
 
-	if (id < 0 || id >= MTK_MAX_DEVS ||
+	if (id >= MTK_MAX_DEVS ||
 	    !ss->regmap_sgmii[id] || !ss->regmap_pextp[id])
 		return;
 
@@ -161,7 +161,7 @@
 int mtk_sgmii_setup_mode_an(struct mtk_xgmii *ss, unsigned int mac_id)
 {
 	struct mtk_eth *eth = ss->eth;
-	unsigned int val;
+	unsigned int val = 0;
 	u32 id = mtk_mac2xgmii_id(ss->eth, mac_id);
 
 	if (!ss->regmap_sgmii[id])
@@ -216,7 +216,7 @@
 			       const struct phylink_link_state *state)
 {
 	struct mtk_eth *eth = ss->eth;
-	unsigned int val;
+	unsigned int val = 0;
 	u32 id = mtk_mac2xgmii_id(eth, mac_id);
 
 	if (!ss->regmap_sgmii[id])
@@ -285,7 +285,7 @@
 void mtk_sgmii_restart_an(struct mtk_eth *eth, int mac_id)
 {
 	struct mtk_xgmii *ss = eth->xgmii;
-	unsigned int val, sid = mtk_mac2xgmii_id(eth, mac_id);
+	unsigned int val = 0, sid = mtk_mac2xgmii_id(eth, mac_id);
 
 	/* Decide how GMAC and SGMIISYS be mapped */
 	sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ?