[][kernel][common][eth][Fix Coverity scan warning]
[Description]
Fix Coverity scan warning.
- Fix uninitialized variables in mtk_gmac_xgmii_path_setup().
- Fix uninitialized variables in mt7621_gmac0_rgmii_adjust().
- Fix uninitialized variables in mtk_mac_config().
- Fix uninitialized variables in mtk_sgmii_setup_phya_gen1().
- Fix uninitialized variables in mtk_sgmii_setup_mode_force().
- Fix uninitialized variables in mtk_sgmii_restart_an().
- Fix error handling for wait_for_completion_timeout().
[Release-log]
N/A
Change-Id: I86f36fa33efffb93dadbdedef51d44efb04fdb9a
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6858102
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 2d2797d..98507af 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -209,7 +209,7 @@
static int mt7621_gmac0_rgmii_adjust(struct mtk_eth *eth,
phy_interface_t interface)
{
- u32 val;
+ u32 val = 0;
/* Check DDR memory type.
* Currently TRGMII mode with DDR2 memory is not supported.
@@ -297,7 +297,7 @@
phylink_config);
struct mtk_eth *eth = mac->hw;
u32 sid, i;
- int val, ge_mode, err=0;
+ int val = 0, ge_mode, err = 0;
/* MT76x8 has no hardware settings between for the MAC */
if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) &&
@@ -535,7 +535,7 @@
struct mtk_xgmii *ss = eth->xgmii;
u32 id = mtk_mac2xgmii_id(eth, mac->id);
u32 pmsr = mtk_r32(mac->hw, MTK_MAC_MSR(mac->id));
- u32 val;
+ u32 val = 0;
regmap_read(ss->regmap_sgmii[id], SGMSYS_PCS_CONTROL_1, &val);
@@ -3576,7 +3576,9 @@
continue;
call_netdevice_notifiers(MTK_FE_START_RESET, eth->netdev[i]);
rtnl_unlock();
- wait_for_completion_timeout(&wait_ser_done, 5000);
+ if (!wait_for_completion_timeout(&wait_ser_done, 5000))
+ pr_warn("[%s] wait for MTK_FE_START_RESET failed\n",
+ __func__);
rtnl_lock();
break;
}