diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index 79fb423..517762a 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -578,24 +578,26 @@
 	};
 
 	spi0: spi@1100a000 {
-		compatible = "mediatek,ipm-spi";
+		compatible = "mediatek,ipm-spi-quad";
 		reg = <0 0x1100a000 0 0x100>;
 		interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&topckgen CK_TOP_CB_M_D2>,
+			 <&topckgen CK_TOP_SPI_SEL>,
 			 <&infracfg_ao CK_INFRA_SPI0_CK>,
-			 <&topckgen CK_TOP_SPI_SEL>;
-		clock-names = "parent-clk", "sel-clk", "spi-clk";
+			 <&infracfg_ao CK_INFRA_SPI0_HCK_CK>;
+		clock-names = "parent-clk", "sel-clk", "spi-clk", "spi-hclk";
 		status = "disabled";
 	};
 
 	spi1: spi@1100b000 {
-		compatible = "mediatek,ipm-spi";
+		compatible = "mediatek,ipm-spi-single";
 		reg = <0 0x1100b000 0 0x100>;
 		interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&topckgen CK_TOP_CB_M_D2>,
+			 <&topckgen CK_TOP_SPIM_MST_SEL>,
 			 <&infracfg_ao CK_INFRA_SPI1_CK>,
-			 <&topckgen CK_TOP_SPIM_MST_SEL>;
-		clock-names = "parent-clk", "sel-clk", "spi-clk";
+			 <&infracfg_ao CK_INFRA_SPI1_HCK_CK>;
+		clock-names = "parent-clk", "sel-clk", "spi-clk", "spi-hclk";
 		status = "disabled";
 	};
 
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
index 2054b1a..8e961d6 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
@@ -547,24 +547,26 @@
 	};
 
 	spi0: spi@1100a000 {
-		compatible = "mediatek,ipm-spi";
+		compatible = "mediatek,ipm-spi-quad";
 		reg = <0 0x1100a000 0 0x100>;
 		interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&topckgen CK_TOP_CB_M_D2>,
+			 <&topckgen CK_TOP_SPI_SEL>,
 			 <&infracfg_ao CK_INFRA_SPI0_CK>,
-			 <&topckgen CK_TOP_SPI_SEL>;
-		clock-names = "parent-clk", "sel-clk", "spi-clk";
+			 <&infracfg_ao CK_INFRA_SPI0_HCK_CK>;
+		clock-names = "parent-clk", "sel-clk", "spi-clk", "spi-hclk";
 		status = "disabled";
 	};
 
 	spi1: spi@1100b000 {
-		compatible = "mediatek,ipm-spi";
+		compatible = "mediatek,ipm-spi-single";
 		reg = <0 0x1100b000 0 0x100>;
 		interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&topckgen CK_TOP_CB_M_D2>,
+			 <&topckgen CK_TOP_SPIM_MST_SEL>,
 			 <&infracfg_ao CK_INFRA_SPI1_CK>,
-			 <&topckgen CK_TOP_SPIM_MST_SEL>;
-		clock-names = "parent-clk", "sel-clk", "spi-clk";
+			 <&infracfg_ao CK_INFRA_SPI1_HCK_CK>;
+		clock-names = "parent-clk", "sel-clk", "spi-clk", "spi-hclk";
 		status = "disabled";
 	};