diff --git a/target/linux/mediatek/files-5.4/drivers/net/phy/mediatek-ge.c b/target/linux/mediatek/files-5.4/drivers/net/phy/mediatek-ge.c
index 977a90b..60ef22c 100644
--- a/target/linux/mediatek/files-5.4/drivers/net/phy/mediatek-ge.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/phy/mediatek-ge.c
@@ -11,6 +11,10 @@
 #define MTK_PHY_PAGE_EXTENDED_2A30	0x2a30
 #define MTK_PHY_PAGE_EXTENDED_52B5	0x52b5
 
+#define MTK_PHY_RG_DEV1E_REG2C7		0x2c7
+#define   MTK_PHY_MAX_GAIN_MASK		GENMASK(4, 0)
+#define   MTK_PHY_MIN_GAIN_MASK		GENMASK(12, 8)
+
 static int mtk_gephy_read_page(struct phy_device *phydev)
 {
 	return __phy_read(phydev, MTK_EXT_PAGE_ACCESS);
@@ -65,6 +69,11 @@
 	phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x13, 0x404);
 	phy_write_mmd(phydev, MDIO_MMD_VEND1, 0x14, 0x404);
 
+	/* Adjust RX min/max gain to fix CH395 100Mbps link up fail */
+	phy_write_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG2C7,
+		      FIELD_PREP(MTK_PHY_MAX_GAIN_MASK, 0x8) |
+		      FIELD_PREP(MTK_PHY_MIN_GAIN_MASK, 0x13));
+
 	return 0;
 }
 
diff --git a/target/linux/mediatek/files-5.4/drivers/net/phy/mtk/mt753x/mt7531.c b/target/linux/mediatek/files-5.4/drivers/net/phy/mtk/mt753x/mt7531.c
index b27c679..4cfb0ef 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/phy/mtk/mt753x/mt7531.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/phy/mtk/mt753x/mt7531.c
@@ -132,6 +132,10 @@
 #define PHY_DEV1E_REG_189		0x189
 #define PHY_DEV1E_REG_234		0x234
 
+#define PHY_DEV1E_REG_2C7		0x2c7
+#define   MTK_PHY_MAX_GAIN_MASK		GENMASK(4, 0)
+#define   MTK_PHY_MIN_GAIN_MASK		GENMASK(12, 8)
+
 /* Fields of PHY_DEV1E_REG_0C6 */
 #define PHY_POWER_SAVING_S		8
 #define PHY_POWER_SAVING_M		0x300
@@ -874,6 +878,11 @@
 		val = gsw->mii_read(gsw, i, MII_ADVERTISE);
 		val |= ADVERTISE_PAUSE_ASYM;
 		gsw->mii_write(gsw, i, MII_ADVERTISE, val);
+
+		/* Adjust RX min/max gain to fix CH395 100Mbps link up fail */
+		gsw->mmd_write(gsw, i, PHY_DEV1E, PHY_DEV1E_REG_2C7,
+			       FIELD_PREP(MTK_PHY_MAX_GAIN_MASK, 0x8) |
+			       FIELD_PREP(MTK_PHY_MIN_GAIN_MASK, 0x13));
 	}
 }