| commit | 3f7ec6d190d4cebf17913a7943cb942c4c98684c | [log] [tgz] |
|---|---|---|
| author | developer <developer@mediatek.com> | Fri Nov 12 14:59:41 2021 +0800 |
| committer | developer <developer@mediatek.com> | Fri Nov 12 15:17:24 2021 +0800 |
| tree | 031ab74f6c6fecbfe27716601f4e1dd1e0c04798 | |
| parent | af7c350a58fecdf5320818f6da859ad83490e2dc [diff] |
[][Fix system timer clock rate] [Description] Fix system timer clock rate We have set EL0_CNTFRQ to 13Mhz in atf BL2, Remove this wrong value to fix system timer slow-down issue [Release-log] N/A Change-Id: I1b7cd7faf3ba7a772d710536ea6c9fc2f95905ae Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/5260232
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi index 850b20c..bfa2d5c 100644 --- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi +++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
@@ -184,7 +184,7 @@ timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>; - clock-frequency = <40000000>; + clock-frequency = <13000000>; interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,