[][Change spi source clk to 208M]
[Description]
Change spi source clk to 208M
[Release-log]
N/A
Change-Id: I886d7ed2409fedc53e5b2ec5d73228e9b210e79f
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/5255875
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
index bfa2d5c..0184af2 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
@@ -181,6 +181,12 @@
#clock-cells = <0>;
};
+ spi_clk: dummy_spi_clk {
+ compatible = "fixed-clock";
+ clock-frequency = <208000000>;
+ #clock-cells = <0>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
@@ -416,10 +422,10 @@
compatible = "mediatek,ipm-spi-quad";
reg = <0 0x1100a000 0 0x100>;
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>;
+ clocks = <&spi_clk>,
+ <&spi_clk>,
+ <&spi_clk>,
+ <&spi_clk>;
clock-names = "parent-clk", "sel-clk", "spi-clk", "spi-hclk";
status = "disabled";
};
@@ -428,10 +434,10 @@
compatible = "mediatek,ipm-spi-single";
reg = <0 0x1100b000 0 0x100>;
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>;
+ clocks = <&spi_clk>,
+ <&spi_clk>,
+ <&spi_clk>,
+ <&spi_clk>;
clock-names = "parent-clk", "sel-clk", "spi-clk", "spi-hclk";
status = "disabled";
};
@@ -440,10 +446,10 @@
compatible = "mediatek,ipm-spi-quad";
reg = <0 0x11009000 0 0x100>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>,
- <&uart_clk>;
+ clocks = <&spi_clk>,
+ <&spi_clk>,
+ <&spi_clk>,
+ <&spi_clk>;
clock-names = "parent-clk", "sel-clk", "spi-clk", "spi-hclk";
status = "disabled";
};