[][kernel][mt7988][eth][Refactor path for internal 2.5G phy]
[Description]
Refactor path for internal 2.5G phy.
If without this patch, driver cannot handle the gmii path and
10/100mbps half duplex mode properly.
[Release-log]
N/A
Change-Id: I1d4f372590ee62256f6d33ce4b30a522a37129c9
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6721575
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
index 373fdc3..14b51a6 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-emmc.dts
@@ -158,6 +158,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -170,6 +171,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -177,6 +179,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
index 0cf3d6c..a82f180 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-sd.dts
@@ -149,6 +149,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -161,6 +162,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -168,6 +170,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
index 8e49212..7358c69 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-snfi-nand.dts
@@ -184,6 +184,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -196,6 +197,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -203,6 +205,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
index 69f9f2e..0a4800e 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nand.dts
@@ -265,6 +265,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -277,6 +278,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -284,6 +286,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
index 8e832f3..35982e3 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
@@ -174,6 +174,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -186,6 +187,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -193,6 +195,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
index 8f0d5c9..9f93866 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-e2p5g-spim-nand.dts
@@ -269,6 +269,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -281,6 +282,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "gdm";
phy-mode = "2500base-x";
phy-handle = <&phy13>;
};
@@ -288,6 +290,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "gdm";
phy-mode = "2500base-x";
phy-handle = <&phy5>;
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
index e0ffe52..055eba6 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-i2p5g-spim-nand.dts
@@ -182,16 +182,13 @@
status = "disabled";
};
-&usxgmiisys1 {
- internal_2500;
-};
-
ð {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -204,13 +201,15 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
- phy-mode = "10gbase-kr";
+ mac-type = "xgdm";
+ phy-mode = "xgmii";
phy-handle = <&phy0>;
};
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
@@ -221,7 +220,7 @@
phy0: ethernet-phy@0 {
reg = <15>;
compatible = "ethernet-phy-ieee802.3-c45";
- phy-mode = "10gbase-kr";
+ phy-mode = "xgmii";
};
phy1: ethernet-phy@8 {
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
index 4335fcf..4b224a9 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-sfp-spim-nand.dts
@@ -300,6 +300,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -312,6 +313,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
managed = "in-band-status";
sfp = <&sfp_esp1>;
@@ -320,6 +322,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
managed = "in-band-status";
sfp = <&sfp_esp0>;
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
index 86221c2..6332128 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand-4pcie.dts
@@ -280,6 +280,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -292,6 +293,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -299,6 +301,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
index 1f300dd..07ad467 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-gsw-10g-spim-nand.dts
@@ -300,6 +300,7 @@
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
fixed-link {
@@ -312,6 +313,7 @@
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy0>;
};
@@ -319,6 +321,7 @@
gmac2: mac@2 {
compatible = "mediatek,eth-mac";
reg = <2>;
+ mac-type = "xgdm";
phy-mode = "10gbase-kr";
phy-handle = <&phy1>;
};
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
index 2b78ee1..04f3f26 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_path.c
@@ -31,6 +31,8 @@
return "gmac2_rgmii";
case MTK_ETH_PATH_GMAC2_SGMII:
return "gmac2_sgmii";
+ case MTK_ETH_PATH_GMAC2_XGMII:
+ return "gmac2_xgmii";
case MTK_ETH_PATH_GMAC2_GEPHY:
return "gmac2_gephy";
case MTK_ETH_PATH_GMAC3_SGMII:
@@ -133,6 +135,56 @@
return 0;
}
+static int set_mux_gmac2_to_xgmii(struct mtk_eth *eth, u64 path)
+{
+ unsigned int val = 0;
+ bool updated = true;
+ int mac_id = 0;
+
+ dev_dbg(eth->dev, "path %s in %s updated = %d\n",
+ mtk_eth_path_name(path), __func__, updated);
+
+ spin_lock(ð->syscfg0_lock);
+
+ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val);
+
+ switch (path) {
+ case MTK_ETH_PATH_GMAC2_XGMII:
+ val &= ~(u32)SYSCFG0_SGMII_GMAC2_V2;
+ mac_id = MTK_GMAC2_ID;
+ break;
+ default:
+ updated = false;
+ break;
+ };
+
+ if (updated)
+ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0,
+ SYSCFG0_SGMII_MASK, val);
+
+ /* Enable GDM/XGDM Path */
+ if (eth->mac[mac_id]->type == MTK_GDM_TYPE) {
+ val = mtk_r32(eth, MTK_GDMA_EG_CTRL(mac_id));
+ mtk_w32(eth, val & ~MTK_GDMA_XGDM_SEL,
+ MTK_GDMA_EG_CTRL(mac_id));
+ } else if (eth->mac[mac_id]->type == MTK_XGDM_TYPE) {
+ val = mtk_r32(eth, MTK_GDMA_EG_CTRL(mac_id));
+ mtk_w32(eth, val | MTK_GDMA_XGDM_SEL,
+ MTK_GDMA_EG_CTRL(mac_id));
+
+ val = mtk_r32(eth, MTK_XGMAC_STS(mac_id));
+ mtk_w32(eth, val | (MTK_XGMAC_FORCE_LINK << 16),
+ MTK_XGMAC_STS(mac_id));
+ }
+
+ spin_unlock(ð->syscfg0_lock);
+
+ dev_dbg(eth->dev, "path %s in %s updated = %d\n",
+ mtk_eth_path_name(path), __func__, updated);
+
+ return 0;
+}
+
static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path)
{
unsigned int val = 0;
@@ -179,7 +231,7 @@
{
unsigned int val = 0;
bool updated = true;
- int mac_id = 0, id = 0;
+ int mac_id = 0;
dev_dbg(eth->dev, "path %s in %s updated = %d\n",
mtk_eth_path_name(path), __func__, updated);
@@ -210,19 +262,10 @@
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) &&
mac_id == MTK_GMAC2_ID) {
- id = mtk_mac2xgmii_id(eth, mac_id);
- if (MTK_HAS_FLAGS(eth->xgmii->flags[id],
- MTK_USXGMII_INT_2500)) {
- val = mtk_r32(eth, MTK_XGMAC_STS(mac_id));
- mtk_w32(eth,
- val | (MTK_XGMAC_FORCE_LINK << 16),
- MTK_XGMAC_STS(mac_id));
- } else {
- regmap_update_bits(eth->infra,
- TOP_MISC_NETSYS_PCS_MUX,
- NETSYS_PCS_MUX_MASK,
- MUX_G2_USXGMII_SEL);
- }
+ regmap_update_bits(eth->infra,
+ TOP_MISC_NETSYS_PCS_MUX,
+ NETSYS_PCS_MUX_MASK,
+ MUX_G2_USXGMII_SEL);
}
}
@@ -290,6 +333,10 @@
.cap_bit = MTK_ETH_MUX_U3_GMAC2_TO_QPHY,
.set_path = set_mux_u3_gmac2_to_qphy,
}, {
+ .name = "mux_gmac2_to_xgmii",
+ .cap_bit = MTK_ETH_MUX_GMAC2_TO_XGMII,
+ .set_path = set_mux_gmac2_to_xgmii,
+ }, {
.name = "mux_gmac1_gmac2_to_sgmii_rgmii",
.cap_bit = MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII,
.set_path = set_mux_gmac1_gmac2_to_sgmii_rgmii,
@@ -374,6 +421,25 @@
return 0;
}
+int mtk_gmac_xgmii_path_setup(struct mtk_eth *eth, int mac_id)
+{
+ int err;
+ u64 path;
+
+ if (mac_id == 1)
+ path = MTK_ETH_PATH_GMAC2_XGMII;
+
+ if (!path)
+ return -EINVAL;
+
+ /* Setup proper MUXes along the path */
+ err = mtk_eth_mux_setup(eth, path);
+ if (err)
+ return err;
+
+ return 0;
+}
+
int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id)
{
int err;
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 37b6c68..080e53e 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -332,6 +332,13 @@
goto init_err;
}
break;
+ case PHY_INTERFACE_MODE_XGMII:
+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_XGMII)) {
+ err = mtk_gmac_xgmii_path_setup(eth, mac->id);
+ if (err)
+ goto init_err;
+ }
+ break;
case PHY_INTERFACE_MODE_USXGMII:
case PHY_INTERFACE_MODE_10GKR:
if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) {
@@ -455,8 +462,7 @@
}
/* Setup gmac */
- if (state->interface == PHY_INTERFACE_MODE_USXGMII ||
- state->interface == PHY_INTERFACE_MODE_10GKR) {
+ if (mac->type == MTK_XGDM_TYPE) {
mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id));
mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id));
@@ -683,6 +689,8 @@
!(MTK_HAS_CAPS(mac->hw->soc->caps, MTK_SGMII) &&
(state->interface == PHY_INTERFACE_MODE_SGMII ||
phy_interface_mode_is_8023z(state->interface))) &&
+ !(MTK_HAS_CAPS(mac->hw->soc->caps, MTK_XGMII) &&
+ (state->interface == PHY_INTERFACE_MODE_XGMII)) &&
!(MTK_HAS_CAPS(mac->hw->soc->caps, MTK_USXGMII) &&
(state->interface == PHY_INTERFACE_MODE_USXGMII)) &&
!(MTK_HAS_CAPS(mac->hw->soc->caps, MTK_USXGMII) &&
@@ -715,6 +723,8 @@
case PHY_INTERFACE_MODE_TRGMII:
phylink_set(mask, 1000baseT_Full);
break;
+ case PHY_INTERFACE_MODE_XGMII:
+ /* fall through */
case PHY_INTERFACE_MODE_1000BASEX:
phylink_set(mask, 1000baseX_Full);
/* fall through; */
@@ -774,6 +784,12 @@
}
}
+ if (mac->type == MTK_XGDM_TYPE) {
+ phylink_clear(mask, 10baseT_Half);
+ phylink_clear(mask, 100baseT_Half);
+ phylink_clear(mask, 1000baseT_Half);
+ }
+
phylink_set(mask, Pause);
phylink_set(mask, Asym_Pause);
@@ -3841,8 +3857,9 @@
static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
{
const __be32 *_id = of_get_property(np, "reg", NULL);
+ const char *label;
struct phylink *phylink;
- int phy_mode, id, err;
+ int mac_type, phy_mode, id, err;
struct mtk_mac *mac;
struct mtk_phylink_priv *phylink_priv;
struct fwnode_handle *fixed_node;
@@ -3906,9 +3923,25 @@
mac->phylink_config.dev = ð->netdev[id]->dev;
mac->phylink_config.type = PHYLINK_NETDEV;
- mac->type = (phy_mode == PHY_INTERFACE_MODE_10GKR ||
- phy_mode == PHY_INTERFACE_MODE_USXGMII) ?
- MTK_XGDM_TYPE : MTK_GDM_TYPE;
+ mac->type = 0;
+ if (!of_property_read_string(np, "mac-type", &label)) {
+ for (mac_type = 0; mac_type < MTK_GDM_TYPE_MAX; mac_type++) {
+ if (!strcasecmp(label, gdm_type(mac_type)))
+ break;
+ }
+
+ switch (mac_type) {
+ case 0:
+ mac->type = MTK_GDM_TYPE;
+ break;
+ case 1:
+ mac->type = MTK_XGDM_TYPE;
+ break;
+ default:
+ dev_warn(eth->dev, "incorrect mac-type\n");
+ break;
+ };
+ }
phylink = phylink_create(&mac->phylink_config,
of_fwnode_handle(mac->of_node),
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 39543c7..a961042 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -1090,6 +1090,18 @@
MTK_GDM_TYPE_MAX
};
+static inline const char *gdm_type(int type)
+{
+ switch (type) {
+ case MTK_GDM_TYPE:
+ return "gdm";
+ case MTK_XGDM_TYPE:
+ return "xgdm";
+ default:
+ return "unkown";
+ }
+}
+
/* struct mtk_tx_buf - This struct holds the pointers to the memory pointed at
* by the TX descriptor s
* @skb: The SKB pointer of the packet being sent
@@ -1180,6 +1192,7 @@
MTK_RGMII_BIT = 0,
MTK_TRGMII_BIT,
MTK_SGMII_BIT,
+ MTK_XGMII_BIT,
MTK_USXGMII_BIT,
MTK_ESW_BIT,
MTK_GEPHY_BIT,
@@ -1203,6 +1216,7 @@
MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT,
MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT,
MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT,
+ MTK_ETH_MUX_GMAC2_TO_XGMII_BIT,
MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT,
MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT,
MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT,
@@ -1214,6 +1228,7 @@
MTK_ETH_PATH_GMAC1_SGMII_BIT,
MTK_ETH_PATH_GMAC2_RGMII_BIT,
MTK_ETH_PATH_GMAC2_SGMII_BIT,
+ MTK_ETH_PATH_GMAC2_XGMII_BIT,
MTK_ETH_PATH_GMAC2_GEPHY_BIT,
MTK_ETH_PATH_GMAC3_SGMII_BIT,
MTK_ETH_PATH_GDM1_ESW_BIT,
@@ -1226,6 +1241,7 @@
#define MTK_RGMII BIT_ULL(MTK_RGMII_BIT)
#define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT)
#define MTK_SGMII BIT_ULL(MTK_SGMII_BIT)
+#define MTK_XGMII BIT_ULL(MTK_XGMII_BIT)
#define MTK_USXGMII BIT_ULL(MTK_USXGMII_BIT)
#define MTK_ESW BIT_ULL(MTK_ESW_BIT)
#define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT)
@@ -1251,6 +1267,8 @@
BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT)
#define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \
BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT)
+#define MTK_ETH_MUX_GMAC2_TO_XGMII \
+ BIT_ULL(MTK_ETH_MUX_GMAC2_TO_XGMII_BIT)
#define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \
BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT)
#define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \
@@ -1266,6 +1284,7 @@
#define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT)
#define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT)
#define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT)
+#define MTK_ETH_PATH_GMAC2_XGMII BIT_ULL(MTK_ETH_PATH_GMAC2_XGMII_BIT)
#define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT)
#define MTK_ETH_PATH_GMAC3_SGMII BIT_ULL(MTK_ETH_PATH_GMAC3_SGMII_BIT)
#define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT)
@@ -1278,6 +1297,7 @@
#define MTK_GMAC1_SGMII (MTK_ETH_PATH_GMAC1_SGMII | MTK_SGMII)
#define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII)
#define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII)
+#define MTK_GMAC2_XGMII (MTK_ETH_PATH_GMAC2_XGMII | MTK_XGMII)
#define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY)
#define MTK_GMAC3_SGMII (MTK_ETH_PATH_GMAC3_SGMII | MTK_SGMII)
#define MTK_GDM1_ESW (MTK_ETH_PATH_GDM1_ESW | MTK_ESW)
@@ -1302,6 +1322,10 @@
(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_MUX | \
MTK_SHARED_SGMII)
+/* 2: GMAC2 -> XGMII */
+#define MTK_MUX_GMAC2_TO_XGMII \
+ (MTK_ETH_MUX_GMAC2_TO_XGMII | MTK_MUX | MTK_INFRA)
+
/* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */
#define MTK_MUX_GMAC12_TO_GEPHY_SGMII \
(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX)
@@ -1347,7 +1371,8 @@
MTK_MUX_GMAC123_TO_GEPHY_SGMII | MTK_QDMA | \
MTK_NETSYS_V3 | MTK_RSTCTRL_PPE1 | \
MTK_GMAC1_USXGMII | MTK_GMAC2_USXGMII | \
- MTK_GMAC3_USXGMII | MTK_MUX_GMAC123_TO_USXGMII | MTK_RSS)
+ MTK_GMAC3_USXGMII | MTK_MUX_GMAC123_TO_USXGMII | \
+ MTK_GMAC2_XGMII | MTK_MUX_GMAC2_TO_XGMII | MTK_RSS)
struct mtk_tx_dma_desc_info {
dma_addr_t addr;
@@ -1405,7 +1430,6 @@
#define MTK_SGMII_PHYSPEED_5000 BIT(2)
#define MTK_SGMII_PHYSPEED_10000 BIT(3)
#define MTK_SGMII_PN_SWAP BIT(16)
-#define MTK_USXGMII_INT_2500 BIT(17)
#define MTK_HAS_FLAGS(flags, _x) (((flags) & (_x)) == (_x))
/* struct mtk_xgmii - This is the structure holding sgmii/usxgmii regmap and
@@ -1574,6 +1598,7 @@
void mtk_sgmii_setup_phya_gen2(struct mtk_xgmii *ss, int mac_id);
int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id);
+int mtk_gmac_xgmii_path_setup(struct mtk_eth *eth, int mac_id);
int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id);
int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id);
int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id);
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
index 363de90..7d4a3ed 100644
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_usxgmii.c
@@ -22,10 +22,6 @@
ss->regmap_usxgmii[i] = syscon_node_to_regmap(np);
if (IS_ERR(ss->regmap_usxgmii[i]))
return PTR_ERR(ss->regmap_usxgmii[i]);
-
- ss->flags[i] &= ~(MTK_USXGMII_INT_2500);
- if (of_property_read_bool(np, "internal_2500"))
- ss->flags[i] |= MTK_USXGMII_INT_2500;
}
return 0;