| commit | 2a050ba942a528a44e9e95db350aa40a8d617f6d | [log] [tgz] |
|---|---|---|
| author | developer <developer@mediatek.com> | Thu Dec 01 16:11:06 2022 +0800 |
| committer | developer <developer@mediatek.com> | Fri Dec 02 07:25:38 2022 +0800 |
| tree | 1498f701dfb536cf117ced6b3f3b8e807c76d9c7 | |
| parent | b6555331b18e53657920bf1a95540993cfa59148 [diff] [blame] |
[][Kernel][mt7988][hnat][Correct PPE2 base address] [Description] Fix PPE2 base address to 0x15102e00. If without this patch, driver might access wrong base address. [Release-log] N/A Change-Id: I292d31e95adf0f9368ef1bbf9c7029e560dab9e5 Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6859603
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h index 00eec80..45b2e24 100755 --- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -171,7 +171,7 @@ #define PDMA_BASE 0x6800 #define QDMA_BASE 0x4400 #define WDMA_BASE(x) (0x4800 + ((x) * 0x400)) -#define PPE_BASE(x) ((x == 2) ? 0x2C00 : 0x2200 + ((x) * 0x400)) +#define PPE_BASE(x) ((x == 2) ? 0x2E00 : 0x2200 + ((x) * 0x400)) #elif defined(CONFIG_MEDIATEK_NETSYS_V2) #define PDMA_BASE 0x6000 #define QDMA_BASE 0x4400