[][openwrt-24][mac80211][hnat][Add wed over 4GB dram support]

[Description]
Add wed over 4GB dram support
without this patch wed will init fail on over 4GB dram board

[Release-log]

Change-Id: I0e46cd13078a6c016eed8e28f1a4788f7e0754d6
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/9778379
diff --git a/autobuild/unified/filogic/mac80211/master/files/target/linux/mediatek/patches-6.6/999-3001-mtk-wed-add-dma-mask-limitation-and-GFP_DMA32-for-bo.patch b/autobuild/unified/filogic/mac80211/master/files/target/linux/mediatek/patches-6.6/999-3001-mtk-wed-add-dma-mask-limitation-and-GFP_DMA32-for-bo.patch
new file mode 100644
index 0000000..2bf4f15
--- /dev/null
+++ b/autobuild/unified/filogic/mac80211/master/files/target/linux/mediatek/patches-6.6/999-3001-mtk-wed-add-dma-mask-limitation-and-GFP_DMA32-for-bo.patch
@@ -0,0 +1,45 @@
+From d8ad903337b79bc32ae138bf9ef04f31613e4bf2 Mon Sep 17 00:00:00 2001
+From: Rex Lu <rex.lu@mediatek.com>
+Date: Mon, 21 Oct 2024 12:37:18 +0800
+Subject: [PATCH] mtk: wed: add dma mask limitation and GFP_DMA32 for board >=
+ 4GB dram
+
+---
+ drivers/net/ethernet/mediatek/mtk_wed.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/net/ethernet/mediatek/mtk_wed.c b/drivers/net/ethernet/mediatek/mtk_wed.c
+index bcc4f9c..6956c5d 100644
+--- a/drivers/net/ethernet/mediatek/mtk_wed.c
++++ b/drivers/net/ethernet/mediatek/mtk_wed.c
+@@ -670,7 +670,7 @@ mtk_wed_tx_buffer_alloc(struct mtk_wed_device *dev)
+ 		void *buf;
+ 		int s;
+ 
+-		page = __dev_alloc_page(GFP_KERNEL);
++		page = __dev_alloc_pages(GFP_KERNEL | GFP_DMA32, 0);
+ 		if (!page)
+ 			return -ENOMEM;
+ 
+@@ -793,7 +793,7 @@ mtk_wed_hwrro_buffer_alloc(struct mtk_wed_device *dev)
+ 		struct page *page;
+ 		int s;
+ 
+-		page = __dev_alloc_page(GFP_KERNEL);
++		page = __dev_alloc_pages(GFP_KERNEL | GFP_DMA32, 0);
+ 		if (!page)
+ 			return -ENOMEM;
+ 
+@@ -2435,6 +2435,9 @@ mtk_wed_attach(struct mtk_wed_device *dev)
+ 	dev->wdma_idx = hw->index;
+ 	dev->version = hw->version;
+ 	dev->hw->pcie_base = mtk_wed_get_pcie_base(dev);
++	ret = dma_set_mask_and_coherent(hw->dev, DMA_BIT_MASK(32));
++	if (ret)
++		return ret;
+ 
+ 	if (hw->eth->dma_dev == hw->eth->dev &&
+ 	    of_dma_is_coherent(hw->eth->dev->of_node))
+-- 
+2.45.2
+