diff --git a/target/linux/mediatek/patches-5.4/0495-mtd-spinand-winbond-Support-for-W25N01KV.patch b/target/linux/mediatek/patches-5.4/0495-mtd-spinand-winbond-Support-for-W25N01KV.patch
new file mode 100644
index 0000000..0bc81a6
--- /dev/null
+++ b/target/linux/mediatek/patches-5.4/0495-mtd-spinand-winbond-Support-for-W25N01KV.patch
@@ -0,0 +1,91 @@
+diff -uprN a/drivers/mtd/mtk-snand/mtk-snand-ids.c b/drivers/mtd/mtk-snand/mtk-snand-ids.c
+--- a/drivers/mtd/mtk-snand/mtk-snand-ids.c	2022-11-28 18:40:19.022239828 +0800
++++ b/drivers/mtd/mtk-snand/mtk-snand-ids.c	2022-11-28 18:39:50.521971974 +0800
+@@ -90,6 +90,10 @@ static const struct snand_flash_info sna
+ 		   &snand_cap_read_from_cache_quad,
+ 		   &snand_cap_program_load_x4,
+ 		   mtk_snand_winbond_select_die),
++	SNAND_INFO("W25N01KV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xae, 0x21),
++		   SNAND_MEMORG_1G_2K_64,
++		   &snand_cap_read_from_cache_quad,
++		   &snand_cap_program_load_x4),
+ 	SNAND_INFO("W25N02KV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xaa, 0x22),
+ 		   SNAND_MEMORG_2G_2K_128,
+ 		   &snand_cap_read_from_cache_quad,
+diff -uprN a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
+--- a/drivers/mtd/nand/spi/Kconfig	2022-11-28 18:40:18.994239565 +0800
++++ b/drivers/mtd/nand/spi/Kconfig	2022-11-28 18:39:50.477971561 +0800
+@@ -7,11 +7,3 @@ menuconfig MTD_SPI_NAND
+ 	help
+ 	  This is the framework for the SPI NAND device drivers.
+ 
+-config MTD_SPI_NAND_W25N01KV
+-	tristate "Winbond W25N01KV Support"
+-	select MTD_SPI_NAND
+-	default n
+-	help
+-	  Winbond W25N01KV share the same ID with W25N01GV. However, they have
+-	  different attributes.
+-
+diff -uprN a/drivers/mtd/nand/spi/winbond.c b/drivers/mtd/nand/spi/winbond.c
+--- a/drivers/mtd/nand/spi/winbond.c	2022-11-28 18:40:18.994239565 +0800
++++ b/drivers/mtd/nand/spi/winbond.c	2022-11-28 18:39:50.477971561 +0800
+@@ -26,13 +26,11 @@
+ #define W25N01_M02GV_STATUS_ECC_1_BITFLIPS	(1 << 4)
+ #define W25N01_M02GV_STATUS_ECC_UNCOR_ERROR	(2 << 4)
+ 
+-#if IS_ENABLED(CONFIG_MTD_SPI_NAND_W25N01KV)
+ #define W25N01KV_STATUS_ECC_MASK		(3 << 4)
+ #define W25N01KV_STATUS_ECC_NO_BITFLIPS		(0 << 4)
+ #define W25N01KV_STATUS_ECC_1_3_BITFLIPS	(1 << 4)
+ #define W25N01KV_STATUS_ECC_4_BITFLIPS		(3 << 4)
+ #define W25N01KV_STATUS_ECC_UNCOR_ERROR		(2 << 4)
+-#endif
+ 
+ static SPINAND_OP_VARIANTS(read_cache_variants,
+ 		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+@@ -116,7 +114,6 @@ static int w25m02gv_select_target(struct
+ 	return spi_mem_exec_op(spinand->spimem, &op);
+ }
+ 
+-#if IS_ENABLED(CONFIG_MTD_SPI_NAND_W25N01KV)
+ static int w25n01kv_ecc_get_status(struct spinand_device *spinand,
+ 					u8 status)
+ {
+@@ -139,7 +136,6 @@ static int w25n01kv_ecc_get_status(struc
+ 
+ 	return -EINVAL;
+ }
+-#endif
+ 
+ static int w25n02kv_n04kv_ecc_get_status(struct spinand_device *spinand,
+ 					u8 status)
+@@ -181,10 +177,9 @@ static const struct spinand_info winbond
+ 		     0,
+ 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL),
+ 		     SPINAND_SELECT_TARGET(w25m02gv_select_target)),
+-#if IS_ENABLED(CONFIG_MTD_SPI_NAND_W25N01KV)
+ 	SPINAND_INFO("W25N01KV",
+-		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x21),
+-		     NAND_MEMORG(1, 2048, 96, 64, 1024, 20, 1, 1, 1),
++		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xae, 0x21),
++		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ 		     NAND_ECCREQ(4, 512),
+ 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ 					      &write_cache_variants,
+@@ -192,7 +187,6 @@ static const struct spinand_info winbond
+ 		     0,
+ 		     SPINAND_ECCINFO(&w25n02kv_n04kv_ooblayout,
+ 				     w25n01kv_ecc_get_status)),
+-#else
+ 	SPINAND_INFO("W25N01GV",
+ 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x21),
+ 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+@@ -202,7 +196,6 @@ static const struct spinand_info winbond
+ 					      &update_cache_variants),
+ 		     0,
+ 		     SPINAND_ECCINFO(&w25m02gv_ooblayout, NULL)),
+-#endif
+ 	SPINAND_INFO("W25N02KV",
+ 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xaa, 0x22),
+ 		     NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),