diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
index 14739ac..971a171 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988-clkitg.dtsi
@@ -103,7 +103,7 @@
 			<&topckgen CK_TOP_NETSYS_PAO_2X_SEL>,
 			<&topckgen CK_TOP_EIP197_SEL>,
 			<&topckgen CK_TOP_AXI_INFRA_SEL>,
-			<&topckgen CK_TOP_UART_SEL>,
+			<&system_clk>,
 			<&topckgen CK_TOP_EMMC_250M_SEL>,
 			<&topckgen CK_TOP_EMMC_400M_SEL>,
 			<&topckgen CK_TOP_SPI_SEL>,
@@ -176,11 +176,11 @@
 			<&infracfg CK_INFRA_FAUD_AUD_O>,
 			<&infracfg CK_INFRA_FAUD_EG2_O>,
 			<&infracfg CK_INFRA_I2C_O>,
-			<&infracfg CK_INFRA_UART_O0>,
-			<&infracfg CK_INFRA_UART_O1>,
-			<&infracfg CK_INFRA_UART_O2>,
+			<&system_clk>,
 			<&system_clk>,
 			<&system_clk>,
+			<&system_clk>,
+			<&system_clk>,
 			<&infracfg CK_INFRA_SPI0_O>,
 			<&infracfg CK_INFRA_SPI1_O>,
 			<&infracfg CK_INFRA_LB_MUX_FRTC>,
@@ -233,11 +233,11 @@
 			<&infracfg_ao CK_INFRA_PRE_CK_SEJ_F13M>,
 			<&system_clk>,
 			<&infracfg_ao CK_INFRA_I2C_BCK>,
-			<&infracfg_ao CK_INFRA_52M_UART0_CK>,
-			<&infracfg_ao CK_INFRA_52M_UART1_CK>,
-			<&infracfg_ao CK_INFRA_52M_UART2_CK>,
+			<&system_clk>,
 			<&system_clk>,
 			<&system_clk>,
+			<&system_clk>,
+			<&system_clk>,
 			<&infracfg_ao CK_INFRA_66M_NFI_HCK>,
 			<&infracfg_ao CK_INFRA_104M_SPI0>,
 			<&infracfg_ao CK_INFRA_104M_SPI1>,
@@ -289,9 +289,9 @@
 			<&system_clk>,
 			<&system_clk>,
 			<&system_clk>,
+			<&system_clk>,
-			<&infracfg_ao CK_INFRA_MUX_UART0_SEL>,
-			<&infracfg_ao CK_INFRA_MUX_UART1_SEL>,
-			<&infracfg_ao CK_INFRA_MUX_UART2_SEL>,
+			<&system_clk>,
+			<&system_clk>,
 			<&infracfg_ao CK_INFRA_MUX_SPI0_SEL>,
 			<&infracfg_ao CK_INFRA_MUX_SPI1_SEL>,
 			<&infracfg_ao CK_INFRA_MUX_SPI2_SEL>,
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
index e7f5b6d..8e08930 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988.dtsi
@@ -338,12 +338,6 @@
 		#clock-cells = <0>;
 	};
 
-	uart_clk: dummy_uart_clk {
-		compatible = "fixed-clock";
-		clock-frequency = <40000000>;
-		#clock-cells = <0>;
-	};
-
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupt-parent = <&gic>;
@@ -395,7 +389,12 @@
 			     "mediatek,mt6577-uart";
 		reg = <0 0x11000000 0 0x100>;
 		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&uart_clk>;
+		clocks = <&infracfg_ao CK_INFRA_52M_UART0_CK>;
+		clock-names = "bus";
+		assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
+				  <&infracfg_ao CK_INFRA_MUX_UART0_SEL>;
+		assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+					 <&infracfg CK_INFRA_UART_O0>;
 		status = "disabled";
 	};
 
@@ -404,7 +403,12 @@
 			     "mediatek,mt6577-uart";
 		reg = <0 0x11000100 0 0x100>;
 		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&uart_clk>;
+		clocks = <&infracfg_ao CK_INFRA_52M_UART1_CK>;
+		clock-names = "bus";
+		assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
+				  <&infracfg_ao CK_INFRA_MUX_UART1_SEL>;
+		assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+					 <&infracfg CK_INFRA_UART_O1>;
 		status = "disabled";
 	};
 
@@ -413,7 +417,12 @@
 			     "mediatek,mt6577-uart";
 		reg = <0 0x11000200 0 0x100>;
 		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&uart_clk>;
+		clocks = <&infracfg_ao CK_INFRA_52M_UART2_CK>;
+		clock-names = "bus";
+		assigned-clocks = <&topckgen CK_TOP_UART_SEL>,
+				  <&infracfg_ao CK_INFRA_MUX_UART2_SEL>;
+		assigned-clock-parents = <&topckgen CK_TOP_CB_CKSQ_40M>,
+					 <&infracfg CK_INFRA_UART_O2>;
 		status = "disabled";
 	};