diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
index 1a302ee..19df422 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
@@ -84,7 +84,7 @@
 			<&infracfg_ao CK_INFRA_AP_DMA_CK>,
 			<&infracfg_ao CK_INFRA_SEJ_CK>,
 			<&infracfg_ao CK_INFRA_SEJ_13M_CK>,
-			<&infracfg_ao CK_INFRA_THERM_CK>,
+			<&clk40m>,
 			<&clk40m>,
 			<&clk40m>,
 			<&clk40m>,
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
index 0f5c805..f4d0b78 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
@@ -52,6 +52,29 @@
 		clock-names = "top", "main", "pwm1", "pwm2", "pwm3";
 	};
 
+	thermal-zones {
+		cpu_thermal: cpu-thermal {
+			polling-delay-passive = <1000>;
+			polling-delay = <1000>;
+			thermal-sensors = <&thermal 0>;
+		};
+	};
+
+	thermal: thermal@1100c800 {
+		#thermal-sensor-cells = <1>;
+		compatible = "mediatek,mt7981-thermal";
+		reg = <0 0x1100c800 0 0x800>;
+		interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&infracfg_ao CK_INFRA_THERM_CK>,
+			 <&infracfg_ao CK_INFRA_ADC_26M_CK>,
+			 <&infracfg_ao CK_INFRA_ADC_FRC_CK>;
+		clock-names = "therm", "auxadc", "adc_32k";
+		mediatek,auxadc = <&auxadc>;
+		mediatek,apmixedsys = <&apmixedsys>;
+		nvmem-cells = <&thermal_calibration>;
+		nvmem-cell-names = "calibration-data";
+	};
+
 	auxadc: adc@1100d000 {
 		compatible = "mediatek,mt7981-auxadc",
 			     "mediatek,mt7622-auxadc";
diff --git a/target/linux/mediatek/files-5.4/drivers/thermal/mtk_thermal.c b/target/linux/mediatek/files-5.4/drivers/thermal/mtk_thermal.c
index 5c004a8..1351b13 100644
--- a/target/linux/mediatek/files-5.4/drivers/thermal/mtk_thermal.c
+++ b/target/linux/mediatek/files-5.4/drivers/thermal/mtk_thermal.c
@@ -150,7 +150,7 @@
 
 /*
  * Layout of the fuses providing the calibration data
- * These macros could be used for MT7986.
+ * These macros could be used for MT7981 and MT7986.
  */
 #define CALIB_BUF0_ADC_GE_V3(x)		(((x) >> 0) & 0x3ff)
 #define CALIB_BUF0_ADC_OE_V3(x)		(((x) >> 10) & 0x3ff)
@@ -260,6 +260,27 @@
 #define MT8183_CALIBRATION	153
 
 /* AUXADC channel 11 is used for the temperature sensors */
+#define MT7981_TEMP_AUXADC_CHANNEL	11
+
+/* The total number of temperature sensors in the MT7981 */
+#define MT7981_NUM_SENSORS		1
+
+/* The number of banks in the MT7981 */
+#define MT7981_NUM_ZONES		1
+
+/* The number of sensing points per bank */
+#define MT7981_NUM_SENSORS_PER_ZONE	1
+
+/* MT7981 thermal sensors */
+#define MT7981_TS1	0
+
+/* The number of controller in the MT7981 */
+#define MT7981_NUM_CONTROLLER		1
+
+/* The calibration coefficient of sensor  */
+#define MT7981_CALIBRATION		165
+
+/* AUXADC channel 11 is used for the temperature sensors */
 #define MT7986_TEMP_AUXADC_CHANNEL	11
 
 /* The total number of temperature sensors in the MT7986 */
@@ -422,6 +443,14 @@
 static const int mt7622_vts_index[MT7622_NUM_SENSORS] = { VTS1 };
 static const int mt7622_tc_offset[MT7622_NUM_CONTROLLER] = { 0x0, };
 
+/* MT7981 thermal sensor data */
+static const int mt7981_bank_data[MT7981_NUM_SENSORS] = { MT7981_TS1, };
+static const int mt7981_msr[MT7981_NUM_SENSORS_PER_ZONE] = { TEMP_MSR0, };
+static const int mt7981_adcpnp[MT7981_NUM_SENSORS_PER_ZONE] = {	TEMP_ADCPNP0, };
+static const int mt7981_mux_values[MT7981_NUM_SENSORS] = { 0, };
+static const int mt7981_vts_index[MT7981_NUM_SENSORS] = { VTS1 };
+static const int mt7981_tc_offset[MT7981_NUM_CONTROLLER] = { 0x0, };
+
 /* MT7986 thermal sensor data */
 static const int mt7986_bank_data[MT7986_NUM_SENSORS] = { MT7986_TS1, };
 static const int mt7986_msr[MT7986_NUM_SENSORS_PER_ZONE] = { TEMP_MSR0, };
@@ -594,6 +623,30 @@
 };
 
 /*
+ * MT7981 uses AUXADC Channel 11 for raw data access.
+ */
+static const struct mtk_thermal_data mt7981_thermal_data = {
+	.auxadc_channel = MT7981_TEMP_AUXADC_CHANNEL,
+	.num_banks = MT7981_NUM_ZONES,
+	.num_sensors = MT7981_NUM_SENSORS,
+	.vts_index = mt7981_vts_index,
+	.cali_val = MT7981_CALIBRATION,
+	.num_controller = MT7981_NUM_CONTROLLER,
+	.controller_offset = mt7981_tc_offset,
+	.need_switch_bank = true,
+	.bank_data = {
+		{
+			.num_sensors = 1,
+			.sensors = mt7981_bank_data,
+		},
+	},
+	.msr = mt7981_msr,
+	.adcpnp = mt7981_adcpnp,
+	.sensor_mux_values = mt7981_mux_values,
+	.version = MTK_THERMAL_V3,
+};
+
+/*
  * MT7986 uses AUXADC Channel 11 for raw data access.
  */
 static const struct mtk_thermal_data mt7986_thermal_data = {
@@ -1070,6 +1123,10 @@
 		.data = (void *)&mt8183_thermal_data,
 	},
 	{
+		.compatible = "mediatek,mt7981-thermal",
+		.data = (void *)&mt7981_thermal_data,
+	},
+	{
 		.compatible = "mediatek,mt7986-thermal",
 		.data = (void *)&mt7986_thermal_data,
 	}, {