diff --git a/feed/app/switch/src/Makefile b/feed/app/switch/src/Makefile
index 81ae127..1d88a8c 100644
--- a/feed/app/switch/src/Makefile
+++ b/feed/app/switch/src/Makefile
@@ -1,6 +1,10 @@
 EXEC = switch
 
 SRC=switch_fun.c switch_753x.c switch_ioctl.c switch_netlink.c
+SRC+=switch_fun_an8855.c an8855_sdk/api/src/*.c
+
+CFLAGS+=-I./an8855_sdk/api/inc
+CFLAGS+=-DCOMPAT_MODE
 
 all: $(EXEC)
 
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air.h b/feed/app/switch/src/an8855_sdk/api/inc/air.h
new file mode 100644
index 0000000..c62174f
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air.h
@@ -0,0 +1,216 @@
+/* FILE NAME:   air.h
+ * PURPOSE:
+ *      Define the initialization in AIR SDK.
+ * NOTES:
+ */
+
+#ifndef AIR_H
+#define AIR_H
+
+/* INCLUDE FILE DECLARATIONS
+ */
+#include <stdio.h>
+#include <string.h>
+#include "air_types.h"
+#include "air_error.h"
+#include "air_reg.h"
+#include "air_aml.h"
+#include "air_port.h"
+#include "air_vlan.h"
+#include "air_lag.h"
+#include "air_l2.h"
+#include "air_stp.h"
+#include "air_mirror.h"
+#include "air_mib.h"
+#include "air_diag.h"
+#include "air_led.h"
+#include "air_cmd.h"
+#include "air_qos.h"
+#include "air_switch.h"
+#include "air_ver.h"
+#include "air_sec.h"
+#include "air_acl.h"
+#include "air_sptag.h"
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+#define AIR_CHECK_PTR(__ptr__) do                                          \
+{                                                                           \
+    if (NULL == (__ptr__))                                                  \
+    {                                                                       \
+        return  AIR_E_BAD_PARAMETER;                                       \
+    }                                                                       \
+} while (0)
+
+#define AIR_PARAM_CHK(expr, errCode) do                                    \
+{                                                                           \
+    if ((I32_T)(expr))                                                      \
+    {                                                                       \
+        return errCode;                                                     \
+    }                                                                       \
+} while (0)
+
+#define AIR_PRINT(fmt,...) do                                              \
+{                                                                           \
+    if (_ext_printf)                                                        \
+    {                                                                       \
+        _ext_printf(fmt, ##__VA_ARGS__);                                    \
+    }                                                                       \
+}while (0)
+
+#define AIR_UDELAY(us) do                                                  \
+{                                                                           \
+    if (_ext_udelay)                                                        \
+    {                                                                       \
+        _ext_udelay(us);                                                    \
+    }                                                                       \
+}while (0)
+
+#define AIR_MALLOC(size) (_ext_malloc ? _ext_malloc(size) : NULL)
+
+#define AIR_FREE(ptr) do                                                   \
+    {                                                                       \
+        if (ptr && _ext_free)                                               \
+        {                                                                   \
+            _ext_free(ptr);                                                 \
+        }                                                                   \
+    }while (0)
+
+#ifndef BIT
+#define BIT(nr) (1UL << (nr))
+#endif	/* End of BIT */
+
+/* bits range: for example BITS(16,23) = 0xFF0000*/
+#ifndef BITS
+#define BITS(m, n)   (~(BIT(m) - 1) & ((BIT(n) - 1) | BIT(n)))
+#endif	/* End of BITS */
+
+/* bits range: for example BITS_RANGE(16,4) = 0x0F0000*/
+#ifndef BITS_RANGE
+#define BITS_RANGE(offset, range)   BITS(offset, ((offset)+(range)-1))
+#endif	/* End of BITS_RANGE */
+
+/* bits offset right: for example BITS_OFF_R(0x1234, 8, 4) = 0x2 */
+#ifndef BITS_OFF_R
+#define BITS_OFF_R(val, offset, range)   ((val >> offset) & (BIT(range) - 1))
+#endif	/* End of BITS_OFF_R */
+
+/* bits offset left: for example BITS_OFF_L(0x1234, 8, 4) = 0x400 */
+#ifndef BITS_OFF_L
+#define BITS_OFF_L(val, offset, range)   ((val & (BIT(range) - 1)) << offset)
+#endif	/* End of BITS_OFF_L */
+
+#ifndef MAX
+#define MAX(a, b)   (((a)>(b))?(a):(b))
+#endif	/* End of MAX */
+
+#ifndef MIN
+#define MIN(a, b)   (((a)<(b))?(a):(b))
+#endif	/* End of MIN */
+
+/* DATA TYPE DECLARATIONS
+ */
+typedef AIR_ERROR_NO_T
+(*AIR_PRINTF)(
+    C8_T* fmt,
+    ...);
+
+typedef void
+(*AIR_UDELAY)(
+    UI32_T us);
+
+typedef void*
+(*AIR_MALLOC)(
+    UI32_T size);
+
+typedef void
+(*AIR_FREE)(
+    void *ptr);
+
+typedef struct
+{
+    AML_DEV_ACCESS_T    dev_access;
+    AIR_PRINTF         printf;
+    AIR_UDELAY         udelay;
+    AIR_MALLOC         malloc;
+    AIR_FREE           free;
+}AIR_INIT_PARAM_T;
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+ */
+extern AIR_PRINTF _ext_printf;
+extern AIR_UDELAY _ext_udelay;
+extern AIR_MALLOC _ext_malloc;
+extern AIR_FREE   _ext_free;
+
+
+/* FUNCTION NAME:   air_init
+ * PURPOSE:
+ *      This API is used to initialize the SDK.
+ *
+ * INPUT:
+ *      unit            --  The device unit
+ *      ptr_init_param  --  The sdk callback functions.
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_init(
+    const UI32_T unit,
+    AIR_INIT_PARAM_T *ptr_init_param);
+
+/* FUNCTION NAME:   air_hw_reset
+ * PURPOSE:
+ *      This API is used to reset hardware.
+ *
+ * INPUT:
+ *      unit            --  The device unit
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_hw_reset(
+    const UI32_T unit);
+
+/* FUNCTION NAME:   air_set_gpio_pin_mux
+ * PURPOSE:
+ *      This API is used to set gpio pin mux.
+ *
+ * INPUT:
+ *      unit            --  The device unit
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_set_gpio_pin_mux(
+    const UI32_T unit);
+
+#endif  /* AIR_H */
+
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_acl.h b/feed/app/switch/src/an8855_sdk/api/inc/air_acl.h
new file mode 100644
index 0000000..f4ea6c9
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_acl.h
@@ -0,0 +1,1245 @@
+/* FILE NAME: air_acl.h
+ * PURPOSE:
+ *      Define the ACL function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+#ifndef AIR_ACL_H
+#define AIR_ACL_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+#define ACL_MAX_BUSY_TIME            (20)
+#define ACL_MAX_RULE_NUM             (128)
+#define ACL_MAX_ACTION_NUM           (128)
+#define ACL_MAX_TRTCM_NUM            (32)
+#define ACL_MAX_MIB_NUM              (64)
+#define ACL_MAX_UDF_NUM              (16)
+#define ACL_MAX_METER_NUM            (32)
+#define ACL_MAX_MIR_SESSION_NUM      (2)
+#define ACL_MAX_TOKEN_NUM            (0xffff)
+#define ACL_MAX_VLAN_NUM             (4096)
+#define ACL_MAX_DROP_PCD_NUM         (8)
+#define ACL_MAX_CLASS_SLR_NUM        (8)
+#define ACL_MAX_ATTACK_RATE_NUM      (96)
+#define ACL_MAX_WORD_OFST_NUM        (128)
+#define ACL_MAX_CMP_PAT_NUM          (0xffff)
+#define ACL_MAX_CMP_BIT_NUM          (0xffff)
+#define ACL_MAX_CBS_NUM              (0xffff)
+#define ACL_MAX_CIR_NUM              (0xffff)
+#define ACL_MAX_PBS_NUM              (0xffff)
+#define ACL_MAX_PIR_NUM              (0xffff)
+
+#define ACL_EN_MASK                  (0x1)
+#define ACL_MEM_CFG_DONE_OFFSET      (31)
+#define ACL_MEM_CFG_RULE_ID_OFFSET   (16)
+#define ACL_MEM_CFG_TCAM_CELL_OFFSET (12)
+#define ACL_MEM_CFG_DATA_BN_OFFSET   (8)
+#define ACL_MEM_CFG_MEM_SEL_OFFSET   (4)
+#define ACL_MEM_CFG_FUNC_SEL_OFFSET  (1)
+#define ACL_MEM_CFG_EN               (1)
+
+#define ACL_MIB_SEL_OFFSET           (4)
+#define ACL_MIB_CLEAR                (1)
+#define ACL_MIB_SEL_MASK             (0x3f)
+#define ACL_TRTCM_EN_OFFSET          (31)
+#define ACL_TRTCM_BUSY_OFFSET        (31)
+#define ACL_TRTCM_WRITE              (1U << 27)
+#define ACL_TRTCM_READ               (0U << 27)
+#define ACL_TRTCM_ID_OFFSET          (0)
+#define ACL_TRTCM_ID_MASK            (0x1f)
+#define ACL_TRTCM_CBS_MASK           (0xffff)
+#define ACL_TRTCM_EBS_MASK           (0xffff)
+#define ACL_TRTCM_CIR_MASK           (0xffff)
+#define ACL_TRTCM_EIR_MASK           (0xffff)
+#define ACL_RATE_BUSY_OFFSET         (31)
+#define ACL_RATE_WRITE               (1U << 30)
+#define ACL_RATE_READ                (0U << 30)
+#define ACL_RATE_ID_OFFSET           (20)
+#define ACL_RATE_ID_MASK             (0x1f)
+#define ACL_RATE_EN_OFFSET           (19)
+#define ACL_RATE_EN                  (1U << 19)
+#define ACL_RATE_DIS                 (0U << 19)
+#define ACL_RATE_TOKEN_MASK          (0xffff)
+
+/*ACL rule field offset and width*/
+#define RULE_TYPE0_OFFSET            (0)
+#define DMAC_OFFSET                  (1)
+#define SMAC_OFFSET                  (49)
+#define STAG_OFFSET                  (97)
+#define CTAG_OFFSET                  (113)
+#define ETYPE_OFFSET                 (129)
+#define DIP_OFFSET                   (145)
+#define SIP_OFFSET                   (177)
+#define DSCP_OFFSET                  (209)
+#define PROTOCOL_OFFSET              (217)
+#define DPORT_OFFSET                 (225)
+#define SPORT_OFFSET                 (241)
+#define UDF_OFFSET                   (257)
+#define FIELDMAP_OFFSET              (273)
+#define IS_IPV6_OFFSET               (286)
+#define PORTMAP_OFFSET               (287)
+
+#define RULE_TYPE1_OFFSET            (0)
+#define DIP_IPV6_OFFSET              (1)
+#define SIP_IPV6_OFFSET              (97)
+#define FLOW_LABEL_OFFSET            (193)
+
+#define RULE_TYPE0_WIDTH            (1)
+#define DMAC_WIDTH                  (8)
+#define SMAC_WIDTH                  (8)
+#define STAG_WIDTH                  (16)
+#define CTAG_WIDTH                  (16)
+#define ETYPE_WIDTH                 (16)
+#define DIP_WIDTH                   (32)
+#define SIP_WIDTH                   (32)
+#define DSCP_WIDTH                  (8)
+#define PROTOCOL_WIDTH              (8)
+#define DPORT_WIDTH                 (16)
+#define SPORT_WIDTH                 (16)
+#define UDF_WIDTH                   (16)
+#define FIELDMAP_WIDTH              (13)
+#define IS_IPV6_WIDTH               (1)
+#define PORTMAP_WIDTH               (7)
+
+#define RULE_TYPE1_WIDTH            (1)
+#define DIP_IPV6_WIDTH              (32)
+#define SIP_IPV6_WIDTH              (32)
+#define FLOW_LABEL_WIDTH            (20)
+
+/*ACL action offset and width*/
+#define ACL_VLAN_VID_OFFSET         (0)
+#define ACL_VLAN_HIT_OFFSET         (12)
+#define ACL_CLASS_IDX_OFFSET        (13)
+#define ACL_TCM_OFFSET              (18)
+#define ACL_TCM_SEL_OFFSET          (20)
+#define ACL_DROP_PCD_G_OFFSET       (21)
+#define ACL_DROP_PCD_Y_OFFSET       (24)
+#define ACL_DROP_PCD_R_OFFSET       (27)
+#define CLASS_SLR_OFFSET            (30)
+#define CLASS_SLR_SEL_OFFSET        (33)
+#define DROP_PCD_SEL_OFFSET         (34)
+#define TRTCM_EN_OFFSET             (35)
+#define ACL_MANG_OFFSET             (36)
+#define LKY_VLAN_OFFSET             (37)
+#define LKY_VLAN_EN_OFFSET          (38)
+#define EG_TAG_OFFSET               (39)
+#define EG_TAG_EN_OFFSET            (42)
+#define PRI_USER_OFFSET             (43)
+#define PRI_USER_EN_OFFSET          (46)
+#define MIRROR_OFFSET               (47)
+#define FW_PORT_OFFSET              (49)
+#define PORT_FW_EN_OFFSET           (52)
+#define RATE_INDEX_OFFSET           (53)
+#define RATE_EN_OFFSET              (58)
+#define ATTACK_RATE_ID_OFFSET       (59)
+#define ATTACK_RATE_EN_OFFSET       (66)
+#define ACL_MIB_ID_OFFSET           (67)
+#define ACL_MIB_EN_OFFSET           (73)
+#define VLAN_PORT_SWAP_OFFSET       (74)
+#define DST_PORT_SWAP_OFFSET        (75)
+#define BPDU_OFFSET                 (76)
+#define PORT_OFFSET                 (77)
+#define PORT_FORCE_OFFSET           (84)
+
+#define ACL_VLAN_VID_WIDTH          (12)
+#define ACL_VLAN_HIT_WIDTH          (1)
+#define ACL_CLASS_IDX_WIDTH         (5)
+#define ACL_TCM_WIDTH               (2)
+#define ACL_TCM_SEL_WIDTH           (1)
+#define ACL_DROP_PCD_G_WIDTH        (3)
+#define ACL_DROP_PCD_Y_WIDTH        (3)
+#define ACL_DROP_PCD_R_WIDTH        (3)
+#define CLASS_SLR_WIDTH             (3)
+#define CLASS_SLR_SEL_WIDTH         (1)
+#define DROP_PCD_SEL_WIDTH          (1)
+#define TRTCM_EN_WIDTH              (1)
+#define ACL_MANG_WIDTH              (1)
+#define LKY_VLAN_WIDTH              (1)
+#define LKY_VLAN_EN_WIDTH           (1)
+#define EG_TAG_WIDTH                (3)
+#define EG_TAG_EN_WIDTH             (1)
+#define PRI_USER_WIDTH              (3)
+#define PRI_USER_EN_WIDTH           (1)
+#define MIRROR_WIDTH                (2)
+#define FW_PORT_WIDTH               (3)
+#define PORT_FW_EN_WIDTH            (1)
+#define RATE_INDEX_WIDTH            (5)
+#define RATE_EN_WIDTH               (1)
+#define ATTACK_RATE_ID_WIDTH        (7)
+#define ATTACK_RATE_EN_WIDTH        (1)
+#define ACL_MIB_ID_WIDTH            (6)
+#define ACL_MIB_EN_WIDTH            (1)
+#define VLAN_PORT_SWAP_WIDTH        (1)
+#define DST_PORT_SWAP_WIDTH         (1)
+#define BPDU_WIDTH                  (1)
+#define PORT_WIDTH                  (7)
+#define PORT_FORCE_WIDTH            (1)
+
+/*ACL UDF table offset and width*/
+#define UDF_RULE_EN_OFFSET          (0)
+#define UDF_PKT_TYPE_OFFSET         (1)
+#define WORD_OFST_OFFSET            (4)
+#define CMP_SEL_OFFSET              (11)
+#define CMP_PAT_OFFSET              (32)
+#define CMP_MASK_OFFSET             (48)
+#define PORT_BITMAP_OFFSET          (64)
+
+#define UDF_RULE_EN_WIDTH           (1)
+#define UDF_PKT_TYPE_WIDTH          (3)
+#define WORD_OFST_WIDTH             (7)
+#define CMP_SEL_WIDTH               (1)
+#define CMP_PAT_WIDTH               (16)
+#define CMP_MASK_WIDTH              (16)
+#define PORT_BITMAP_WIDTH           (29)
+
+#define ACL_UDF_ACC_OFFSET          (31)
+#define ACL_UDF_READ_MASK           (0x0)
+#define ACL_UDF_WRITE_MASK          (0x1)
+#define ACL_UDF_CLEAR_MASK          (0x2)
+#define ACL_UDF_CMD_OFFSET          (28)
+#define ACL_UDF_READ                (ACL_UDF_READ_MASK << ACL_UDF_CMD_OFFSET)
+#define ACL_UDF_WRITE               (ACL_UDF_WRITE_MASK << ACL_UDF_CMD_OFFSET)
+#define ACL_UDF_CLEAR               (ACL_UDF_CLEAR_MASK << ACL_UDF_CMD_OFFSET)
+#define ACL_UDF_ADDR_MASK           (0xf)
+
+#define DPCR_HIGH_THRSH_OFFSET      (11)
+#define DPCR_PBB_OFFSET             (22)
+#define DPCR_LOW_THRSH_WIDTH        (11)
+#define DPCR_LOW_THRSH_MASK         (0x7ff)
+#define DPCR_HIGH_THRSH_WIDTH       (11)
+#define DPCR_HIGH_THRSH_MASK        (0x7ff)
+#define DPCR_PBB_WIDTH              (10)
+#define DPCR_PBB_MASK               (0x3ff)
+#define DP_MFRM_EX_OFFSET           (24)
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+typedef enum
+{
+    AIR_ACL_RULE_OFS_FMT_MAC_HEADER = 0,
+    AIR_ACL_RULE_OFS_FMT_L2_PAYLOAD,
+    AIR_ACL_RULE_OFS_FMT_IPV4_HEADER,
+    AIR_ACL_RULE_OFS_FMT_IPV6_HEADER,
+    AIR_ACL_RULE_OFS_FMT_L3_PAYLOAD,
+    AIR_ACL_RULE_OFS_FMT_TCP_HEADER,
+    AIR_ACL_RULE_OFS_FMT_UDP_HEADER,
+    AIR_ACL_RULE_OFS_FMT_L4_PAYLOAD,
+    AIR_ACL_RULE_OFS_FMT_LAST
+} AIR_ACL_RULE_OFS_FMT_T;
+
+typedef enum
+{
+    AIR_ACL_RULE_CMP_SEL_PATTERN,          /* Pattern hit by data pattern and bit mask */
+    AIR_ACL_RULE_CMP_SEL_THRESHOLD,        /* Pattern hit by low and high threshold */
+    AIR_ACL_RULE_CMP_SEL_LAST
+}AIR_ACL_RULE_CMP_SEL_T;
+
+typedef enum
+{
+    AIR_ACL_ACT_FWD_DIS,             /* Don't change forwarding behaviour by ACL */
+    AIR_ACL_ACT_FWD_CPU_EX = 4,      /* Forward by system default & CPU port is excluded */
+    AIR_ACL_ACT_FWD_CPU_IN,          /* Forward by system default & CPU port is included */
+    AIR_ACL_ACT_FWD_CPU,             /* Forward to CPU port only */
+    AIR_ACL_ACT_FWD_DROP,            /* Frame dropped */
+    AIR_ACL_ACT_FWD_LAST
+}AIR_ACL_ACT_FWD_T;
+
+typedef enum
+{
+    AIR_ACL_ACT_EGTAG_DIS,
+    AIR_ACL_ACT_EGTAG_CONSISTENT,
+    AIR_ACL_ACT_EGTAG_UNTAG = 4,
+    AIR_ACL_ACT_EGTAG_SWAP,
+    AIR_ACL_ACT_EGTAG_TAG,
+    AIR_ACL_ACT_EGTAG_STACK,
+    AIR_ACL_ACT_EGTAG_LAST
+}AIR_ACL_ACT_EGTAG_T;
+
+typedef enum
+{
+    AIR_ACL_ACT_USR_TCM_DEFAULT,         /* Normal packets, don't work based on color */
+    AIR_ACL_ACT_USR_TCM_GREEN,           /* Green */
+    AIR_ACL_ACT_USR_TCM_YELLOW,          /* Yellow */
+    AIR_ACL_ACT_USR_TCM_RED,             /* Red */
+    AIR_ACL_ACT_USR_TCM_LAST
+}AIR_ACL_ACT_USR_TCM_T;
+
+typedef enum
+{
+    AIR_ACL_DP_COLOR_GREEN,
+    AIR_ACL_DP_COLOR_YELLOW,
+    AIR_ACL_DP_COLOR_RED,
+    AIR_ACL_DP_COLOR_LAST
+}AIR_ACL_DP_COLOR_T;
+
+typedef enum
+{
+    AIR_ACL_RULE_TYPE_0,
+    AIR_ACL_RULE_TYPE_1,
+    AIR_ACL_RULE_TYPE_LAST
+}AIR_ACL_RULE_TYPE_T;
+
+typedef enum
+{
+    AIR_ACL_RULE_T_CELL,
+    AIR_ACL_RULE_C_CELL,
+    AIR_ACL_RULE_TCAM_LAST
+}AIR_ACL_RULE_TCAM_T;
+
+typedef enum
+{
+    AIR_ACL_MEM_SEL_RULE,
+    AIR_ACL_MEM_SEL_ACTION,
+    AIR_ACL_MEM_SEL_LAST
+}AIR_ACL_MEM_SEL_T;
+
+typedef enum
+{
+    AIR_ACL_MEM_FUNC_READ = 0,
+    AIR_ACL_MEM_FUNC_WRITE,
+    AIR_ACL_MEM_FUNC_CLEAR,
+    AIR_ACL_MEM_FUNC_CONFIG_READ = 4,
+    AIR_ACL_MEM_FUNC_CONFIG_WRITE,
+    AIR_ACL_MEM_FUNC_LAST
+}AIR_ACL_MEM_FUNC_T;
+
+typedef enum
+{
+    AIR_ACL_RULE_CONFIG_ENABLE,
+    AIR_ACL_RULE_CONFIG_END,
+    AIR_ACL_RULE_CONFIG_REVERSE,
+    AIR_ACL_RULE_CONFIG_LAST
+}AIR_ACL_RULE_CONFIG_T;
+
+typedef enum
+{
+    AIR_ACL_CHECK_ACL,
+    AIR_ACL_CHECK_UDF,
+    AIR_ACL_CHECK_TRTCM,
+    AIR_ACL_CHECK_METER,
+    AIR_ACL_CHECK_TYPE_LAST
+}AIR_ACL_CHECK_TYPE_T;
+
+typedef enum
+{
+    AIR_ACL_DMAC,
+    AIR_ACL_SMAC,
+    AIR_ACL_STAG,
+    AIR_ACL_CTAG,
+    AIR_ACL_ETYPE,
+    AIR_ACL_DIP,
+    AIR_ACL_SIP,
+    AIR_ACL_DSCP,
+    AIR_ACL_PROTOCOL,
+    AIR_ACL_DPORT,
+    AIR_ACL_SPORT,
+    AIR_ACL_UDF,
+    AIR_ACL_FLOW_LABEL,
+    AIR_ACL_FIELD_TYPE_LAST
+}AIR_ACL_FIELD_TYPE_T;
+
+typedef struct AIR_ACL_FIELD_S
+{
+    UI8_T dmac[6];
+    UI8_T smac[6];
+    UI16_T stag;
+    UI16_T ctag;
+    UI16_T etype;
+    UI32_T dip[4];
+    UI32_T sip[4];
+    UI8_T dscp;
+    UI8_T protocol;
+    UI32_T flow_label;
+    UI16_T dport;
+    UI16_T sport;
+    UI16_T udf;
+    BOOL_T isipv6;
+    UI16_T fieldmap;
+    UI32_T portmap;
+} AIR_ACL_FIELD_T;
+
+typedef struct AIR_ACL_CTRL_S
+{
+    BOOL_T rule_en;
+    BOOL_T reverse;
+    BOOL_T end;
+}AIR_ACL_CTRL_T;
+
+typedef struct AIR_ACL_RULE_S
+{
+    AIR_ACL_FIELD_T key;
+    AIR_ACL_FIELD_T mask;
+    AIR_ACL_CTRL_T ctrl;
+} AIR_ACL_RULE_T;
+
+typedef struct AIR_ACL_UDF_RULE_S
+{
+    BOOL_T valid;                           /* Valid bit */
+    AIR_ACL_RULE_OFS_FMT_T offset_format;   /* Format Type for Word Offset Range */
+    UI32_T offset;                          /* Word Offset */
+    UI32_T portmap;                         /* Physical Source Port Bit-map */
+    AIR_ACL_RULE_CMP_SEL_T cmp_sel;         /* Comparison mode selection */
+    UI16_T pattern;                         /* Comparison Pattern when cmp_sel=AIR_ACL_RULE_CMP_SEL_PATTERN */
+    UI16_T mask;                            /* Comparison Pattern Mask when cmp_sel=AIR_ACL_RULE_CMP_SEL_PATTERN */
+    UI16_T low_threshold;                   /* Low Threshold when cmp_sel=AIR_ACL_RULE_CMP_SEL_THRESHOLD */
+    UI16_T high_threshold;                  /* High Threshold when cmp_sel=AIR_ACL_RULE_CMP_SEL_THRESHOLD */
+}AIR_ACL_UDF_RULE_T;
+
+typedef struct AIR_ACL_ACT_TRTCM_S
+{
+    BOOL_T cls_slr_sel;                     /* FALSE: Select original class selector value
+                                               TRUE:  Select ACL control table defined class selector value */
+    UI8_T cls_slr;                          /* User defined class selector */
+    BOOL_T drop_pcd_sel;                    /* FALSE: Select original drop precedence value
+                                               TRUE:  Select ACL control table defined drop precedence value */
+    UI8_T drop_pcd_r;                       /* User defined drop precedence for red packets */
+    UI8_T drop_pcd_y;                       /* User defined drop precedence for yellow packets */
+    UI8_T drop_pcd_g;                       /* User defined drop precedence for green packets */
+    BOOL_T tcm_sel;                         /* FALSE: Select user defined color value
+                                               TRUE:  Select color remark by trtcm table */
+    AIR_ACL_ACT_USR_TCM_T usr_tcm;          /* User defined color remark */
+    UI8_T tcm_idx;                          /* Index for the 32-entries trtcm table */
+}AIR_ACL_ACT_TRTCM_T;
+
+typedef struct AIR_ACL_ACTION_S
+{
+    BOOL_T port_en;
+    BOOL_T dest_port_sel;               /* Swap destination port member by portmap when port_en=1 */
+    BOOL_T vlan_port_sel;               /* Swap VLAN port member by portmap when port_en=1 */
+    UI32_T portmap;
+
+    BOOL_T cnt_en;
+    UI32_T cnt_idx;                     /* Counter index */
+
+    BOOL_T attack_en;
+    UI32_T attack_idx;                  /* Attack rate index */
+
+    BOOL_T rate_en;
+    UI32_T rate_idx;                    /* Index of meter table */
+
+    BOOL_T vlan_en;
+    UI32_T vlan_idx;                    /* Vid from ACL */
+
+    UI8_T mirrormap;                    /* mirror session bitmap */
+
+    BOOL_T pri_user_en;
+    UI8_T pri_user;                     /* User Priority from ACL */
+
+    BOOL_T lyvlan_en;
+    BOOL_T lyvlan;                      /* Leaky VLAN */
+
+    BOOL_T mang;                        /* Management frame attribute */
+
+    BOOL_T bpdu;                        /* BPDU frame attribute */
+
+    BOOL_T fwd_en;
+    AIR_ACL_ACT_FWD_T fwd;              /* Frame TO_CPU Forwarding */
+
+    BOOL_T egtag_en;
+    AIR_ACL_ACT_EGTAG_T egtag;          /* Egress tag control */
+
+    BOOL_T trtcm_en;
+    AIR_ACL_ACT_TRTCM_T trtcm;          /* TRTCM control */
+
+}AIR_ACL_ACTION_T;
+
+typedef struct AIR_ACL_TRTCM_S
+{
+    UI16_T cir;                             /* Committed information rate (unit: 64Kbps) */
+    UI16_T pir;                             /* Peak information rate (unit: 64Kbps) */
+    UI16_T cbs;                             /* Committed burst size (unit: byte) */
+    UI16_T pbs;                             /* Peak burst size (unit: byte) */
+}AIR_ACL_TRTCM_T;
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+/* FUNCTION NAME: air_acl_setRuleCtrl
+ * PURPOSE:
+ *      Set ACL rule control.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      rule_idx        --  Index of ACL rule entry
+ *      ptr_rule        --  Structure of ACL rule control
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setRuleCtrl(
+    const UI32_T unit,
+    const UI32_T rule_idx,
+    AIR_ACL_CTRL_T *ptr_ctrl);
+
+/* FUNCTION NAME: air_acl_getRuleCtrl
+ * PURPOSE:
+ *      Get ACL rule control.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      rule_idx        --  Index of ACL rule entry
+ *
+ * OUTPUT:
+ *      ptr_ctrl        --  Structure of ACL rule control
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getRuleCtrl(
+    const UI32_T unit,
+    const UI32_T rule_idx,
+    AIR_ACL_CTRL_T *ptr_ctrl);
+
+/* FUNCTION NAME: air_acl_setRule
+ * PURPOSE:
+ *      Set ACL rule entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      rule_idx        --  Index of ACL rule entry
+ *      rule            --  Structure of ACL rule entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setRule(
+    const UI32_T unit,
+    const UI32_T rule_idx,
+    AIR_ACL_RULE_T *rule);
+
+/* FUNCTION NAME: air_acl_delRule
+ * PURPOSE:
+ *      Delete an ACL rule entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      rule_idx        --  Index of ACL rule entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_delRule(
+    const UI32_T unit,
+    const UI32_T rule_idx);
+
+/* FUNCTION NAME: air_acl_clearRule
+ * PURPOSE:
+ *      Clear all ACL rule entries.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_clearRule(
+    const UI32_T unit);
+
+/* FUNCTION NAME: air_acl_getRule
+ * PURPOSE:
+ *      Get ACL rule entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      rule_idx        --  Index of ACL rule entry
+ *
+ * OUTPUT:
+ *      ptr_rule        --  Structure of ACL rule entry
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getRule(
+    const UI32_T unit,
+    const UI32_T rule_idx,
+    AIR_ACL_RULE_T *ptr_rule);
+
+/* FUNCTION NAME: air_acl_setAction
+ * PURPOSE:
+ *      Set an ACL action entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      act_idx         --  Index of ACL action entry
+ *      act             --  Structure of ACL action entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_NOT_SUPPORT
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setAction(
+    const UI32_T unit,
+    const UI32_T act_idx,
+    const AIR_ACL_ACTION_T act);
+
+/* FUNCTION NAME: air_acl_delAction
+ * PURPOSE:
+ *      Delete an ACL action entry with specific index
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      act_idx         --  Index of ACL action entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_ENTRY_NOT_FOUND
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_delAction(
+    const UI32_T unit,
+    const UI32_T act_idx);
+
+/* FUNCTION NAME: air_acl_clearAction
+ * PURPOSE:
+ *      Clear all ACL action entries.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_clearAction(
+    const UI32_T unit);
+
+/* FUNCTION NAME: air_acl_getAction
+ * PURPOSE:
+ *      Get an ACL action entry with speficic index.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      act_idx         --  Index of ACL action entry
+ *
+ * OUTPUT:
+ *      ptr_act         --  Structure of ACL action entry
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_ENTRY_NOT_FOUND
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getAction(
+    const UI32_T unit,
+    const UI32_T act_idx,
+    AIR_ACL_ACTION_T *ptr_act);
+
+/* FUNCTION NAME: air_acl_setTrtcm
+ * PURPOSE:
+ *      Set a trTCM entry with the specific index.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      tcm_idx         --  Index of trTCM entry
+ *      tcm             --  Structure of trTCM entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      Index 0 ~ 31 can be selected in tcm_idx.
+ */
+AIR_ERROR_NO_T
+air_acl_setTrtcm(
+    const UI32_T unit,
+    const UI32_T tcm_idx,
+    const AIR_ACL_TRTCM_T tcm);
+
+/* FUNCTION NAME: air_acl_delTrtcm
+ * PURPOSE:
+ *      Delete an ACL trTCM entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      trtcm_idx       --  Index of ACL trTCM entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      Index 0 ~ 31 can be selected in tcm_idx.
+ */
+AIR_ERROR_NO_T
+air_acl_delTrtcm(
+    const UI32_T unit,
+    const UI32_T trtcm_idx);
+
+/* FUNCTION NAME: air_acl_clearTrtcm
+ * PURPOSE:
+ *      Clear all ACL trTCM entries.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_clearTrtcm(
+    const UI32_T unit);
+
+/* FUNCTION NAME: air_acl_getTrtcm
+ * PURPOSE:
+ *      Get a trTCM entry with the specific index.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      tcm_idx         --  Index of trTCM entry
+ *
+ * OUTPUT:
+ *      ptr_tcm         --  Structure of trTCM entry
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      Index 0 ~ 31 can be selected in tcm_idx.
+ */
+AIR_ERROR_NO_T
+air_acl_getTrtcm(
+    const UI32_T unit,
+    const UI32_T tcm_idx,
+    AIR_ACL_TRTCM_T *ptr_tcm);
+
+/* FUNCTION NAME: air_acl_setTrtcmEnable
+ * PURPOSE:
+ *      Set trTCM enable so the meter table will be updated based on PIR and CIR.
+ *      The color marker will also be enabled when ACL is hit.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setTrtcmEnable(
+    const UI32_T unit,
+    const BOOL_T state);
+
+/* FUNCTION NAME: air_acl_getTrtcm
+ * PURPOSE:
+ *      Get a trTCM enable state.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getTrtcmEnable(
+    const UI32_T unit,
+    BOOL_T *const ptr_state);
+
+/* FUNCTION NAME: air_acl_setPortEnable
+ * PURPOSE:
+ *      Set ACL state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setPortEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state);
+
+/* FUNCTION NAME: air_acl_getPortEnable
+ * PURPOSE:
+ *      Get ACL state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getPortEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_state);
+
+/* FUNCTION NAME: air_acl_setDropEnable
+ * PURPOSE:
+ *      Set ACL drop precedence state
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setDropEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state);
+
+/* FUNCTION NAME: air_acl_getDropEnable
+ * PURPOSE:
+ *      Get ACL drop precedence state
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getDropEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *ptr_state);
+
+/* FUNCTION NAME: air_acl_setDropThreshold
+ * PURPOSE:
+ *      Set ACL drop threshold.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      color           --  AIR_ACL_DP_COLOR_YELLOW: Yellow
+ *                          AIR_ACL_DP_COLOR_RED   : Red
+ *      queue           --  Output queue number
+ *      high            --  High threshold
+ *      low             --  Low threshold
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      Key parameter include port, color, queue.
+ */
+AIR_ERROR_NO_T
+air_acl_setDropThreshold(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_ACL_DP_COLOR_T color,
+    const UI8_T queue,
+    const UI32_T high,
+    const UI32_T low);
+
+/* FUNCTION NAME: air_acl_getDropThreshold
+ * PURPOSE:
+ *      Get ACL drop threshold.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      color           --  AIR_ACL_DP_COLOR_YELLOW: Yellow
+ *                          AIR_ACL_DP_COLOR_RED   : Red
+ *      queue           --  Output queue number
+ *
+ * OUTPUT:
+ *      ptr_high        --  High threshold
+ *      ptr_low         --  Low threshold
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      Key parameter include port, color, queue.
+ */
+AIR_ERROR_NO_T
+air_acl_getDropThreshold(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_ACL_DP_COLOR_T color,
+    const UI8_T queue,
+    UI32_T *ptr_high,
+    UI32_T *ptr_low);
+
+/* FUNCTION NAME: air_acl_setDropProbability
+ * PURPOSE:
+ *      Set ACL drop probability.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      color           --  AIR_ACL_DP_COLOR_YELLOW: Yellow
+ *                          AIR_ACL_DP_COLOR_RED   : Red
+ *      queue           --  Output queue number
+ *      probability     --  Drop probability (value:0 ~ 1023, unit:1/1023; eg: value-102 = 10% )
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      Key parameter include port, color, queue.
+ */
+AIR_ERROR_NO_T
+air_acl_setDropProbability(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_ACL_DP_COLOR_T color,
+    const UI8_T queue,
+    const UI32_T probability);
+
+/* FUNCTION NAME: air_acl_getDropProbability
+ * PURPOSE:
+ *      Get ACL drop probability.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      color           --  AIR_ACL_DP_COLOR_YELLOW: Yellow
+ *                          AIR_ACL_DP_COLOR_RED   : Red
+ *      queue           --  Output queue number
+ *
+ * OUTPUT:
+ *      ptr_probability --  Drop probability (value:0 ~ 1023, unit:1/1023; eg: value-102 = 10% )
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      Key parameter include port, color, queue.
+ */
+AIR_ERROR_NO_T
+air_acl_getDropProbability(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_ACL_DP_COLOR_T color,
+    const UI8_T queue,
+    UI32_T *ptr_probability);
+
+/* FUNCTION NAME:
+ *      air_acl_setGlobalState
+ * PURPOSE:
+ *      Set the ACL global enable state.
+ * INPUT:
+ *      unit        -- Device ID
+ *      state       -- Enable state of ACL
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setGlobalState(
+    const UI32_T        unit,
+    const BOOL_T        state);
+
+/* FUNCTION NAME:
+ *      air_acl_getGlobalState
+ * PURPOSE:
+ *      Get the ACL global enable state.
+ * INPUT:
+ *      unit             -- Device ID
+ * OUTPUT:
+ *      ptr_state        -- Enable state
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getGlobalState(
+    const UI32_T         unit,
+    BOOL_T               *ptr_state);
+
+/* FUNCTION NAME:
+ *      air_acl_setUdfRule
+ * PURPOSE:
+ *      Set ACL UDF rule of specified entry index.
+ * INPUT:
+ *      unit             -- Device ID
+ *      rule_idx         -- ACLUDF table entry index
+ *      udf_rule         -- Structure of ACL UDF rule entry
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setUdfRule(
+    const UI32_T                unit,
+    const UI32_T                rule_idx,
+    AIR_ACL_UDF_RULE_T          udf_rule);
+
+/* FUNCTION NAME:
+ *      air_acl_getUdfRule
+ * PURPOSE:
+ *      Get ACL UDF rule of specified entry index.
+ * INPUT:
+ *      unit             -- Device ID
+ *      rule_idx         -- ACLUDF table entry index
+ * OUTPUT:
+ *      ptr_udf_rule     -- Structure of ACL UDF rule entry
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getUdfRule(
+    const UI32_T                unit,
+    const UI8_T                 rule_idx,
+    AIR_ACL_UDF_RULE_T          *ptr_udf_rule);
+
+/* FUNCTION NAME:
+ *      air_acl_delUdfRule
+ * PURPOSE:
+ *      Delete ACL UDF rule of specified entry index.
+ * INPUT:
+ *      unit             -- Device ID
+ *      rule_idx         -- ACLUDF table entry index
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_delUdfRule(
+    const UI32_T      unit,
+    const UI8_T       rule_idx);
+
+/* FUNCTION NAME:
+ *      air_acl_clearUdfRule
+ * PURPOSE:
+ *      Clear acl all udf rule.
+ * INPUT:
+ *      unit             -- Device ID
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_clearUdfRule(
+    const UI32_T    unit);
+
+/* FUNCTION NAME:
+ *      air_acl_setMeterTable
+ * PURPOSE:
+ *      Set flow ingress rate limit by meter table.
+ * INPUT:
+ *      unit                -- Device ID
+ *      meter_id            -- Meter id
+ *      enable              -- Meter enable state
+ *      rate                -- Ratelimit(unit:64kbps)
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setMeterTable(
+    const UI32_T            unit,
+    const UI32_T            meter_id,
+    const BOOL_T            enable,
+    const UI32_T            rate);
+
+/* FUNCTION NAME:
+ *      air_acl_getMeterTable
+ * PURPOSE:
+ *      Get meter table configuration.
+ * INPUT:
+ *      unit                -- Device ID
+ *      meter_id            -- Meter id
+ * OUTPUT:
+ *      ptr_enable          -- Meter enable state
+ *      ptr_rate            -- Ratelimit(unit:64kbps)
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getMeterTable(
+    const UI32_T            unit,
+    const UI32_T            meter_id,
+    BOOL_T                  *ptr_enable,
+    UI32_T                  *ptr_rate);
+
+#endif /* End of AIR_ACL_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_aml.h b/feed/app/switch/src/an8855_sdk/api/inc/air_aml.h
new file mode 100644
index 0000000..49a38b6
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_aml.h
@@ -0,0 +1,214 @@
+/* FILE NAME:   air_aml.h
+ * PURPOSE:
+ *      Define the access management layer function in AIR SDK.
+ * NOTES:
+ */
+
+#ifndef AIR_AML_H
+#define AIR_AML_H
+
+/* INCLUDE FILE DECLARATIONS
+ */
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+typedef AIR_ERROR_NO_T
+(*AML_DEV_READ_FUNC_T)(
+    const UI32_T    unit,
+    const UI32_T    addr_offset,
+    UI32_T          *ptr_data);
+
+typedef AIR_ERROR_NO_T
+(*AML_DEV_WRITE_FUNC_T)(
+    const UI32_T    unit,
+    const UI32_T    addr_offset,
+    const UI32_T    data);
+
+typedef AIR_ERROR_NO_T
+(*AML_DEV_PHY_READ_FUNC_T)(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    addr_offset,
+    UI32_T          *ptr_data);
+
+typedef AIR_ERROR_NO_T
+(*AML_DEV_PHY_WRITE_FUNC_T)(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    addr_offset,
+    const UI32_T    data);
+
+typedef AIR_ERROR_NO_T
+(*AML_DEV_PHY_READ_CL45_FUNC_T)(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    dev_type,
+    const UI32_T    addr_offset,
+    UI32_T          *ptr_data);
+
+typedef AIR_ERROR_NO_T
+(*AML_DEV_PHY_WRITE_CL45_FUNC_T)(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    dev_type,
+    const UI32_T    addr_offset,
+    const UI32_T    data);
+
+/* To read or write the HW-intf registers. */
+typedef struct
+{
+    AML_DEV_READ_FUNC_T             read_callback;
+    AML_DEV_WRITE_FUNC_T            write_callback;
+    AML_DEV_PHY_READ_FUNC_T         phy_read_callback;
+    AML_DEV_PHY_WRITE_FUNC_T        phy_write_callback;
+    AML_DEV_PHY_READ_CL45_FUNC_T    phy_cl45_read_callback;
+    AML_DEV_PHY_WRITE_CL45_FUNC_T   phy_cl45_write_callback;
+}AML_DEV_ACCESS_T;
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+ */
+extern AML_DEV_ACCESS_T _ext_dev_access;
+
+/* FUNCTION NAME:   aml_readReg
+ * PURPOSE:
+ *      To read data from the register of the specified chip unit.
+ * INPUT:
+ *      unit        -- the device unit
+ *      addr_offset -- the address of register
+ * OUTPUT:
+ *      ptr_data    -- pointer for the register data
+ * RETURN:
+ *      NPS_E_OK     -- Successfully read the data.
+ *      NPS_E_OTHERS -- Failed to read the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_readReg(
+    const UI32_T    unit,
+    const UI32_T    addr_offset,
+    UI32_T          *ptr_data);
+
+/* FUNCTION NAME:   aml_writeReg
+ * PURPOSE:
+ *      To write data to the register of the specified chip unit.
+ * INPUT:
+ *      unit        -- the device unit
+ *      addr_offset -- the address of register
+ *      data        -- written data
+ * OUTPUT:
+ *      none
+ * RETURN:
+ *      NPS_E_OK     -- Successfully write the data.
+ *      NPS_E_OTHERS -- Failed to write the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_writeReg(
+    const UI32_T    unit,
+    const UI32_T    addr_offset,
+    const UI32_T    data);
+
+/* FUNCTION NAME:   aml_readPhyReg
+ * PURPOSE:
+ *      To read data from the phy register of the specified chip unit in Clause22.
+ * INPUT:
+ *      unit        -- the device unit
+ *      port_id     -- physical port number
+ *      addr_offset -- the address of phy register
+ * OUTPUT:
+ *      ptr_data    -- pointer for the register data
+ * RETURN:
+ *      NPS_E_OK     -- Successfully read the data.
+ *      NPS_E_OTHERS -- Failed to read the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_readPhyReg(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    addr_offset,
+    UI32_T          *ptr_data);
+
+/* FUNCTION NAME:   aml_writePhyReg
+ * PURPOSE:
+ *      To write data to the phy register of the specified chip unit in Clause22.
+ * INPUT:
+ *      unit        -- the device unit
+ *      port_id     -- physical port number
+ *      addr_offset -- the address of phy register
+ *      data        -- written data
+ * OUTPUT:
+ *      none
+ * RETURN:
+ *      NPS_E_OK     -- Successfully write the data.
+ *      NPS_E_OTHERS -- Failed to write the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_writePhyReg(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    addr_offset,
+    const UI32_T    ptr_data);
+
+/* FUNCTION NAME:   aml_readPhyRegCL45
+ * PURPOSE:
+ *      To read data from the phy register of the specified chip unit in Clause45.
+ * INPUT:
+ *      unit        -- the device unit
+ *      port_id     -- physical port number
+ *      dev_type    -- phy register type
+ *      addr_offset -- the address of phy register
+ * OUTPUT:
+ *      ptr_data    -- pointer for the register data
+ * RETURN:
+ *      NPS_E_OK     -- Successfully read the data.
+ *      NPS_E_OTHERS -- Failed to read the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_readPhyRegCL45(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    dev_type,
+    const UI32_T    addr_offset,
+    UI32_T          *ptr_data);
+
+/* FUNCTION NAME:   aml_writePhyRegCL45
+ * PURPOSE:
+ *      To write data to the phy register of the specified chip unit in Clause45.
+ * INPUT:
+ *      unit        -- the device unit
+ *      port_id     -- physical port number
+ *      dev_type    -- phy register offset
+ *      addr_offset -- the address of phy register
+ *      data        -- written data
+ * OUTPUT:
+ *      none
+ * RETURN:
+ *      NPS_E_OK     -- Successfully write the data.
+ *      NPS_E_OTHERS -- Failed to write the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_writePhyRegCL45(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    dev_type,
+    const UI32_T    addr_offset,
+    const UI32_T    data);
+
+#endif  /* AIR_AML_H */
+
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_cmd.h b/feed/app/switch/src/an8855_sdk/api/inc/air_cmd.h
new file mode 100644
index 0000000..071d063
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_cmd.h
@@ -0,0 +1,50 @@
+/* FILE NAME:   air_cmd.h
+ * PURPOSE:
+ *      Define the command line function in AIR SDK.
+ * NOTES:
+ */
+
+#ifndef AIR_CMD_H
+#define AIR_CMD_H
+
+/* INCLUDE FILE DECLARATIONS
+ */
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+ */
+/* FUNCTION NAME:   air_parse_cmd
+ * PURPOSE:
+ *      This function is used process diagnostic cmd
+ * INPUT:
+ *      argc         -- parameter number
+ *      argv         -- parameter strings
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      NPS_E_OK     -- Successfully read the data.
+ *      NPS_E_OTHERS -- Failed to read the data.
+ * NOTES:
+ *
+ */
+AIR_ERROR_NO_T
+air_parse_cmd(
+    const UI32_T argc,
+    const C8_T **argv);
+
+UI32_T
+_strtoul(
+    const C8_T *cp,
+    C8_T **endp,
+    UI32_T base);
+
+#endif  /* AIR_CMD_H */
+
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_diag.h b/feed/app/switch/src/an8855_sdk/api/inc/air_diag.h
new file mode 100644
index 0000000..60fe4f3
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_diag.h
@@ -0,0 +1,87 @@
+/* FILE NAME: air_diag.h
+ * PURPOSE:
+ *      Define the diagnostic function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+#ifndef AIR_DIAG_H
+#define AIR_DIAG_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+typedef enum
+{
+    AIR_DIAG_TXCOMPLY_MODE_10M_NLP,
+    AIR_DIAG_TXCOMPLY_MODE_10M_RANDOM,
+    AIR_DIAG_TXCOMPLY_MODE_10M_SINE,
+    AIR_DIAG_TXCOMPLY_MODE_100M_PAIR_A,
+    AIR_DIAG_TXCOMPLY_MODE_100M_PAIR_B,
+    AIR_DIAG_TXCOMPLY_MODE_1000M_TM1,
+    AIR_DIAG_TXCOMPLY_MODE_1000M_TM2,
+    AIR_DIAG_TXCOMPLY_MODE_1000M_TM3,
+    AIR_DIAG_TXCOMPLY_MODE_1000M_TM4,
+    AIR_DIAG_TXCOMPLY_MODE_LAST
+}AIR_DIAG_TXCOMPLY_MODE_T;
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+/* FUNCTION NAME: air_diag_setTxComplyMode
+ * PURPOSE:
+ *      Set Ethernet TX Compliance mode.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      mode            --  Testing mode of Ethernet TX Compliance
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ */
+AIR_ERROR_NO_T
+air_diag_setTxComplyMode(
+    const UI32_T unit,
+    const UI8_T port,
+    const AIR_DIAG_TXCOMPLY_MODE_T mode);
+
+/* FUNCTION NAME: air_diag_getTxComplyMode
+ * PURPOSE:
+ *      Get Ethernet TX Compliance mode.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_mode        --  Testing mode of Ethernet TX Compliance
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_OTHERS
+ *
+ * NOTES:
+ */
+AIR_ERROR_NO_T
+air_diag_getTxComplyMode(
+    const UI32_T unit,
+    const UI8_T port,
+    AIR_DIAG_TXCOMPLY_MODE_T *ptr_mode);
+
+#endif /* End of AIR_DIAG_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_error.h b/feed/app/switch/src/an8855_sdk/api/inc/air_error.h
new file mode 100644
index 0000000..836d400
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_error.h
@@ -0,0 +1,56 @@
+/* FILE NAME:   air_error.h
+ * PURPOSE:
+ *      Define the error code in AIR SDK.
+ * NOTES:
+ */
+
+#ifndef AIR_ERROR_H
+#define AIR_ERROR_H
+
+/* INCLUDE FILE DECLARATIONS
+ */
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+typedef enum
+{
+    AIR_E_OK = 0,              /* Ok and no error */
+    AIR_E_OTHERS,              /* Operation is unsuccessful */
+    AIR_E_BAD_PARAMETER,       /* Parameter is wrong */
+    AIR_E_TABLE_FULL,          /* Table is full */
+    AIR_E_ENTRY_NOT_FOUND,     /* Entry is not found */
+    AIR_E_ENTRY_EXISTS,        /* Entry already exists */
+    AIR_E_NOT_SUPPORT,         /* Feature is not supported */
+    AIR_E_TIMEOUT,             /* Time out error */
+    AIR_E_LAST
+} AIR_ERROR_NO_T;
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+ */
+/* FUNCTION NAME:   air_error_getString
+ * PURPOSE:
+ *      To obtain the error string of the specified error code
+ *
+ * INPUT:
+ *      cause  -- The specified error code
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      Pointer to the target error string
+ *
+ * NOTES:
+ *
+ *
+ */
+C8_T *
+air_error_getString(
+    const AIR_ERROR_NO_T cause );
+
+#endif  /* AIR_ERROR_H */
+
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_l2.h b/feed/app/switch/src/an8855_sdk/api/inc/air_l2.h
new file mode 100644
index 0000000..1e77305
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_l2.h
@@ -0,0 +1,323 @@
+/* FILE NAME: air_l2.h
+* PURPOSE:
+*       Define the layer 2 functions in AIR SDK.
+*
+* NOTES:
+*       None
+*/
+
+#ifndef AIR_L2_H
+#define AIR_L2_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+#define AIR_L2_MAC_MAX_AGE_OUT_TIME (1000000)
+
+#define AIR_L2_MAX_BUSY_TIME    (200)
+#define AIR_L2_MAX_AGE_CNT      (BITS(0, (AAC_AGE_CNT_LENGTH - 1)))
+#define AIR_L2_MAX_AGE_UNIT     (BITS(0, (AAC_AGE_UNIT_LENGTH - 1)))
+#define AIR_L2_MAC_SET_NUM      (4)
+#define AIR_L2_MAX_SIZE         (512)
+
+/* Field for MAC Address Table */
+/* Field for MAC entry forward control when hit source MAC */
+typedef enum
+{
+    AIR_L2_FWD_CTRL_DEFAULT,
+    AIR_L2_FWD_CTRL_CPU_INCLUDE,
+    AIR_L2_FWD_CTRL_CPU_EXCLUDE,
+    AIR_L2_FWD_CTRL_CPU_ONLY,
+    AIR_L2_FWD_CTRL_DROP,
+    AIR_L2_FWD_CTRL_LAST
+} AIR_L2_FWD_CTRL_T;
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+/* Entry structure of MAC table */
+typedef struct AIR_MAC_ENTRY_S
+{
+    /* L2 MAC entry keys */
+    /* MAC Address */
+    AIR_MAC_T mac;
+
+    /* Customer VID (12bits) */
+    UI16_T cvid;
+
+    /* Filter ID */
+    UI16_T fid;
+
+    /* l2 mac entry attributes */
+#define AIR_L2_MAC_ENTRY_FLAGS_IVL     (1U << 0)
+#define AIR_L2_MAC_ENTRY_FLAGS_STATIC  (1U << 1)
+#define AIR_L2_MAC_ENTRY_FLAGS_UNAUTH  (1U << 2)
+    UI32_T flags;
+
+    /* Destination Port Map */
+    AIR_PORT_BITMAP_T port_bitmap;
+
+    /* Source MAC address hit forward control */
+    AIR_L2_FWD_CTRL_T sa_fwd;
+
+    /* Age Timer only for getting information */
+    UI32_T timer;
+} AIR_MAC_ENTRY_T;
+
+/* FUNCTION NAME: air_l2_addMacAddr
+ * PURPOSE:
+ *      Add or set a L2 unicast MAC address entry.
+ *      If the address entry doesn't exist, it will add the entry.
+ *      If the address entry already exists, it will set the entry
+ *      with user input value.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_mac_entry   --  Structure of MAC Address table
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TABLE_FULL
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_addMacAddr(
+    const UI32_T unit,
+    const AIR_MAC_ENTRY_T   *ptr_mac_entry);
+
+/* FUNCTION NAME: air_l2_delMacAddr
+ * PURPOSE:
+ *      Delete a L2 unicast MAC address entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_mac_entry   --  The structure of MAC Address table
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_delMacAddr(
+    const UI32_T unit,
+    const AIR_MAC_ENTRY_T   *ptr_mac_entry);
+
+/* FUNCTION NAME:  air_l2_getMacAddr
+ * PURPOSE:
+ *      Get a L2 unicast MAC address entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_mac_entry   --  The structure of MAC Address table
+ *
+ * OUTPUT:
+ *      ptr_count                -- The number of returned MAC entries
+ *      ptr_mac_entry            -- Structure of MAC Address table for
+ *                                  searching result.
+ *                                  The size of ptr_mac_entry depends
+ *                                  on the maximun number of bank.
+ *                                  The memory size should greater than
+ *                                  ((# of Bank) * (Size of entry
+ *                                  structure))
+ *                                  AIR_MAC_ENTRY_T
+ * RETURN:
+ *      AIR_E_OK                 -- Operation success.
+ *      AIR_E_BAD_PARAMETER      -- Parameter is wrong.
+ *      AIR_E_TIMEOUT            -- Timeout error.
+ *      AIR_E_ENTRY_NOT_FOUND    -- Entry is not found.
+ * NOTES:
+ *      If the parameter:mac in input argument ptr_mac_entry[0] is
+ *      empty. It means to search the first valid MAC address entry
+ *      in MAC address table. Otherwise, to search the specific MAC
+ *      address entry in input argument ptr_mac_entry[0].
+ *      Input argument ptr_mac_entry[0] needs include mac, ivl and
+ *      (fid or cvid) depends on ivl.
+ *      If argument ivl is TRUE, cvid is necessary, or fid is.
+ */
+AIR_ERROR_NO_T
+air_l2_getMacAddr(
+    const UI32_T unit,
+    UI8_T           *ptr_count,
+    AIR_MAC_ENTRY_T *ptr_mac_entry);
+
+/* FUNCTION NAME: hal_sco_l2_getMacBucketSize
+ * PURPOSE:
+ *      Get the bucket size of one MAC address set when searching L2 table.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_size        --  The bucket size
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_getMacBucketSize(
+    const UI32_T    unit,
+    UI32_T          *ptr_size);
+
+
+/* FUNCTION NAME: air_l2_getNextMacAddr
+ * PURPOSE:
+ *      Get the next L2 unicast MAC address entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_mac_entry   --  The structure of MAC Address table
+ *
+ * OUTPUT:
+ *      ptr_count       --  The number of returned MAC entries
+ *      ptr_mac_entry   --  Structure of MAC Address table for searching result.
+ *                          The size of ptr_mac_entry depends on the max. number of bank.
+ *                          The memory size should greater than ((# of Bank) * (Table size))
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *      AIR_E_ENTRY_NOT_FOUND
+ * NOTES:
+ *      If the parameter:mac in input argument ptr_mac_entry[0] is empty.
+ *      It means to search the next valid MAC address entries of last searching result.
+ *      Otherwise, to search the next valid MAC address entry of the specific MAC address
+ *      entry in input argument ptr_mac_entry[0].
+ *      Input argument ptr_mac_entry[0] needs include mac, ivl and (fid or cvid) depends on ivl.
+ *      If argument ivl is TRUE, cvid is necessary, or fid is.
+ */
+AIR_ERROR_NO_T
+air_l2_getNextMacAddr(
+    const UI32_T unit,
+    UI8_T           *ptr_count,
+    AIR_MAC_ENTRY_T *ptr_mac_entry);
+
+/* FUNCTION NAME: air_l2_clearMacAddr
+ * PURPOSE:
+ *      Clear all L2 unicast MAC address entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_clearMacAddr(
+    const UI32_T unit);
+
+/* FUNCTION NAME:   air_l2_setMacAddrAgeOut
+ * PURPOSE:
+ *      Set the age out time of L2 MAC address entries.
+ * INPUT:
+ *      unit                     -- Device ID
+ *      age_time                 -- Age out time (second)
+ *                                  (1..AIR_L2_MAC_MAX_AGE_OUT_TIME)
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                 -- Operation success.
+ *      AIR_E_BAD_PARAMETER      -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+
+AIR_ERROR_NO_T
+air_l2_setMacAddrAgeOut(
+    const UI32_T    unit,
+    const UI32_T    age_time);
+
+/* FUNCTION NAME:   air_l2_getMacAddrAgeOut
+ * PURPOSE:
+ *      Get the age out time of unicast MAC address.
+ * INPUT:
+ *      unit                     -- Device ID
+ * OUTPUT:
+ *      ptr_age_time             -- age out time
+ * RETURN:
+ *      AIR_E_OK                 -- Operation success.
+ *      AIR_E_BAD_PARAMETER      -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_getMacAddrAgeOut(
+    const UI32_T    unit,
+    UI32_T          *ptr_age_time);
+
+/* FUNCTION NAME: air_l2_setAgeEnable
+ * PURPOSE:
+ *      Set aging state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_setAgeEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state);
+
+/* FUNCTION NAME: air_l2_getAgeEnable
+ * PURPOSE:
+ *      Get age state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_getAgeEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_state);
+
+#endif /* End of AIR_L2_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_lag.h b/feed/app/switch/src/an8855_sdk/api/inc/air_lag.h
new file mode 100644
index 0000000..7ab0132
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_lag.h
@@ -0,0 +1,330 @@
+/* FILE NAME:  air_lag.h
+ * PURPOSE:
+ *      Define the Link Agrregation function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+#ifndef AIR_LAG_H
+#define AIR_LAG_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+#define AIR_LAG_MAX_MEM_NUM       (4)
+#define AIR_LAG_MAX_PTG_NUM       (2)
+
+#define AIR_LAG_MAX_SA_LRN_NUM     BITS(0,12)
+#define AIR_GRP_PORT(p,n)         (((p) & BITS(0,4)) << (n * 8))
+#define AIR_LAG_MAX_BUSY_TIME      (20)
+
+
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+typedef struct AIR_LAG_PTGINFO_S
+{
+    UI32_T csr_gp_enable[4];
+    UI32_T csr_gp_port[4];
+}AIR_LAG_PTGINFO_T;
+
+
+typedef struct AIR_LAG_DISTINFO_S
+{
+    UI32_T sp:1;
+    UI32_T sa:1;
+    UI32_T da:1;
+    UI32_T sip:1;
+    UI32_T dip:1;
+    UI32_T sport:1;
+    UI32_T dport:1;
+    UI32_T reverse:25;
+}AIR_LAG_DISTINFO_T;
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+/* FUNCTION NAME: air_lag_setMember
+ * PURPOSE:
+ *      Set LAG member(s) for a specific LAG port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptg_index       --  Port trunk index
+ *      mem_index       --  Member index
+ *      mem_en          --  enable Member
+ *      port_index      --  Member port
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_setMember(
+    const UI32_T        unit,
+    const UI32_T        ptg_index,
+    const UI32_T        mem_index,
+    const UI32_T        mem_en,
+    const UI32_T        port_index);
+
+
+/* FUNCTION NAME: air_lag_getMember
+ * PURPOSE:
+ *      Get LAG member count.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptg_index       --  Port trunk index
+ *
+ * OUTPUT:
+ *      member      --  Member ports of  one port trunk
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_getMember(
+    const UI32_T unit,
+    const UI32_T ptg_index,
+    AIR_LAG_PTGINFO_T * member);
+
+/* FUNCTION NAME: air_lag_set_ptgc_state
+ * PURPOSE:
+ *     set port trunk group control state.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptgc_enable     --  enabble or disable port trunk function
+ *
+ * OUTPUT:
+ *      none
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_set_ptgc_state(
+    const UI32_T unit,
+    const BOOL_T ptgc_enable);
+
+/* FUNCTION NAME: air_lag_get_ptgc_state
+ * PURPOSE:
+ *      Get port trunk group control state.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_state        --  port trunk fucntion is enable or disable
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_get_ptgc_state(
+    const UI32_T unit,
+    UI32_T *ptr_state);
+
+
+/* FUNCTION NAME: air_lag_setDstInfo
+ * PURPOSE:
+ *      Set information for the packet distribution.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      dstInfo         --  Infomation selection of packet distribution
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_setDstInfo(
+    const UI32_T unit,
+    const AIR_LAG_DISTINFO_T dstInfo);
+
+/* FUNCTION NAME: air_lag_getDstInfo
+ * PURPOSE:
+ *      Set port trunk hashtype.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_dstInfo     --  Infomation selection of packet distribution
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_getDstInfo(
+    const UI32_T unit,
+    AIR_LAG_DISTINFO_T *ptr_dstInfo);
+
+
+/* FUNCTION NAME: air_lag_setState
+ * PURPOSE:
+ *      Set the enable/disable for a specific LAG port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      hashtype        --  crc32msb/crc32lsb/crc16/xor4
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_sethashtype(
+    const UI32_T unit,
+    const UI32_T hashtype);
+
+/* FUNCTION NAME: air_lag_getState
+ * PURPOSE:
+ *      Get port trunk hashtype.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      hashtype        --  crc32msb/crc32lsb/crc16/xor4
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_gethashtype(
+    const UI32_T unit,
+    UI32_T *hashtype);
+
+/* FUNCTION NAME: air_lag_setSpSel
+ * PURPOSE:
+ *      Set the enable/disable for selection source port composition.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      enable          --  enable or disable source port compare
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_setSpSel(
+    const UI32_T unit,
+    const BOOL_T spsel_enable);
+
+/* FUNCTION NAME: air_lag_getSpSel
+ * PURPOSE:
+ *      Get selection source port composition.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_state       --  source port compare is enable or disable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_getSpSel(
+    const UI32_T unit,
+    UI32_T *ptr_state);
+
+/* FUNCTION NAME: air_lag_setPTSeed
+ * PURPOSE:
+ *      Set the enable/disable for a specific LAG port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptseed          --  port trunk rand seed
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_setPTSeed(
+    const UI32_T unit,
+    const UI32_T ptseed);
+
+/* FUNCTION NAME: air_lag_getPTSeed
+ * PURPOSE:
+ *      Get port trunk hashtype.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptseed          --  port trunk rand seed
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_getPTSeed(
+    const UI32_T unit,
+    UI32_T *ptseed);
+
+
+#endif /* End of AIR_LAG_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_led.h b/feed/app/switch/src/an8855_sdk/api/inc/air_led.h
new file mode 100644
index 0000000..6419453
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_led.h
@@ -0,0 +1,299 @@
+/* FILE NAME: air_led.h
+ * PURPOSE:
+ * 1. Define information for air_led.c
+ * NOTES:
+ */
+
+#ifndef AIR_LED_H
+#define AIR_LED_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+#define MAX_NUM_LED_ENTITY          2
+#define UNIT_LED_BLINK_DURATION     1024
+
+typedef enum
+{
+    AIR_LED_MODE_DISABLE,      /* ALL LED outputs ard disabled */
+    AIR_LED_MODE_2LED_MODE0,   /* 2 LED pins are enabled. Active high.
+                                   LED 0: Link.
+                                   LED 1: Activity. */
+    AIR_LED_MODE_2LED_MODE1,   /* 2 LED pins are enabled. Active high.
+                                   LED 0: Link 1000 Activity.
+                                   LED 1: Link 100 Activity. */
+    AIR_LED_MODE_2LED_MODE2,   /* 2 LED pins are enabled. Active high.
+                                   LED 0: Link 1000 Activity.
+                                   LED 1: Link 10/100 Activity. */
+    AIR_LED_MODE_USER_DEFINE,  /* LED functions of each pin are user-defined */
+    AIR_LED_MODE_LAST
+}AIR_LED_MODE_T;
+
+typedef enum
+{
+    AIR_LED_BLK_DUR_32M,           /* Blink duration: 32 ms */
+    AIR_LED_BLK_DUR_64M,           /* Blink duration: 64 ms */
+    AIR_LED_BLK_DUR_128M,          /* Blink duration: 128 ms */
+    AIR_LED_BLK_DUR_256M,          /* Blink duration: 256 ms */
+    AIR_LED_BLK_DUR_512M,          /* Blink duration: 512 ms */
+    AIR_LED_BLK_DUR_1024M,         /* Blink duration: 1024 ms */
+    AIR_LED_BLK_DUR_LAST
+}AIR_LED_BLK_DUR_T;
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+typedef struct AIR_LED_ON_EVT_S
+{
+    BOOL_T link_1000m;     /* Link 1000M */
+    BOOL_T link_100m;      /* Link 100M */
+    BOOL_T link_10m;       /* Link 10M */
+    BOOL_T link_dn;        /* Link Down */
+    BOOL_T fdx;            /* Full Duplex */
+    BOOL_T hdx;            /* Half Duplex */
+    BOOL_T force;          /* Force on (logic 1) */
+}AIR_LED_ON_EVT_T;
+
+typedef struct AIR_LED_BLK_EVT_S
+{
+    BOOL_T tx_act_1000m;  /* 1000Mbps TX Activity */
+    BOOL_T rx_act_1000m;  /* 1000Mbps RX Activity */
+    BOOL_T tx_act_100m;   /* 100Mbps TX Activity */
+    BOOL_T rx_act_100m;   /* 100Mbps RX Activity */
+    BOOL_T tx_act_10m;    /* 10Mbps TX Activity */
+    BOOL_T rx_act_10m;    /* 10Mbps RX Activity */
+    BOOL_T cls;           /* Collision */
+    BOOL_T rx_crc;        /* Rx CRC Error */
+    BOOL_T rx_idle;       /* Rx Idle Error */
+    BOOL_T force;         /* Force blinks (logic 1) */
+}AIR_LED_BLK_EVT_T;
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+/* FUNCTION NAME: air_led_setMode
+ * PURPOSE:
+ *      Set the LED processing mode for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      mode            --  Setting mode of LED
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      The LED control register is shared with all port on AN8855.
+ *      Setting LED on any one port will also set to each other ports.
+ */
+AIR_ERROR_NO_T
+air_led_setMode(
+    const UI32_T unit,
+    const UI8_T port,
+    const AIR_LED_MODE_T mode);
+
+/* FUNCTION NAME:air_led_getMode
+ * PURPOSE:
+ *      Get the LED processing mode for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_mode        --  Setting mode of LED
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_led_getMode(
+    const UI32_T unit,
+    const UI8_T port,
+    AIR_LED_MODE_T *ptr_mode);
+
+/* FUNCTION NAME: air_led_setState
+ * PURPOSE:
+ *      Set the enable state for a specific LED.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      entity          --  Entity of LED
+ *      state           --  TRUE: Enable
+ *                          FALSE: Disable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      The LED control register is shared with all port on AN8855.
+ *      Setting LED on any one port will also set to each other ports.
+ */
+AIR_ERROR_NO_T
+air_led_setState(
+    const UI32_T unit,
+    const UI8_T port,
+    const UI8_T entity,
+    const BOOL_T state);
+
+/* FUNCTION NAME: air_led_getState
+ * PURPOSE:
+ *      Get the enable state for a specific LED.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      entity          --  Entity of LED
+ *
+ * OUTPUT:
+ *      ptr_state       --  TRUE: Enable
+ *                          FALSE: Disable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_led_getState(
+    const UI32_T unit,
+    const UI8_T port,
+    const UI8_T entity,
+    BOOL_T *ptr_state);
+
+/* FUNCTION NAME: air_led_setUsrDef
+ * PURPOSE:
+ *      Set the user-defined configuration of a speficic LED.
+ *      It only work when air_led_setState() set to AIR_LED_MODE_USER_DEFINE.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      entity          --  Entity of LED
+ *      polar           --  LOW: Active low
+ *                          HIGH: Active high
+ *      on_evt          --  AIR_LED_ON_EVT_T
+ *                          LED turns on if any event is detected
+ *      blk_evt         --  AIR_LED_BLK_EVT_T
+ *                          LED blinks blink if any event is detected
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      The LED control register is shared with all port on AN8855.
+ *      Setting LED on any one port will also set to each other ports.
+ */
+AIR_ERROR_NO_T
+air_led_setUsrDef(
+    const UI32_T unit,
+    const UI8_T port,
+    const UI8_T entity,
+    const BOOL_T polar,
+    const AIR_LED_ON_EVT_T on_evt,
+    const AIR_LED_BLK_EVT_T blk_evt);
+
+/* FUNCTION NAME: air_led_getUsrDef
+ * PURPOSE:
+ *      Get the user-defined configuration of a speficic LED.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      entity          --  Entity of LED
+ * OUTPUT:
+ *      ptr_polar       --  LOW: Active low
+ *                          HIGH: Active high
+ *      ptr_on_evt      --  AIR_LED_ON_EVT_T
+ *                          LED turns on if any event is detected
+ *      ptr_blk_evt     --  AIR_LED_BLK_EVT_T
+ *                          LED blinks if any event is detected
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_led_getUsrDef(
+    const UI32_T unit,
+    const UI8_T port,
+    const UI8_T entity,
+    BOOL_T *ptr_polar,
+    AIR_LED_ON_EVT_T *ptr_on_evt,
+    AIR_LED_BLK_EVT_T *ptr_blk_evt);
+
+/* FUNCTION NAME: air_led_setBlkTime
+ * PURPOSE:
+ *      Set the Blinking duration of a speficic LED.
+ *      It only work when air_led_setState() set to AIR_LED_MODE_USER_DEFINE.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      dur             --  Blink duration
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      The LED control register is shared with all port on AN8855.
+ *      Setting LED on any one port will also set to each other ports.
+ */
+AIR_ERROR_NO_T
+air_led_setBlkTime(
+    const UI32_T unit,
+    const UI8_T port,
+    const AIR_LED_BLK_DUR_T dur);
+
+/* FUNCTION NAME: air_led_getBlkTime
+ * PURPOSE:
+ *      Get the Blinking duration of a speficic LED.
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_dur         --  Blink duration
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_led_getBlkTime(
+    const UI32_T unit,
+    const UI8_T port,
+    AIR_LED_BLK_DUR_T *ptr_dur);
+
+#endif /* End of AIR_LED_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_mib.h b/feed/app/switch/src/an8855_sdk/api/inc/air_mib.h
new file mode 100644
index 0000000..6ce0323
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_mib.h
@@ -0,0 +1,250 @@
+/* FILE NAME: air_mib.h
+ * PURPOSE:
+ *      Define the MIB counter function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+#ifndef AIR_MIB_H
+#define AIR_MIB_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#define MIB_ALL_ITEM    0xFFFFFFFF
+#define AIR_MIB_MAX_ACL_EVENT_NUM      (64)
+#define CSR_ACL_MIB_SEL_OFFSET          (4)
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+typedef struct AIR_MIB_CNT_TX_S
+{
+    UI32_T TDPC;      /* TX Drop Packet */
+    UI32_T TCRC;      /* TX CRC Packet */
+    UI32_T TUPC;      /* TX Unicast Packet */
+    UI32_T TMPC;      /* TX Multicast Packet */
+    UI32_T TBPC;      /* TX Broadcast Packet */
+    UI32_T TCEC;      /* TX Collision Event Count */
+    UI32_T TSCEC;     /* TX Single Collision Event Count */
+    UI32_T TMCEC;     /* TX Multiple Conllision Event Count */
+    UI32_T TDEC;      /* TX Deferred Event Count */
+    UI32_T TLCEC;     /* TX Late Collision Event Count */
+    UI32_T TXCEC;     /* TX Excessive Collision Event Count */
+    UI32_T TPPC;      /* TX Pause Packet */
+    UI32_T TL64PC;    /* TX Packet Length 64 bytes */
+    UI32_T TL65PC;    /* TX Packet Length 65 ~ 127 bytes */
+    UI32_T TL128PC;   /* TX Packet Length 128 ~ 255 bytes */
+    UI32_T TL256PC;   /* TX Packet Length 256 ~ 511 bytes */
+    UI32_T TL512PC;   /* TX Packet Length 512 ~ 1023 bytes */
+    UI32_T TL1024PC;  /* TX Packet Length 1024 ~ 1518 bytes */
+    UI32_T TL1519PC;  /* TX Packet Length 1519 ~ max bytes */
+    UI32_T TODPC;     /* TX Oversize Drop Packet */
+    UI64_T TOC;       /* TX Octets good or bad packtes determined by TX_OCT_CNT_GOOD or TX_OCT_CNT_BAD(64 bit-width)*/
+    UI64_T TOC2;      /* TX Octets bad packets (64 bit-width)*/
+}AIR_MIB_CNT_TX_T;
+
+typedef struct AIR_MIB_CNT_RX_S
+{
+    UI32_T RDPC;      /* RX Drop Packet */
+    UI32_T RFPC;      /* RX filtering Packet */
+    UI32_T RUPC;      /* RX Unicast Packet */
+    UI32_T RMPC;      /* RX Multicast Packet */
+    UI32_T RBPC;      /* RX Broadcast Packet */
+    UI32_T RAEPC;     /* RX Alignment Error Packet */
+    UI32_T RCEPC;     /* RX CRC Packet */
+    UI32_T RUSPC;     /* RX Undersize Packet */
+    UI32_T RFEPC;     /* RX Fragment Error Packet */
+    UI32_T ROSPC;     /* RX Oversize Packet */
+    UI32_T RJEPC;     /* RX Jabber Error Packet */
+    UI32_T RPPC;      /* RX Pause Packet */
+    UI32_T RL64PC;    /* RX Packet Length 64 bytes */
+    UI32_T RL65PC;    /* RX Packet Length 65 ~ 127 bytes */
+    UI32_T RL128PC;   /* RX Packet Length 128 ~ 255 bytes */
+    UI32_T RL256PC;   /* RX Packet Length 256 ~ 511 bytes */
+    UI32_T RL512PC;   /* RX Packet Length 512 ~ 1023 bytes */
+    UI32_T RL1024PC;  /* RX Packet Length 1024 ~ 1518 bytes */
+    UI32_T RL1519PC;  /* RX Packet Length 1519 ~ max bytes */
+    UI32_T RCDPC;     /* RX_CTRL Drop Packet */
+    UI32_T RIDPC;     /* RX Ingress Drop Packet */
+    UI32_T RADPC;     /* RX ARL Drop Packet */
+    UI32_T FCDPC;     /* FLow Control Drop Packet */
+    UI32_T WRDPC;     /* WRED Drop Packtet */
+    UI32_T MRDPC;     /* Mirror Drop Packet */
+    UI32_T SFSPC;     /* RX  sFlow Sampling Packet */
+    UI32_T SFTPC;     /* Rx sFlow Total Packet */
+    UI32_T RXC_DPC;   /* Port Control Drop Packet */
+    UI64_T ROC;       /* RX Octets good or bad packtes determined by TX_OCT_CNT_GOOD or TX_OCT_CNT_BAD (64 bit-width)*/
+    UI64_T ROC2;      /* RX Octets bad packets (64 bit-width)*/
+
+}AIR_MIB_CNT_RX_T;
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+/* FUNCTION NAME: air_mib_setEnable
+ * PURPOSE:
+ *      Enable or Disable mib count fucntion.
+ *
+ * INPUT:
+ *      unit           --   Device ID
+ *      mib_en         --   enable or disable mib_en
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_setEnable(
+    const UI32_T unit,
+    const BOOL_T mib_en);
+/* FUNCTION NAME: air_mib_getEnable
+ * PURPOSE:
+ *      Enable or Disable mib count fucntion.
+ *
+ * INPUT:
+ *      unit           --   Device ID
+ *
+ * OUTPUT:
+ *      mib_en         --   enable or disable mib_en
+
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_getEnable(
+    const UI32_T unit,
+    BOOL_T *mib_en);
+
+/* FUNCTION NAME: air_mib_clear
+ * PURPOSE:
+ *      Clear all counters of all MIB counters.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_clear(
+    const UI32_T unit);
+
+/* FUNCTION NAME: air_mib_clear_by_port
+ * PURPOSE:
+ *      Clear all counters of all MIB counters.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  clear port number
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_clear_by_port(
+    const UI32_T unit,
+    const UI32_T port);
+
+/* FUNCTION NAME: air_mib_clearAclEvent
+ * PURPOSE:
+ *      Clear all counters of ACL event
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+
+/* FUNCTION NAME: air_mib_get
+ * PURPOSE:
+ *      Get the structure of MIB counter for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_rx_mib      --  MIB Counters of Rx Event
+ *      ptr_tx_mib      --  MIB Counters of Tx Event
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_get(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_MIB_CNT_RX_T *ptr_rx_mib,
+    AIR_MIB_CNT_TX_T *ptr_tx_mib);
+
+AIR_ERROR_NO_T
+air_mib_clearAclEvent(
+    const UI32_T unit);
+
+/* FUNCTION NAME: air_mib_getAclEvent
+ * PURPOSE:
+ *      Get the total number of ACL event occurred.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      idx             --  Index of ACL event
+ *
+ * OUTPUT:
+ *      ptr_cnt         --  The total number of ACL event occured
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_getAclEvent(
+    const UI32_T unit,
+    const UI32_T idx,
+    UI32_T *ptr_cnt);
+
+#endif /* End of AIR_MIB_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_mirror.h b/feed/app/switch/src/an8855_sdk/api/inc/air_mirror.h
new file mode 100644
index 0000000..2bef998
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_mirror.h
@@ -0,0 +1,202 @@
+/* FILE NAME: air_mirror.h
+ * PURPOSE:
+ *      Define the port mirror function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+#ifndef AIR_MIRROR_H
+#define AIR_MIRROR_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+#define AIR_MAX_MIRROR_SESSION  (2)
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* mirror session */
+typedef struct AIR_MIR_SESSION_S
+{
+#define AIR_MIR_SESSION_FLAGS_ENABLE            (1U << 0)
+#define AIR_MIR_SESSION_FLAGS_DIR_TX            (1U << 1)
+#define AIR_MIR_SESSION_FLAGS_DIR_RX            (1U << 2)
+#define AIR_MIR_SESSION_FLAGS_TX_TAG_OBEY_CFG   (1U << 3)
+
+    /* flags refer to AIR_MIR_SESSION_FLAGS_XXX */
+    UI32_T                              flags;
+    UI32_T                              dst_port;
+    UI32_T                              src_port;
+} AIR_MIR_SESSION_T;
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+/* FUNCTION NAME: air_mir_addSession
+* PURPOSE:
+*      This API is used to add or set a mirror session.
+* INPUT:
+*      unit        --   Device unit number
+*      session_id  --   The session information
+*      ptr_session --   The session information
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       AIR_E_OK
+*       AIR_E_BAD_PARAMETER
+*
+* NOTES:
+*       None
+*/
+AIR_ERROR_NO_T
+air_mir_addSession(
+    const UI32_T unit,
+    const UI32_T session_id,
+    const AIR_MIR_SESSION_T *ptr_session);
+
+/* FUNCTION NAME: air_mir_delSession
+* PURPOSE:
+*      This API is used to delete a mirror session.
+* INPUT:
+*      unit        --   Device unit number
+*      session_id  --   The session information
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       AIR_E_OK
+*       AIR_E_BAD_PARAMETER
+*
+* NOTES:
+*       None
+*/
+AIR_ERROR_NO_T
+air_mir_delSession(
+    const UI32_T unit,
+    const UI32_T session_id);
+
+
+/* FUNCTION NAME: air_mir_getSession
+* PURPOSE:
+*      This API is used to get mirror session information.
+* INPUT:
+*      unit         --  Device unit number
+*      session_id   --   The session information
+* OUTPUT:
+*      ptr_session  --  The information of this session to be obtained
+* RETURN:
+*       AIR_E_OK
+*       AIR_E_BAD_PARAMETER
+*
+* NOTES:
+*       None
+*/
+AIR_ERROR_NO_T
+air_mir_getSession(
+    const UI32_T unit,
+    const UI32_T session_id,
+    AIR_MIR_SESSION_T *ptr_session);
+
+
+/* FUNCTION NAME: air_mir_setSessionAdminMode
+* PURPOSE:
+*      This API is used to set mirror session state
+* INPUT:
+*      unit         --  Device unit number
+*      session_id   --  mirror session id
+*      state        --  FALSE: disable
+*                       TRUE:  enable
+* OUTPUT:
+*      None
+* RETURN:
+*       AIR_E_OK
+*       AIR_E_BAD_PARAMETER
+*
+* NOTES:
+*       None
+*/
+AIR_ERROR_NO_T
+air_mir_setSessionAdminMode(
+    const UI32_T unit,
+    const UI32_T session_id,
+    const BOOL_T state);
+
+
+/* FUNCTION NAME: air_mir_getSessionAdminMode
+* PURPOSE:
+*      This API is used to get mirror session state
+* INPUT:
+*      unit         --  Device unit number
+*      session_id   --  mirror session id
+* OUTPUT:
+*      state        --  FALSE: disable
+*                       TRUE:  enable
+* RETURN:
+*       AIR_E_OK
+*       AIR_E_BAD_PARAMETER
+*
+* NOTES:
+*       None
+*/
+AIR_ERROR_NO_T
+air_mir_getSessionAdminMode(
+    const UI32_T unit,
+    const UI32_T session_id,
+    BOOL_T *state);
+
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+/* FUNCTION NAME: air_mir_setMirrorPort
+* PURPOSE:
+*      This API is used to set mirror port mirroring type
+* INPUT:
+*      unit        --   Device unit number
+*      session_id  --  mirror session id
+*      ptr_session --   The session information
+* OUTPUT:
+*       None
+*
+* RETURN:
+*       AIR_E_OK
+*       AIR_E_BAD_PARAMETER
+*
+* NOTES:
+*       None
+*/
+AIR_ERROR_NO_T
+air_mir_setMirrorPort(
+    const UI32_T unit,
+    const UI32_T session_id,
+    const AIR_MIR_SESSION_T *ptr_session);
+
+
+/* FUNCTION NAME: air_mir_getMirrorPort
+* PURPOSE:
+*      This API is used to get mirror port mirroring type
+* INPUT:
+*      unit         --  Device unit number
+*      session_id   --  mirror session id
+* OUTPUT:
+*      ptr_session  --  The information of this session to be obtained
+* RETURN:
+*       AIR_E_OK
+*       AIR_E_BAD_PARAMETER
+*
+* NOTES:
+*       None
+*/
+AIR_ERROR_NO_T
+air_mir_getMirrorPort(
+    const UI32_T unit,
+    const UI32_T session_id,
+    AIR_MIR_SESSION_T *ptr_session);
+
+
+#endif /* End of AIR_MIRROR_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_port.h b/feed/app/switch/src/an8855_sdk/api/inc/air_port.h
new file mode 100644
index 0000000..a8745eb
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_port.h
@@ -0,0 +1,963 @@
+/* FILE NAME:   air_port.h
+ * PURPOSE:
+ *      Define port function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+#ifndef AIR_PORT_H
+#define AIR_PORT_H
+
+/* INCLUDE FILE DECLARATIONS
+ */
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+#define AIR_MAX_NUM_OF_UNIT            (1)
+#define AIR_DST_DEFAULT_PORT           (31)
+#define AIR_PORT_TX                    (0x00)
+#define AIR_PORT_RX                    (0x01)
+#define AIR_MAX_NUM_OF_PORTS           (7)
+#define AIR_MAX_NUM_OF_GIGA_PORTS      (5)
+#define AIR_SGMII_PORT_OFFSET_BEGIN    (5)
+#define AIR_SGMII_PORT_OFFSET_END      (6)
+#define AIR_ALL_PORT_BITMAP            (0x7F)
+
+/* Definition of Power Saving mode */
+#define AIR_PORT_PS_LINKSTATUS         (0x1 << 0)
+#define AIR_PORT_PS_EEE                (0x1 << 1)
+#define AIR_PORT_PS_MASK               (0x3)
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+/* AIR_PORT_BITMAP_T is the data type for physical port bitmap. */
+#define AIR_BITMAP_SIZE(bit_num)                    ((((bit_num) - 1) / AIR_MAX_NUM_OF_PORTS) + 1)
+#define AIR_PORT_BITMAP_SIZE           AIR_BITMAP_SIZE(AIR_MAX_NUM_OF_PORTS)
+typedef UI32_T   AIR_PORT_BITMAP_T[AIR_PORT_BITMAP_SIZE];
+
+#define AIR_INVALID_ID      (0xFFFFFFFF)
+#define AIR_PORT_INVALID    (AIR_INVALID_ID)
+
+/* Definition of SGMII mode */
+typedef enum
+{
+    AIR_PORT_SGMII_MODE_AN,
+    AIR_PORT_SGMII_MODE_FORCE,
+    AIR_PORT_SGMII_MODE_LAST
+}AIR_PORT_SGMII_MODE_T;
+
+/* Definition of port speed */
+typedef enum
+{
+    AIR_PORT_SPEED_10M,
+    AIR_PORT_SPEED_100M,
+    AIR_PORT_SPEED_1000M,
+    AIR_PORT_SPEED_2500M,
+    AIR_PORT_SPEED_LAST
+}AIR_PORT_SPEED_T;
+
+typedef enum
+{
+    AIR_PORT_DUPLEX_HALF,
+    AIR_PORT_DUPLEX_FULL,
+    AIR_PORT_DUPLEX_LAST
+}AIR_PORT_DUPLEX_T;
+
+typedef enum
+{
+    AIR_PORT_LINK_DOWN,
+    AIR_PORT_LINK_UP,
+    AIR_PORT_LINK_LAST
+}AIR_PORT_LINK_T;
+
+/* Definition of Smart speed down will occur after AN failed how many times */
+typedef enum
+{
+    AIR_PORT_SSD_2T,
+    AIR_PORT_SSD_3T,
+    AIR_PORT_SSD_4T,
+    AIR_PORT_SSD_5T,
+    AIR_PORT_SSD_LAST
+}AIR_PORT_SSD_T;
+
+typedef enum
+{
+    AIR_PORT_VLAN_MODE_PORT_MATRIX = 0,    /* Port matrix mode  */
+    AIR_PORT_VLAN_MODE_FALLBACK,           /* Fallback mode  */
+    AIR_PORT_VLAN_MODE_CHECK,              /* Check mode  */
+    AIR_PORT_VLAN_MODE_SECURITY,           /* Security mode  */
+    AIR_PORT_VLAN_MODE_LAST
+} AIR_PORT_VLAN_MODE_T;
+
+/* Definition of AN Advertisement Register */
+typedef struct AIR_AN_ADV_S
+{
+    BOOL_T advCap10HDX;         /* Advertises 10 BASE-T HDX */
+    BOOL_T advCap10FDX;         /* Advertises 10 BASE-T FDX */
+    BOOL_T advCap100HDX;        /* Advertises 100 BASE-T HDX */
+    BOOL_T advCap100FDX;        /* Advertises 100 BASE-T FDX */
+    BOOL_T advCap1000FDX;       /* Advertises 1000 BASE-T FDX */
+    BOOL_T advPause;            /* Advertieses Asynchronous Pause */
+}AIR_AN_ADV_T;
+
+/* Definition of Link Status of a specific port */
+typedef struct AIR_PORT_STATUS_S
+{
+    BOOL_T link;
+    BOOL_T duplex;
+    UI32_T speed;
+}AIR_PORT_STATUS_T;
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+ */
+/* FUNCTION NAME: air_port_setPortMatrix
+ * PURPOSE:
+ *      Set port matrix from the specified device.
+ *
+ * INPUT:
+ *      unit            --  Unit id
+ *      port            --  Port id
+ *      port_bitmap     --  Matrix port bitmap
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_port_setPortMatrix(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const UI32_T    port_bitmap);
+
+/* FUNCTION NAME: air_port_getPortMatrix
+ * PURPOSE:
+ *      Get port matrix from the specified device.
+ *
+ * INPUT:
+ *      unit            --  Unit id
+ *      port            --  Port id
+ *
+ * OUTPUT:
+ *      p_port_bitmap   --  Matrix port bitmap
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_port_getPortMatrix(
+    const UI32_T    unit,
+    const UI32_T    port,
+    UI32_T          *p_port_bitmap);
+
+/* FUNCTION NAME: air_port_setVlanMode
+ * PURPOSE:
+ *      Set port-based vlan mechanism from the specified device.
+ *
+ * INPUT:
+ *      unit            --  Unit id
+ *      port            --  Port id
+ *      mode            --  Port vlan mode
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_port_setVlanMode(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const AIR_PORT_VLAN_MODE_T mode);
+
+/* FUNCTION NAME: air_port_getVlanMode
+ * PURPOSE:
+ *      Get port-based vlan mechanism from the specified device.
+ *
+ * INPUT:
+ *      unit            --  Unit id
+ *      port            --  Port id
+ *
+ * OUTPUT:
+ *      p_mode          --  Port vlan mode
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_port_getVlanMode(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_PORT_VLAN_MODE_T *p_mode);
+
+/* FUNCTION NAME: air_port_setAnMode
+ * PURPOSE:
+ *      Set the auto-negotiation mode for a specific port.(Auto or Forced)
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setAnMode(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state);
+
+/* FUNCTION NAME: air_port_getAnMode
+ * PURPOSE:
+ *      Get the auto-negotiation mode for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getAnMode(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *ptr_state);
+
+/* FUNCTION NAME: air_port_setLocalAdvAbility
+ * PURPOSE:
+ *      Set the auto-negotiation advertisement for a
+ *      specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      adv             --  AN advertisement setting
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setLocalAdvAbility(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_AN_ADV_T adv);
+
+/* FUNCTION NAME: air_port_getLocalAdvAbility
+ * PURPOSE:
+ *      Get the auto-negotiation advertisement for a
+ *      specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_adv         --  AN advertisement setting
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getLocalAdvAbility(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_AN_ADV_T *ptr_adv);
+
+/* FUNCTION NAME: air_port_getRemoteAdvAbility
+ * PURPOSE:
+ *      Get the auto-negotiation remote advertisement for a
+ *      specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_lp_adv      --  AN advertisement of link partner
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getRemoteAdvAbility(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_AN_ADV_T *ptr_lp_adv);
+
+/* FUNCTION NAME: air_port_setSpeed
+ * PURPOSE:
+ *      Set the speed for a specific port.
+ *      This setting is used on force mode only.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      speed           --  AIR_PORT_SPEED_10M:  10Mbps
+ *                          AIR_PORT_SPEED_100M: 100Mbps
+ *                          AIR_PORT_SPEED_1000M:1Gbps
+ *                          AIR_PORT_SPEED_2500M:2.5Gbps (Port5, Port6)
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setSpeed(
+    const UI32_T unit,
+    const UI32_T port,
+    const UI32_T speed);
+
+/* FUNCTION NAME: air_port_getSpeed
+ * PURPOSE:
+ *      Get the speed for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_speed       --  AIR_PORT_SPEED_10M:  10Mbps
+ *                          AIR_PORT_SPEED_100M: 100Mbps
+ *                          AIR_PORT_SPEED_1000M:1Gbps
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getSpeed(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_speed);
+
+/* FUNCTION NAME: air_port_setDuplex
+ * PURPOSE:
+ *      Get the duplex for a specific port.
+ *      This setting is used on force mode only.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      duplex          --  AIR_PORT_DUPLEX_HALF
+ *                          AIR_PORT_DUPLEX_FULL
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setDuplex(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T duplex);
+
+/* FUNCTION NAME: air_port_getDuplex
+ * PURPOSE:
+ *      Get the duplex for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_duplex      --  AIR_PORT_DUPLEX_HALF
+ *                          AIR_PORT_DUPLEX_FULL
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getDuplex(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *ptr_duplex);
+
+/* FUNCTION NAME: air_port_getLink
+ * PURPOSE:
+ *      Get the physical link status for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_ps          --  AIR_PORT_STATUS_T
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getLink(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_PORT_STATUS_T *ptr_ps);
+
+/* FUNCTION NAME: air_port_setBckPres
+ * PURPOSE:
+ *      Set the back pressure configuration for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      bckPres         --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setBckPres(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T bckPres);
+
+/* FUNCTION NAME: air_port_getBckPres
+ * PURPOSE:
+ *      Get the back pressure configuration for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_bckPres     --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getBckPres(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *ptr_bckPres);
+
+/* FUNCTION NAME: air_port_setFlowCtrl
+ * PURPOSE:
+ *      Set the flow control configuration for specific port.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number (0 - 6)
+ *      dir             --  Directions of AIR_PORT_TX or AIR_PORT_RX
+ *      fc_en           --  TRUE: Enable select port flow control
+ *                          FALSE:Disable select port flow control
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setFlowCtrl(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T dir,
+    const BOOL_T fc_en);
+
+/* FUNCTION NAME: air_port_getFlowCtrl
+ * PURPOSE:
+ *      Get the flow control configuration for specific port.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number (0..6)
+ *      dir             --  AIR_PORT_TX
+ *                          AIR_PORT_RX
+ * OUTPUT:
+ *      ptr_fc_en       --  FALSE: Port flow control disable
+ *                          TRUE: Port flow control enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getFlowCtrl(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T dir,
+    BOOL_T *ptr_fc_en);
+
+/* FUNCTION NAME: air_port_setJumbo
+ * PURPOSE:
+ *      Set accepting jumbo frmes with specificied size.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      pkt_len         --  Select max packet length
+ *                          RX_PKT_LEN_1518
+ *                          RX_PKT_LEN_1536
+ *                          RX_PKT_LEN_1552
+ *                          RX_PKT_LEN_MAX_JUMBO
+ *      frame_len       --  Select max lenght of jumbo frames
+ *                          Range : 2 - 15
+ *                          Units : K Bytes
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setJumbo(
+    const UI32_T unit,
+    const UI32_T pkt_len,
+    const UI32_T frame_len);
+
+/* FUNCTION NAME: air_port_getJumbo
+ * PURPOSE:
+ *      Get accepting jumbo frmes with specificied size.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *
+ * OUTPUT:
+ *      ptr_pkt_len     --  Select max packet length
+ *                          RX_PKT_LEN_1518
+ *                          RX_PKT_LEN_1536
+ *                          RX_PKT_LEN_1552
+ *                          RX_PKT_LEN_MAX_JUMBO
+ *      ptr_frame_len   --  Select max lenght of jumbo frames
+ *                          Range : 2 - 15
+ *                          Units : K Bytes
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getJumbo(
+    const UI32_T unit,
+    UI32_T *ptr_pkt_len,
+    UI32_T *ptr_frame_len);
+
+
+/* FUNCTION NAME: air_port_setPsMode
+ * PURPOSE:
+ *      Set the power saving mode for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      mode            --  Bit-map:
+ *                          AIR_PORT_PS_LINKSTATUS
+ *                          AIR_PORT_PS_EEE
+ *                          FALSE: Disable / TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setPsMode(
+    const UI32_T unit,
+    const UI32_T port,
+    const UI32_T mode);
+
+/* FUNCTION NAME: air_port_getPsMode
+ * PURPOSE:
+ *      Get the power saving mode for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ * OUTPUT:
+ *      ptr_mode        --  Bit-map:
+ *                          AIR_PORT_PS_LINKSTATUS
+ *                          AIR_PORT_PS_EEE
+ *                          FALSE: Disable / TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getPsMode(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_mode);
+
+/* FUNCTION NAME: air_port_setSmtSpdDwn
+ * PURPOSE:
+ *      Set Smart speed down feature for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ *      time            --  AIR_PORT_SSD_2T
+ *                          AIR_PORT_SSD_3T
+ *                          AIR_PORT_SSD_4T
+ *                          AIR_PORT_SSD_5T
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setSmtSpdDwn(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state,
+    const UI32_T time);
+
+/* FUNCTION NAME: air_port_getSmtSpdDwn
+ * PURPOSE:
+ *      Get Smart speed down feature for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ *      ptr_time        --  AIR_PORT_SSD_2T
+ *                          AIR_PORT_SSD_3T
+ *                          AIR_PORT_SSD_4T
+ *                          AIR_PORT_SSD_5T
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getSmtSpdDwn(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_state,
+    UI32_T *ptr_time);
+
+/* FUNCTION NAME: air_port_setEnable
+ * PURPOSE:
+ *      Set powerdown state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state);
+
+/* FUNCTION NAME: air_port_getEnable
+ * PURPOSE:
+ *      Get powerdown state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_state);
+
+/* FUNCTION NAME: air_port_setSpTag
+ * PURPOSE:
+ *      Set special tag state of a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      sptag_en        --  TRUE:  Enable special tag
+ *                          FALSE: Disable special tag
+ * OUTPUT:
+ *        None
+ *
+ * RETURN:
+ *        AIR_E_OK
+ *        AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setSpTag(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T sptag_en);
+
+/* FUNCTION NAME: air_port_getSpTag
+ * PURPOSE:
+ *      Get special tag state of a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ * OUTPUT:
+ *      ptr_sptag_en    --  TRUE:  Special tag enable
+ *                          FALSE: Special tag disable
+ *
+ * RETURN:
+ *        AIR_E_OK
+ *        AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getSpTag(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *ptr_sptag_en);
+
+/* FUNCTION NAME: air_port_set5GBaseRModeEnable
+ * PURPOSE:
+ *      Set the port5 5GBase-R mode enable
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_set5GBaseRModeEn(
+    const UI32_T unit);
+
+/* FUNCTION NAME: air_port_setHsgmiiModeEnable
+ * PURPOSE:
+ *      Set the port5 HSGMII mode enable
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setHsgmiiModeEn(
+    const UI32_T unit);
+
+/* FUNCTION NAME: air_port_setSgmiiMode
+ * PURPOSE:
+ *      Set the port5 SGMII mode for AN or force
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      mode            --  AIR_PORT_SGMII_MODE_AN
+ *                          AIR_PORT_SGMII_MODE_FORCE
+ *      speed           --  AIR_PORT_SPEED_10M:   10Mbps
+ *                          AIR_PORT_SPEED_100M:  100Mbps
+ *                          AIR_PORT_SPEED_1000M: 1Gbps
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setSgmiiMode(
+    const UI32_T unit,
+    const UI32_T mode,
+    const UI32_T speed);
+
+
+/* FUNCTION NAME: air_port_setRmiiMode
+ * PURPOSE:
+ *      Set the port5 RMII mode for 100Mbps or 10Mbps
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      speed           --  AIR_PORT_SPEED_10M:  10Mbps
+ *                          AIR_PORT_SPEED_100M: 100Mbps
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setRmiiMode(
+    const UI32_T unit,
+    const UI32_T speed);
+
+/* FUNCTION NAME: air_port_setRgmiiMode
+ * PURPOSE:
+ *      Set the port5 RGMII mode for 1Gbps or 100Mbps or 10Mbps
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      speed           --  AIR_PORT_SPEED_10M:   10Mbps
+ *                          AIR_PORT_SPEED_100M:  100Mbps
+ *                          AIR_PORT_SPEED_1000M: 1Gbps
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setRgmiiMode(
+    const UI32_T unit,
+    const UI32_T speed);
+
+#endif  /* AIR_PORT_H */
+
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_qos.h b/feed/app/switch/src/an8855_sdk/api/inc/air_qos.h
new file mode 100644
index 0000000..e1eaf3a
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_qos.h
@@ -0,0 +1,590 @@
+/* FILE NAME: air_qos.h
+* PURPOSE:
+ *      Define the Quailty of Service function in AIR SDK.
+*
+* NOTES:
+*       None
+*/
+
+#ifndef AIR_QOS_H
+#define AIR_QOS_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+#define AIR_QOS_MAX_TOKEN               (128)
+#define AIR_QOS_MAX_CIR                 (80001)
+#define AIR_QOS_TOKEN_PERIOD_1_4MS      (5)
+#define AIR_QOS_TOKEN_PERIOD_4MS        (9)
+#define AIR_QOS_L1_RATE_LIMIT           (0x18)
+#define AIR_QOS_L2_RATE_LIMIT           (0x04)
+#define AIR_QOS_QUEUE_PIM_WIDTH         (3)
+#define AIR_QOS_QUEUE_PIM_MASK          (7)
+#define AIR_QOS_QUEUE_DEFAULT_VAL       (0x222227)
+#define AIR_QOS_QUEUE_TRUST_HIGH_WEIGHT (6)
+#define AIR_QOS_QUEUE_TRUST_MID_WEIGHT  (5)
+#define AIR_QOS_QUEUE_TRUST_LOW_WEIGHT  (4)
+#define AIR_QOS_SHAPER_RATE_MAX_EXP     (4)
+#define AIR_QOS_SHAPER_RATE_MAX_MAN     (0x1ffff)
+#define AIR_QOS_SHAPER_RATE_MIN_WEIGHT  (1)
+#define AIR_QOS_SHAPER_RATE_MAX_WEIGHT  (128)
+#define AIR_QOS_QUEUE_0                 (0)
+#define AIR_QOS_QUEUE_1                 (1)
+#define AIR_QOS_QUEUE_2                 (2)
+#define AIR_QOS_QUEUE_3                 (3)
+#define AIR_QOS_QUEUE_4                 (4)
+#define AIR_QOS_QUEUE_5                 (5)
+#define AIR_QOS_QUEUE_6                 (6)
+#define AIR_QOS_QUEUE_7                 (7)
+#define AIR_QOS_MIN_TRAFFIC_ARBITRATION_SCHEME_SP                (1)
+#define AIR_QOS_MIN_TRAFFIC_ARBITRATION_SCHEME_WRR               (0)
+#define AIR_QOS_MAX_TRAFFIC_ARBITRATION_SCHEME_SP                (1)
+#define AIR_QOS_MAX_TRAFFIC_ARBITRATION_SCHEME_WFQ               (0)
+#define AIR_QOS_MAX_EXCESS_SP                                    (1)
+#define AIR_QOS_MAX_EXCESS_DROP                                  (0)
+#define AIR_QOS_QUEUE_MAX_NUM           (8)
+#define AIR_QOS_QUEUE_DSCP_MAX_NUM      (64)
+#define AIR_MAX_NUM_OF_QUEUE            (8) /*need to be replaced by AIR_QOS_QUEUE_MAX_NUM*/
+
+#define AIR_QOS_SHAPER_NOSETTING      (0xffffffff)
+#define AIR_QOS_SHAPER_RATE_MIN_WEIGHT  (1)
+#define AIR_QOS_SHAPER_RATE_MAX_WEIGHT  (128)
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+typedef enum
+{
+    AIR_QOS_SCH_MODE_SP,
+    AIR_QOS_SCH_MODE_WRR,
+    AIR_QOS_SCH_MODE_WFQ,
+    AIR_QOS_SCH_MODE_LAST,
+} AIR_QOS_SCH_MODE_T;
+
+typedef union AIR_QOS_SHAPER_MIN_S
+{
+    struct
+    {
+        UI32_T   min_rate_man      :17;
+        UI32_T   min_reserve       :2;
+        UI32_T   min_rate_en       :1;
+        UI32_T   min_rate_exp      :4;
+        UI32_T   min_weight        :7;
+        UI32_T   min_sp_wrr_q      :1;
+    }raw;
+    UI32_T byte;
+}AIR_QOS_SHAPER_MIN_T;
+
+typedef union AIR_QOS_SHAPER_MAX_S
+{
+    struct
+    {
+        UI32_T   max_rate_man      :17;
+        UI32_T   max_reserve       :1;
+        UI32_T   max_excess_en     :1;
+        UI32_T   max_rate_en       :1;
+        UI32_T   max_rate_exp      :4;
+        UI32_T   max_weight        :7;
+        UI32_T   max_sp_wfq_q      :1;
+    }raw;
+    UI32_T byte;
+}AIR_QOS_SHAPER_MAX_T;
+
+typedef enum
+{
+    /* The packet priority is based on port's priority. */
+    AIR_QOS_TRUST_MODE_PORT,
+
+    /*
+    * The precedence of packet priority is based on 802.1p,
+    * then port's priority.
+    */
+    AIR_QOS_TRUST_MODE_1P_PORT,
+
+    /*
+    * The precedence of packet priority is based on DSCP,
+    * then port's priority.
+    */
+    AIR_QOS_TRUST_MODE_DSCP_PORT,
+
+    /*
+    * The precedence of packet priority is based on DSCP, 802.1p,
+    * then port's priority.
+    */
+    AIR_QOS_TRUST_MODE_DSCP_1P_PORT,
+    AIR_QOS_TRUST_MODE_LAST
+} AIR_QOS_TRUST_MODE_T;
+
+typedef union AIR_QOS_QUEUE_UPW_S
+{
+    struct
+    {
+        UI32_T csr_acl_weight   :3;
+        UI32_T                  :1;
+        UI32_T csr_stag_weight  :3;/*Not use yet*/
+        UI32_T                  :1;
+        UI32_T csr_1p_weight    :3;
+        UI32_T                  :1;
+        UI32_T csr_dscp_weight  :3;
+        UI32_T                  :1;
+        UI32_T csr_port_weight  :3;
+        UI32_T                  :1;
+        UI32_T csr_arl_weight   :3;
+        UI32_T                  :9;
+    }raw;
+    UI32_T byte;
+}AIR_QOS_QUEUE_UPW_T;
+
+typedef union AIR_QOS_QUEUE_PEM_S
+{
+    struct
+    {
+        UI32_T csr_dscp_pri_l     :6;/*Not use yet*/
+        UI32_T csr_que_lan_l      :2;/*Not use yet*/
+        UI32_T csr_que_cpu_l      :3;
+        UI32_T csr_tag_pri_l      :3;/*Not use yet*/
+        UI32_T                    :2;
+        UI32_T csr_dscp_pri_h     :6;/*Not use yet*/
+        UI32_T csr_que_lan_h      :2;/*Not use yet*/
+        UI32_T csr_que_cpu_h      :3;
+        UI32_T csr_tag_pri_h      :3;/*Not use yet*/
+        UI32_T                    :2;
+    }raw;
+    UI32_T byte;
+}AIR_QOS_QUEUE_PEM_T;
+
+typedef enum
+{
+    AIR_QOS_RATE_DIR_INGRESS,
+    AIR_QOS_RATE_DIR_EGRESS,
+    AIR_QOS_RATE_DIR_LAST
+} AIR_QOS_RATE_DIR_T;
+
+typedef struct AIR_RATE_LIMIT_S
+{
+#define AIR_QOS_RATE_LIMIT_CFG_FLAGS_ENABLE_INGRESS     (1U << 0)
+#define AIR_QOS_RATE_LIMIT_CFG_FLAGS_ENABLE_EGRESS      (1U << 1)
+    UI32_T flags;
+
+    /*
+    * The limit cover up to 2.5G
+    * Rate = CIR * 32kbps
+    * Range = 0..80000
+    */
+    UI32_T ingress_cir;
+    UI32_T egress_cir;
+
+    /*
+    * Bucket = Max{(CBS * 512), (CIR * 2500)} Bytes
+    * Range: 0..127
+    */
+    UI32_T ingress_cbs;
+    UI32_T egress_cbs;
+} AIR_QOS_RATE_LIMIT_CFG_T;
+
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+
+/* FUNCTION NAME:   air_qos_setScheduleAlgo
+ * PURPOSE:
+ *      Set schedule mode of a port queue.
+ * INPUT:
+ *      unit                 -- Device unit number
+ *      port                 -- Port id
+ *      queue                -- Queue id
+ *      sch_mode             -- AIR_QOS_SCH_MODE_T
+ *      weight               -- weight for WRR/WFQ
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK             -- Operation success.
+ *      AIR_E_BAD_PARAMETER  -- Parameter is wrong.
+ * NOTES:
+ *      Weight default value is 1, only for WRR/WFQ mode
+ */
+AIR_ERROR_NO_T
+air_qos_setScheduleAlgo(
+    const UI32_T unit,
+    const UI32_T port,
+    const UI32_T                queue,
+    const AIR_QOS_SCH_MODE_T    sch_mode,
+    const UI32_T                weight);
+
+
+/* FUNCTION NAME: air_qos_getScheduleAlgo
+ * PURPOSE:
+ *      Get schedule mode of a port queue.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Port id
+ *      queue           --  Queue id
+ * OUTPUT:
+ *      ptr_sch_mode    --  AIR_QOS_SCH_MODE_T
+ *      ptr_weight      --  weight for WRR/WFQ
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *     None
+ */
+AIR_ERROR_NO_T
+air_qos_getScheduleAlgo(
+    const UI32_T          unit,
+    const UI32_T          port,
+    const UI32_T          queue,
+    AIR_QOS_SCH_MODE_T    *ptr_sch_mode,
+    UI32_T                *ptr_weight);
+
+/* FUNCTION NAME:   air_qos_setTrustMode
+ * PURPOSE:
+ *      Set qos trust mode value.
+ * INPUT:
+ *      unit                 -- Device unit number
+ *      port                  -.Select port number
+ *      mode                 -- Qos support mode
+ *                              AIR_QOS_TRUST_MODE_T
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK             -- Operation success.
+ *      AIR_E_BAD_PARAMETER  -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+
+AIR_ERROR_NO_T
+air_qos_setTrustMode(
+    const UI32_T                    unit,
+    const UI32_T                    port,
+    const AIR_QOS_TRUST_MODE_T      mode);
+
+
+/* FUNCTION NAME: air_qos_getTrustMode
+ * PURPOSE:
+ *      Get qos trust mode value.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port              -.Select port number
+ * OUTPUT:
+ *      ptr_weight      --  All Qos weight value
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getTrustMode(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_QOS_TRUST_MODE_T *const ptr_mode);
+
+/* FUNCTION NAME: air_qos_setPri2Queue
+ * PURPOSE:
+ *      Set per port priority to out queue.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      pri             --  Qos pri value
+ *      queue           --  Qos Queue value
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setPri2Queue(
+    const UI32_T unit,
+    const UI32_T pri,
+    const UI32_T queue);
+
+/* FUNCTION NAME: air_qos_getPri2Queue
+ * PURPOSE:
+ *      Get per port priority to out queue.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      pri             --  Qos pri value
+ *
+ * OUTPUT:
+ *      ptr_queue       --  Select out queue (0..7)
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getPri2Queue(
+    const UI32_T unit,
+    const UI32_T pri,
+    UI32_T *const ptr_queue);
+
+/* FUNCTION NAME: air_qos_setDscp2Pri
+ * PURPOSE:
+ *      Set DSCP mapping to priority.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      dscp            --  Select DSCP value (0..63)
+ *      priority        --  Select priority (0..7)
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setDscp2Pri(
+    const UI32_T unit,
+    const UI32_T dscp,
+    const UI32_T pri);
+
+/* FUNCTION NAME: air_qos_getDscp2Pri
+ * PURPOSE:
+ *      Get DSCP mapping priority.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      dscp            --  Select DSCP value (0..63)
+ *
+ * OUTPUT:
+ *      ptr_pri         --  Priority value (0..7)
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getDscp2Pri(
+    const UI32_T unit,
+    const UI32_T dscp,
+    UI32_T * const ptr_pri);
+
+/* FUNCTION NAME: air_qos_setRateLimitEnable
+ * PURPOSE:
+ *      Enable or disable port rate limit.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number (0..6)
+ *      dir             --  AIR_QOS_RATE_DIR_INGRESS
+ *                          AIR_QOS_RATE_DIR_EGRESS
+ *      rate_en         --  TRUE: eanble rate limit
+ *                          FALSE: disable rate limit
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setRateLimitEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_QOS_RATE_DIR_T dir,
+    const BOOL_T enable);
+
+/* FUNCTION NAME: air_qos_getRateLimitEnable
+ * PURPOSE:
+ *      Get port rate limit state.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number (0..6)
+ *      dir              -- AIR_QOS_RATE_DIR_T
+ * OUTPUT:
+ *      ptr_enable        --  TRUE: eanble rate limit
+ *                          FALSE: disable rate limit
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getRateLimitEnable(
+    const UI32_T                unit,
+    const UI32_T                port,
+    const AIR_QOS_RATE_DIR_T    dir,
+    BOOL_T                      *ptr_enable);
+
+/* FUNCTION NAME: air_qos_setRateLimit
+ * PURPOSE:
+ *      Set per port rate limit.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      ptr_cfg         --  AIR_QOS_RATE_LIMIT_CFG_T
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setRateLimit(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_QOS_RATE_LIMIT_CFG_T    *ptr_cfg);
+
+/* FUNCTION NAME: air_qos_getRateLimit
+ * PURPOSE:
+ *      Get per port rate limit.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *
+ * OUTPUT:
+ *      ptr_cfg          --  AIR_QOS_RATE_LIMIT_CFG_T
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getRateLimit(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_QOS_RATE_LIMIT_CFG_T *ptr_cfg);
+
+/* FUNCTION NAME: air_qos_setPortPriority
+ * PURPOSE:
+ *      Get poer port based priority.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      priority        --  Select port priority
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setPortPriority(
+    const UI32_T unit,
+    const UI32_T port,
+    const UI32_T priority);
+
+/* FUNCTION NAME: air_qos_getPortPriority
+ * PURPOSE:
+ *      Set per port based priority.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *
+ * OUTPUT:
+ *      ptr_pri         --  Get port based priority
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getPortPriority(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_pri);
+
+/* FUNCTION NAME: air_qos_setRateLimitExMngFrm
+ * PURPOSE:
+ *      Set rate limit control exclude/include management frames.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      dir             --  AIR_RATE_DIR_INGRESS
+ *                          AIR_RATE_DIR_EGRESS
+ *      exclude         --  TRUE: Exclude management frame
+ *                          FALSE:Include management frame
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setRateLimitExMngFrm(
+    const UI32_T unit,
+    const AIR_QOS_RATE_DIR_T dir,
+    const BOOL_T exclude);
+
+/* FUNCTION NAME: air_qos_getRateLimitExMngFrm
+ * PURPOSE:
+ *      Get rate limit control exclude/include management frames.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      dir             --  AIR_RATE_DIR_INGRESS
+ *                          AIR_RATE_DIR_EGRESS
+ * OUTPUT:
+ *      ptr_exclude     --  TRUE: Exclude management frame
+ *                          FALSE:Include management frame
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getRateLimitExMngFrm(
+    const UI32_T unit,
+    const AIR_QOS_RATE_DIR_T dir,
+    BOOL_T *ptr_exclude);
+
+#endif /* End of AIR_QOS_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_reg.h b/feed/app/switch/src/an8855_sdk/api/inc/air_reg.h
new file mode 100644
index 0000000..90fb8ac
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_reg.h
@@ -0,0 +1,1233 @@
+/* FILE NAME:   air_reg.h
+* PURPOSE:
+*      Define the chip registers in AIR SDK.
+* NOTES:
+*/
+
+#ifndef AIR_REG_H
+#define AIR_REG_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+#define PORT_CTRL_PORT_OFFSET               (0x200)
+
+/* SYS SCU */
+#define RST_CTRL1                           (0x100050c0)
+#define SYS_SW_RST_OFFT                     (31)
+
+/* ARL Register Base */
+#define REG_ARL_BASE_ADDRESS                (0x10200000)
+
+#define AGC                                 (0x000C)
+/* fields of AGC */
+#define AGC_TICK_SEL                        (0x1 << 30)
+
+#define MFC                                 (REG_ARL_BASE_ADDRESS + 0x0010)
+/* fields of MFC */
+
+
+#define VTCR_ADDR                           (0x0090)
+#define VTCR_VID_OFFT                       (0)
+#define VTCR_VID_LENG                       (12)
+#define VTCR_VID_RELMASK                    (0x00000FFF)
+#define VTCR_VID_MASK                       (VTCR_VID_RELMASK << VTCR_VID_OFFT)
+#define VTCR_FUNC_OFFT                      (12)
+#define VTCR_FUNC_LENG                      (4)
+#define VTCR_FUNC_RELMASK                   (0x0000000F)
+#define VTCR_FUNC_MASK                      (VTCR_FUNC_RELMASK << VTCR_FUNC_OFFT)
+#define VTCR_FUNC_READ_ACL_RULE             (0x4 << VTCR_FUNC_OFFT)
+#define VTCR_FUNC_WRITE_ACL_RULE            (0x5 << VTCR_FUNC_OFFT)
+#define VTCR_FUNC_READ_TRTCM                (0x6 << VTCR_FUNC_OFFT)
+#define VTCR_FUNC_WRITE_TRTCM               (0x7 << VTCR_FUNC_OFFT)
+#define VTCR_FUNC_READ_ACL_MASK             (0x8 << VTCR_FUNC_OFFT)
+#define VTCR_FUNC_WRITE_ACL_MASK            (0x9 << VTCR_FUNC_OFFT)
+#define VTCR_FUNC_READ_ACL_RULE_CTRL        (0xA << VTCR_FUNC_OFFT)
+#define VTCR_FUNC_WRITE_ACL_RULE_CTRL       (0xB << VTCR_FUNC_OFFT)
+#define VTCR_FUNC_READ_ACL_RATE_CTRL        (0xC << VTCR_FUNC_OFFT)
+#define VTCR_FUNC_WRITE_ACL_RATE_CTRL       (0xD << VTCR_FUNC_OFFT)
+#define VTCR_IDX_INVLD_OFFT                 (16)
+#define VTCR_IDX_INVLD_RELMASK              (0x00000001)
+#define VTCR_IDX_INVLD_MASK                 (VTCR_IDX_INVLD_RELMASK << VTCR_IDX_INVLD_OFFT)
+#define VTCR_BUSY_OFFT                      (31)
+#define VTCR_BUSY_LENG                      (1)
+#define VTCR_BUSY_RELMASK                   (0x00000001)
+#define VTCR_BUSY_MASK                      (VTCR_BUSY_RELMASK << VTCR_BUSY_OFFT)
+
+#define PIM_DSCP(d)                         (0x0058 + (4 * (d / 10)))
+
+#define UNUF                                (0x102000B4)
+#define UNMF                                (0x102000B8)
+#define BCF                                 (0x102000BC)
+#define QRYP                                (0x102000D8)
+
+#define VAWD1_ADDR                          (0x0094)
+#define VAWD2_ADDR                          (0x0098)
+#define VAWD3_ADDR                          (0x00E0)
+#define VAWD4_ADDR                          (0x00E4)
+#define VAWD5_ADDR                          (0x00E8)
+#define VAWD6_ADDR                          (0x00EC)
+#define VAWD7_ADDR                          (0x00F0)
+#define VAWD8_ADDR                          (0x00F4)
+#define VAWD_ADDR(n)                        ((n<2)?(VAWD1_ADDR+(0x4*n)):(VAWD3_ADDR+(0x4*(n-2))))
+
+#define SCH_CTRL_BASE                       (0x1000)
+#define SCH_CTRL_PORT_OFFSET                (0x100)
+#define MMSCR(p)                            (SCH_CTRL_BASE + (p * SCH_CTRL_PORT_OFFSET) + 0x90)
+#define MMSCR0(p, q)                        (SCH_CTRL_BASE + (p * SCH_CTRL_PORT_OFFSET) + (8 * q))
+#define MMSCR1(p, q)                        (SCH_CTRL_BASE + (p * SCH_CTRL_PORT_OFFSET) + (8 * q) + 0x04)
+#define MMSCR2(p, q)                        (SCH_CTRL_BASE + (p * SCH_CTRL_PORT_OFFSET) + (8 * q) + 0x50)
+#define MMSCR3(p, q)                        (SCH_CTRL_BASE + (p * SCH_CTRL_PORT_OFFSET) + (8 * q) + 0x54)
+
+/* fields of GERLCR */
+#define EGC_MFRM_EX_OFFSET                  (9)
+#define EGC_MFRM_EX_LENGTH                  (1)
+
+#define BMU_CTRL_BASE                       (0x1800)
+#define BMU_CTRL_PORT_OFFSET                (0x100)
+
+/* fields of MMDPR */
+#define MMDPR_BASE                          (BMU_CTRL_BASE + 0xC)
+#define MMDPR_PORT_OFFSET                   (0x100)
+#define MMDPR_COLOR_OFFSET                  (0x20)
+#define MMDPR_QUEUE_OFFSET                  (0x4)
+#define MMDPR(p,c,q)                        (MMDPR_BASE + (p * MMDPR_PORT_OFFSET) + (c * MMDPR_COLOR_OFFSET) + (q * MMDPR_QUEUE_OFFSET))
+#define MMDPR_EN                            (1 << 31)
+#define MMDPR_PR_OFFSET                     (24)
+#define MMDPR_PR_LENGTH                     (3)
+#define MMDPR_HT_OFFSET                     (12)
+#define MMDPR_HT_LENGTH                     (9)
+#define MMDPR_LT_OFFSET                     (0)
+#define MMDPR_LT_LENGTH                     (9)
+
+/* fields of GIRLCR */
+#define IGC_MFRM_EX_OFFSET                  (9)
+#define IGC_MFRM_EX_LENGTH                  (1)
+
+#define PORT_CTRL_BASE                      (0x10208000)
+#define PORT_CTRL_REG(p, r)                 (PORT_CTRL_BASE + (p) * PORT_CTRL_PORT_OFFSET + (r))
+
+#define PORTMATRIX(p)                       PORT_CTRL_REG(p, 0x44)
+
+#define PCR(p)                              PORT_CTRL_REG(p, 0x04)
+#define PCR_PORT_VLAN_OFFT                  (0)
+#define PCR_PORT_VLAN_LENG                  (2)
+#define PCR_PORT_VLAN_RELMASK               (0x00000003)
+#define PCR_PORT_VLAN_MASK                  (PCR_PORT_VLAN_RELMASK << PCR_PORT_VLAN_OFFT)
+#define PCR_PORT_RX_MIR_OFFT                (16)
+#define PCR_PORT_RX_MIR_LENG                (2)
+#define PCR_PORT_TX_MIR_OFFT                (20)
+#define PCR_PORT_TX_MIR_LENG                (2)
+#define PCR_PORT_PRI_OFFT                   (24)
+#define PCR_PORT_PRI_LENG                   (3)
+#define PCR_PORT_PRI_RELMASK                (0x00000007)
+#define PCR_PORT_PRI_MASK                   (PCR_PORT_PRI_RELMASK << PCR_PORT_PRI_OFFT)
+#define PCR_PORT_ACL_MIS_FWD_OFFT           (4)
+#define PCR_PORT_ACL_MIS_FWD_LENG           (3)
+#define PCR_PORT_ACL_MIS_FWD_RELMASK        (0x00000007)
+#define PCR_PORT_ACL_MIS_FWD_MASK           (PCR_PORT_ACL_MIS_FWD_RELMASK << PCR_PORT_ACL_MIS_FWD_OFFT)
+#define PCR_EG_TAG_OFFT                     (28)
+#define PCR_EG_TAG_LENG                     (2)
+#define PCR_EG_TAG_RELMASK                  (0x00000003)
+#define PCR_EG_TAG_MASK                     (PCR_EG_TAG_RELMASK << PCR_EG_TAG_OFFT)
+#define PCR_RMK_DSCP_EN                     (0x1000)
+#define PCR_RMK_1Q_EN                       (0x0800)
+
+#define PVC(p)                              PORT_CTRL_REG(p, 0x10)
+#define PVC_ACC_FRM_OFFT                    (0)
+#define PVC_ACC_FRM_LENG                    (2)
+#define PVC_ACC_FRM_RELMASK                 (0x00000003)
+#define PVC_ACC_FRM_MASK                    (PVC_ACC_FRM_RELMASK << PVC_ACC_FRM_OFFT)
+#define PVC_UC_LKYV_EN_OFFT                 (2)
+#define PVC_UC_LKYV_EN_LENG                 (1)
+#define PVC_UC_LKYV_EN_RELMASK              (0x00000001)
+#define PVC_UC_LKYV_EN_MASK                 (PVC_UC_LKYV_EN_RELMASK << PVC_UC_LKYV_EN_OFFT)
+#define PVC_MC_LKYV_EN_OFFT                 (3)
+#define PVC_MC_LKYV_EN_LENG                 (1)
+#define PVC_MC_LKYV_EN_RELMASK              (0x00000001)
+#define PVC_MC_LKYV_EN_MASK                 (PVC_MC_LKYV_EN_RELMASK << PVC_MC_LKYV_EN_OFFT)
+#define PVC_BC_LKYV_EN_OFFT                 (4)
+#define PVC_BC_LKYV_EN_LENG                 (1)
+#define PVC_BC_LKYV_EN_RELMASK              (0x00000001)
+#define PVC_BC_LKYV_EN_MASK                 (PVC_BC_LKYV_EN_RELMASK << PVC_BC_LKYV_EN_OFFT)
+#define PVC_SPTAG_EN_OFFT                   (5)
+#define PVC_SPTAG_EN_LENG                   (1)
+#define PVC_SPTAG_EN_RELMASK                (0x00000001)
+#define PVC_SPTAG_EN_MASK                   (PVC_SPTAG_EN_RELMASK << PVC_SPTAG_EN_OFFT)
+#define PVC_VLAN_ATTR_OFFT                  (6)
+#define PVC_VLAN_ATTR_LENG                  (2)
+#define PVC_VLAN_ATTR_RELMASK               (0x00000003)
+#define PVC_VLAN_ATTR_MASK                  (PVC_VLAN_ATTR_RELMASK << PVC_VLAN_ATTR_OFFT)
+#define PVC_EG_TAG_OFFT                     (8)
+#define PVC_EG_TAG_LENG                     (3)
+#define PVC_EG_TAG_RELMASK                  (0x00000007)
+#define PVC_EG_TAG_MASK                     (PVC_EG_TAG_RELMASK << PVC_EG_TAG_OFFT)
+#define PVC_SPTAG_MODE_OFFT                 (11)
+#define PVC_SPTAG_MODE_LENG                 (1)
+#define PVC_STAG_VPID_OFFT                  (16)
+#define PVC_STAG_VPID_LENG                  (16)
+#define PVC_STAG_VPID_RELMASK               (0x0000FFFF)
+#define PVC_STAG_VPID_MASK                  (PVC_STAG_VPID_RELMASK << PVC_STAG_VPID_OFFT)
+
+#define PPBV1(p)                            PORT_CTRL_REG(p, 0x14)
+#define PPBV1_G0_PORT_VID_OFFT              (0)
+#define PPBV1_G0_PORT_VID_LENG              (12)
+#define PPBV1_G0_PORT_VID_RELMASK           (0x00000FFF)
+#define PPBV1_G0_PORT_VID_MASK              (PPBV1_G0_PORT_VID_RELMASK << PPBV1_G0_PORT_VID_OFFT)
+
+#define PVID(p)                             PORT_CTRL_REG(p, 0x48)
+#define PVID_PCVID_OFFT                     (0)
+#define PVID_PCVID_LENG                     (12)
+#define PVID_PCVID_RELMASK                  (0x00000FFF)
+#define PVID_PCVID_MASK                     (PVID_PCVID_RELMASK << PVID_PCVID_OFFT)
+
+#define BSR(p)                              PORT_CTRL_REG(p, 0x50)
+#define BSR1(p)                             PORT_CTRL_REG(p, 0x54)
+#define BSR_EXT1(p)                         PORT_CTRL_REG(p, 0x58)
+#define BSR1_EXT1(p)                        PORT_CTRL_REG(p, 0x5C)
+#define BSR_EXT2(p)                         PORT_CTRL_REG(p, 0x60)
+#define BSR1_EXT2(p)                        PORT_CTRL_REG(p, 0x64)
+#define BSR_EXT3(p)                         PORT_CTRL_REG(p, 0x68)
+#define BSR1_EXT3(p)                        PORT_CTRL_REG(p, 0x6C)
+#define BSR_STORM_COUNT_MSK                 (0xFF)
+#define BSR_STORM_UNIT_MSK                  (7)
+#define BSR_STORM_UNIT_OFFT                 (8)
+#define BSR_STORM_RATE_BASED                (0x1)
+#define BSR_STORM_DROP_EN                   (0x10)
+#define BSR_STORM_BCST_EN                   (0x2)
+#define BSR_STORM_MCST_EN                   (0x4)
+#define BSR_STORM_UCST_EN                   (0x8)
+#define BSR1_10M_COUNT_OFFT                 (0)
+#define BSR1_100M_COUNT_OFFT                (8)
+#define BSR1_1000M_COUNT_OFFT               (16)
+#define BSR1_2500M_COUNT_OFFT               (24)
+
+#define PEM(p, q)                           (PORT_CTRL_REG(p, (0x44 + (4 * (q/2)))))
+
+#define PORT_MAC_CTRL_BASE                  (0x10210000)
+#define PORT_MAC_CTRL_PORT_OFFSET           (0x200)
+#define PORT_MAC_CTRL_REG(p, r)             (PORT_MAC_CTRL_BASE + (p) * PORT_MAC_CTRL_PORT_OFFSET + (r))
+
+#define PMCR(p)                             PORT_MAC_CTRL_REG(p, 0x00)
+
+#define ARL_CTRL_BASE                       (0x0000)
+#define CFC                                 (0x0004)
+/* fields of CFC */
+#define CFC_MIRROR_EN_OFFSET                (19)
+#define CFC_MIRROR_EN_LEN                   (1)
+#define CFC_MIRROR_PORT_OFFSET              (16)
+#define CFC_MIRROR_PORT_LEN                 (3)
+#define MFC_CPU_PORT_OFFSET                 (8)
+#define MFC_CPU_PORT_LENGTH                 (5)
+#define MFC_CPU_EN_OFFSET                   (15)
+#define MFC_CPU_EN_LENGTH                   (1)
+
+
+#define ISC                                 (0x0018)
+#define TSRA1                               (0x0084)
+#define TSRA2                               (0x0088)
+#define ATRD                                (0x008C)
+#define CPGC                                (0x00B0)
+
+#define PSC(p)                              PORT_CTRL_REG(p, 0xC)
+#define PSC_DIS_LRN_OFFSET                  (4)
+#define PSC_DIS_LRN_LENGTH                  (1)
+#define PSC_SA_CNT_EN_OFFSET                (5)
+#define PSC_SA_CNT_EN_LENGTH                (1)
+#define PSC_SA_CNT_LMT_OFFSET               (8)
+#define PSC_SA_CNT_LMT_LENGTH               (12)
+#define PSC_SA_CNT_LMT_REALMASK             (0x00000FFF)
+#define PSC_SA_CNT_LMT_MASK                 (PSC_SA_CNT_LMT_REALMASK << PSC_SA_CNT_LMT_OFFSET)
+#define PSC_SA_CNT_LMT_MAX                  (0x800)
+
+/* fields of CPGC */
+#define COL_EN                              (0x01)
+#define COL_CLK_EN                          (0x02)
+
+#define CKGCR                               (0x10213E1C)
+#define CKG_LNKDN_GLB_STOP                  (0x01)
+#define CKG_LNKDN_PORT_STOP                 (0x02)
+
+/* fields of TRTCM*/
+#define TRTCM                               (ARL_CTRL_BASE + 0x009C)
+#define TRTCM_EN                            (1 << 31)
+
+#define ARL_TRUNK_BASE                      (0x10200000)
+#define PTC                                 (ARL_TRUNK_BASE + 0x400)
+#define PTSEED                              (ARL_TRUNK_BASE + 0x404)
+#define PTGC                                (ARL_TRUNK_BASE + 0x408)
+#define PTG(g)                              (ARL_TRUNK_BASE + 0x40C + ((g) * 0x8 ))
+#define PTGRSTS                             (ARL_TRUNK_BASE + 0x44C)
+
+#define MIR                                 (REG_ARL_BASE_ADDRESS + (0xCC))
+/* fields of MIR */
+#define MIR_MIRROR_BASE_OFFSER              (8)
+#define MIR_MIRROR_EN_OFFSER(p)             ((p) * MIR_MIRROR_BASE_OFFSER + 0x07)
+#define MIR_MIRROR_EN_LEN                   (1)
+#define MIR_MIRROR_PORT_OFFSER(p)           ((p) * MIR_MIRROR_BASE_OFFSER + 0x00)
+#define MIR_MIRROR_PORT_LEN                 (5)
+#define MIR_MIRROR_TAG_TX_EN_OFFSER(p)      ((p) * MIR_MIRROR_BASE_OFFSER + 0x06)
+#define MIR_MIRROR_TAG_TX_EN_LEN            (1)
+
+/* fields of ATA1 */
+#define ATA1                                (REG_ARL_BASE_ADDRESS + 0x0304)
+#define ATA1_MAC_ADDR_MSB_OFFSET            (0)
+#define ATA1_MAC_ADDR_MSB_LENGTH            (32)
+//#define ATA1_SAT_ADDR_OFFSET                (0)
+//#define ATA1_SAT_ADDR_LENGTH                (11)
+//#define ATA1_SAT_BANK_OFFSET                (16)
+//#define ATA1_SAT_BANK_LENGTH                (4)
+
+/* fields of ATA2 */
+#define ATA2                                (REG_ARL_BASE_ADDRESS + 0x0308)
+#define ATA2_MAC_AGETIME_OFFSET             (0)
+#define ATA2_MAC_AGETIME_LENGTH             (9)
+#define ATA2_MAC_LIFETIME_OFFSET            (9)
+#define ATA2_MAC_LIFETIME_LENGTH            (1)
+#define ATA2_MAC_UNAUTH_OFFSET              (10)
+#define ATA2_MAC_UNAUTH_LENGTH              (1)
+#define ATA2_MAC_ADDR_LSB_OFFSET            (16)
+#define ATA2_MAC_ADDR_LSB_LENGTH            (16)
+
+/* fields of ATWD */
+#define ATWD                                (REG_ARL_BASE_ADDRESS + 0x0324)
+#define ATWD_MAC_LIVE_OFFSET                (0)
+#define ATWD_MAC_LIVE_LENGTH                (1)
+#define ATWD_MAC_LEAK_OFFSET                (1)
+#define ATWD_MAC_LEAK_LENGTH                (1)
+#define ATWD_MAC_UPRI_OFFSET                (2)
+#define ATWD_MAC_UPRI_LENGTH                (3)
+#define ATWD_MAC_FWD_OFFSET                 (5)
+#define ATWD_MAC_FWD_LENGTH                 (3)
+#define ATWD_MAC_MIR_OFFSET                 (8)
+#define ATWD_MAC_MIR_LENGTH                 (2)
+#define ATWD_MAC_ETAG_OFFSET                (12)
+#define ATWD_MAC_ETAG_LENGTH                (3)
+#define ATWD_MAC_IVL_OFFSET                 (15)
+#define ATWD_MAC_IVL_LENGTH                 (1)
+#define ATWD_MAC_VID_OFFSET                 (16)
+#define ATWD_MAC_VID_LENGTH                 (12)
+#define ATWD_MAC_FID_OFFSET                 (28)
+#define ATWD_MAC_FID_LENGTH                 (4)
+
+/* fields of ATWD2 */
+#define ATWD2                               (REG_ARL_BASE_ADDRESS + 0x0328)
+#define ATWD2_MAC_PORT_OFFSET               (0)
+#define ATWD2_MAC_PORT_LENGTH               (8)
+
+/* fields of ATC */
+#define ATC                                 (REG_ARL_BASE_ADDRESS + 0x0300)
+#define ATC_MAC_OFFSET                      (0)
+#define ATC_MAC_LENGTH                      (3)
+#define ATC_SAT_OFFSET                      (4)
+#define ATC_SAT_LENGTH                      (2)
+#define ATC_MAT_OFFSET                      (7)
+#define ATC_MAT_LENGTH                      (5)
+#define ATC_ENTRY_HIT_OFFSET                (12)
+#define ATC_ENTRY_HIT_LENGTH                (4)
+#define ATC_ADDR_OFFSET                     (16)
+#define ATC_ADDR_LENGTH                     (9)
+#define ATC_SINGLE_HIT_OFFSET               (30)
+#define ATC_SINGLE_HIT_LENGTH               (1)
+#define ATC_BUSY_OFFSET                     (31)
+#define ATC_BUSY_LENGTH                     (1)
+
+typedef enum {
+    _ATC_CMD_READ = 0,
+    _ATC_CMD_WRITE,
+    _ATC_CMD_CLEAN,
+    _ATC_CMD_SEARCH = 4,
+    _ATC_CMD_SEARCH_NEXT,
+    _ATC_CMD_LAST
+}_ATC_CMD_T;
+
+#define ATC_CMD_READ                        (_ATC_CMD_READ << ATC_MAC_OFFSET)
+#define ATC_CMD_WRITE                       (_ATC_CMD_WRITE << ATC_MAC_OFFSET)
+#define ATC_CMD_CLEAN                       (_ATC_CMD_CLEAN << ATC_MAC_OFFSET)
+#define ATC_CMD_SEARCH                      (_ATC_CMD_SEARCH << ATC_MAC_OFFSET)
+#define ATC_CMD_SEARCH_NEXT                 (_ATC_CMD_SEARCH_NEXT << ATC_MAC_OFFSET)
+
+typedef enum {
+    _ATC_SAT_MAC = 0,
+    _ATC_SAT_DIP,
+    _ATC_SAT_SIP,
+    _ATC_SAT_ADDR,
+    _ATC_SAT_LAST
+}_ATC_SAT_T;
+
+#define ATC_SAT_MAC                         (_ATC_SAT_MAC << ATC_SAT_OFFSET)
+#define ATC_SAT_DIP                         (_ATC_SAT_DIP << ATC_SAT_OFFSET)
+#define ATC_SAT_SIP                         (_ATC_SAT_SIP << ATC_SAT_OFFSET)
+#define ATC_SAT_ADDR                        (_ATC_SAT_ADDR << ATC_SAT_OFFSET)
+
+typedef enum {
+    _ATC_MAT_ALL = 0,
+    _ATC_MAT_MAC,
+    _ATC_MAT_DYNAMIC_MAC,
+    _ATC_MAT_STATIC_MAC,
+    _ATC_MAT_DIP,
+    _ATC_MAT_DIPV4,
+    _ATC_MAT_DIPV6,
+    _ATC_MAT_SIP,
+    _ATC_MAT_SIPV4,
+    _ATC_MAT_SIPV6,
+    _ATC_MAT_MAC_BY_VID,
+    _ATC_MAT_MAC_BY_FID,
+    _ATC_MAT_MAC_BY_PORT,
+    _ATC_MAT_SIP_BY_DIPV4,
+    _ATC_MAT_SIP_BY_SIPV4,
+    _ATC_MAT_SIP_BY_DIPV6,
+    _ATC_MAT_SIP_BY_SIPV6,
+    _ATC_MAT_LAST
+}_ATC_MAT_T;
+
+#define ATC_MAT_ALL                         (_ATC_MAT_ALL << ATC_MAT_OFFSET)
+#define ATC_MAT_MAC                         (_ATC_MAT_MAC << ATC_MAT_OFFSET)
+#define ATC_MAT_DYNAMIC_MAC                 (_ATC_MAT_DYNAMIC_MAC << ATC_MAT_OFFSET)
+#define ATC_MAT_STATIC_MAC                  (_ATC_MAT_STATIC_MAC << ATC_MAT_OFFSET)
+#define ATC_MAT_DIP                         (_ATC_MAT_DIP << ATC_MAT_OFFSET)
+#define ATC_MAT_DIPV4                       (_ATC_MAT_DIPV4 << ATC_MAT_OFFSET)
+#define ATC_MAT_DIPV6                       (_ATC_MAT_DIPV6 << ATC_MAT_OFFSET)
+#define ATC_MAT_SIP                         (_ATC_MAT_SIP << ATC_MAT_OFFSET)
+#define ATC_MAT_SIPV4                       (_ATC_MAT_SIPV4 << ATC_MAT_OFFSET)
+#define ATC_MAT_SIPV6                       (_ATC_MAT_SIPV6 << ATC_MAT_OFFSET)
+#define ATC_MAT_MAC_BY_VID                  (_ATC_MAT_MAC_BY_VID << ATC_MAT_OFFSET)
+#define ATC_MAT_MAC_BY_FID                  (_ATC_MAT_MAC_BY_FID << ATC_MAT_OFFSET)
+#define ATC_MAT_MAC_BY_PORT                 (_ATC_MAT_MAC_BY_PORT << ATC_MAT_OFFSET)
+#define ATC_MAT_SIP_BY_DIPV4                (_ATC_MAT_SIP_BY_DIPV4 << ATC_MAT_OFFSET)
+#define ATC_MAT_SIP_BY_SIPV4                (_ATC_MAT_SIP_BY_SIPV4 << ATC_MAT_OFFSET)
+#define ATC_MAT_SIP_BY_DIPV6                (_ATC_MAT_SIP_BY_DIPV6 << ATC_MAT_OFFSET)
+#define ATC_MAT_SIP_BY_SIPV6                (_ATC_MAT_SIP_BY_SIPV6 << ATC_MAT_OFFSET)
+
+#define ATC_START_BUSY                      (0x01 << ATC_BUSY_OFFSET)
+
+/* fields of AAC*/
+#define AAC                                 (REG_ARL_BASE_ADDRESS + 0x00A0)
+#define AAC_AGE_UNIT_OFFSET                 (0)
+#define AAC_AGE_UNIT_LENGTH                 (11)
+#define AAC_AGE_CNT_OFFSET                  (12)
+#define AAC_AGE_CNT_LENGTH                  (9)
+#define AAC_AUTO_FLUSH_OFFSET               (28)
+#define AAC_AUTO_FLUSH_LENGTH               (1)
+
+#define AGDIS                               (REG_ARL_BASE_ADDRESS + 0x00C0)
+
+/* fields of ATWDS */
+#define ATRDS                               (REG_ARL_BASE_ADDRESS + 0x0330)
+#define ATRD0_MAC_SEL_OFFSET                (0)
+#define ATRD0_MAC_SEL_LENGTH                (2)
+
+/* fields of ATRD0 */
+#define ATRD0                               (REG_ARL_BASE_ADDRESS + 0x0334)
+//need to verify 32'b 0
+#define ATRD0_MAC_LIVE_OFFSET               (0)
+#define ATRD0_MAC_LIVE_LENGTH               (1)
+#define ATRD0_MAC_LIFETIME_OFFSET           (1)
+#define ATRD0_MAC_LIFETIME_LENGTH           (2)
+#define ATRD0_MAC_TYPE_OFFSET               (3)
+#define ATRD0_MAC_TYPE_LENGTH               (2)
+#define ATRD0_MAC_LEAK_OFFSET               (5)
+#define ATRD0_MAC_LEAK_LENGTH               (1)
+#define ATRD0_MAC_UPRI_OFFSET               (6)
+#define ATRD0_MAC_UPRI_LENGTH               (3)
+#define ATRD0_MAC_IVL_OFFSET                (9)
+#define ATRD0_MAC_IVL_LENGTH                (1)
+#define ATRD0_MAC_VID_OFFSET                (10)
+#define ATRD0_MAC_VID_LENGTH                (12)
+#define ATRD0_MAC_ETAG_OFFSET               (22)
+#define ATRD0_MAC_ETAG_LENGTH               (3)
+#define ATRD0_MAC_FID_OFFSET                (25)
+#define ATRD0_MAC_FID_LENGTH                (4)
+#define ATRD1_MAC_UNAUTH_OFFSET             (31)
+#define ATRD1_MAC_UNAUTH_LENGTH             (1)
+
+/* fields of ATRD1 */
+#define ATRD1                               (REG_ARL_BASE_ADDRESS + 0x0338)
+//need to verify 32'b 0
+#define ATRD1_MAC_FWD_OFFSET                (0)
+#define ATRD1_MAC_FWD_LENGTH                (3)
+#define ATRD1_MAC_AGETIME_OFFSET            (3)
+#define ATRD1_MAC_AGETIME_LENGTH            (9)
+#define ATRD1_MAC_MIR_OFFSET                (12)
+#define ATRD1_MAC_MIR_LENGTH                (4)
+#define ATRD1_MAC_ADDR_LSB_OFFSET           (16)
+#define ATRD1_MAC_ADDR_LSB_LENGTH           (16)
+
+/* fields of ATRD2 */
+#define ATRD2                               (REG_ARL_BASE_ADDRESS + 0x033C)
+#define ATRD2_MAC_ADDR_MSB_OFFSET           (0)
+#define ATRD2_MAC_ADDR_MSB_LENGTH           (32)
+
+/* fields of ATRD3 */
+#define ATRD3                               (REG_ARL_BASE_ADDRESS + 0x0340)
+//need to verify 32'b 0
+#define ATRD3_MAC_PORT_OFFSET               (0)
+#define ATRD3_MAC_PORT_LENGTH               (8)
+
+#define REG_SCH_PORT_ADDRESS           (REG_ARL_BASE_ADDRESS + 0xc000)
+#define MMSCR0_Q0(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p))
+#define MMSCR1_Q0(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x4)
+#define MMSCR0_Q1(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x8)
+#define MMSCR1_Q1(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0xc)
+#define MMSCR0_Q2(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x10)
+#define MMSCR1_Q2(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x14)
+#define MMSCR0_Q3(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x18)
+#define MMSCR1_Q3(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x1c)
+#define MMSCR0_Q4(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x20)
+#define MMSCR1_Q4(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x24)
+#define MMSCR0_Q5(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x28)
+#define MMSCR1_Q5(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x2c)
+#define MMSCR0_Q6(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x30)
+#define MMSCR1_Q6(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x34)
+#define MMSCR0_Q7(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x38)
+#define MMSCR1_Q7(p)                   (REG_SCH_PORT_ADDRESS + PORT_CTRL_PORT_OFFSET * (p) + 0x3c)
+
+#define PUPW(p)                             PORT_CTRL_REG(p, 0x30)
+
+#define PEM1                                (REG_ARL_BASE_ADDRESS + 0x0048)
+#define PEM2                                (REG_ARL_BASE_ADDRESS + 0x004c)
+#define PEM3                                (REG_ARL_BASE_ADDRESS + 0x0050)
+#define PEM4                                (REG_ARL_BASE_ADDRESS + 0x0054)
+
+#define PIM1                                (REG_ARL_BASE_ADDRESS + 0x0058)
+#define PIM2                                (REG_ARL_BASE_ADDRESS + 0x005c)
+#define PIM3                                (REG_ARL_BASE_ADDRESS + 0x0060)
+#define PIM4                                (REG_ARL_BASE_ADDRESS + 0x0064)
+#define PIM5                                (REG_ARL_BASE_ADDRESS + 0x0068)
+#define PIM6                                (REG_ARL_BASE_ADDRESS + 0x006c)
+#define PIM7                                (REG_ARL_BASE_ADDRESS + 0x0070)
+
+/* fields of ingress and egress rate control */
+#define IRLCR(p)                            (REG_ARL_BASE_ADDRESS + (p * PORT_CTRL_PORT_OFFSET) + 0x4000)
+#define ERLCR(p)                            (REG_ARL_BASE_ADDRESS + (p * PORT_CTRL_PORT_OFFSET) + 0xC040)
+#define REG_RATE_CIR_OFFT                   (0)
+#define REG_RATE_CIR_LENG                   (17)
+#define REG_TB_EN_OFFT                      (19)
+#define REG_RATE_TB_OFFT                    (20)
+#define REG_RATE_TB_LENG                    (4)
+#define REG_RATE_CBS_OFFT                   (24)
+#define REG_RATE_CBS_LENG                   (7)
+#define REG_RATE_EN_OFFT                    (31)
+
+/* fields of global ingress and egress rate control */
+#define GIRLCR                              (REG_ARL_BASE_ADDRESS + 0x7E24)
+#define GERLCR                              (REG_ARL_BASE_ADDRESS + 0xFE00)
+#define REG_IPG_BYTE_OFFT                   (0)
+#define REG_IPG_BYTE_LENG                   (8)
+#define REG_MFRM_EX_OFFT                    (9)
+#define REG_MFRM_EX_LENG                    (1)
+#define SFLOW_MFRM_EX_OFFT                  (25)
+#define SFLOW_MFRM_EX_LENG                  (1)
+#define L1_RATE_IPG_BYTE_CNT                (0x18)
+#define L2_RATE_IPG_BYTE_CNT                (0x04)
+
+
+/* fields of PTC */
+#define PTC_INFO_SEL_SP                     (1 << 0)
+#define PTC_INFO_SEL_SA                     (1 << 1)
+#define PTC_INFO_SEL_DA                     (1 << 2)
+#define PTC_INFO_SEL_SIP                    (1 << 3)
+#define PTC_INFO_SEL_DIP                    (1 << 4)
+#define PTC_INFO_SEL_SPORT                  (1 << 5)
+#define PTC_INFO_SEL_DPORT                  (1 << 6)
+
+#define SSC(p)                              PORT_CTRL_REG(p, 0x00)
+#define PIC(p)                              PORT_CTRL_REG(p, 0x08)
+
+/* fields of IGMP SNOOPING */
+#define IGMP_HW_GQUERY                      1
+#define IGMP_HW_SQUERY                      (1 << 2)
+#define IGMP_HW_JOIN                        (1 << 4)
+#define IGMPV3_HW_JOIN                      (1 << 6)
+#define DMAC_01005E                         (1 << 8)
+#define DMAC_3333XX                         (1 << 9)
+#define MCAST_DIP                           (1 << 10)
+#define IGMP_HW_LEAVE                       (1 << 12)
+#define IGMP_AUTO_DOWNGRADE                 (1 << 20)
+#define IGMP_AUTO_ROUTER                    (1 << 18)
+#define IGMP_ROBUSTNESS_OFFSET              16
+#define IGMP_QUERYINTERVAL_OFFSET           8
+
+/* fields of MLD SNOOPING */
+#define MLD_HW_GQUERY                       (1 << 1)
+#define MLD_HW_SQUERY                       (1 << 3)
+#define MLD_HW_JOIN                         (1 << 5)
+#define MLDV2_HW_JOIN                       (1 << 7)
+#define MLD_HW_LEAVE                        (1 << 13)
+#define MLD_AUTO_ROUTER                     (1 << 19)
+
+#define PMSR(p)                             PORT_MAC_CTRL_REG(p, 0x10)
+
+/* fields of loop detect */
+#define LPDET_CTRL                          0x30C0
+#define LPDET_OFFSET                        24
+#define LPDET_TRIGGER_OFFSET                23
+#define LPDET_TRIGGER_PERIODICAL            1
+#define LPDET_TRIGGER_BROADCAST             0
+
+/* Port debug count register */
+#define DBG_CNT_BASE                        0x3018
+#define DBG_CNT_PORT_BASE                   0x100
+#define DBG_CNT(p)                          (DBG_CNT_BASE + (p) * DBG_CNT_PORT_BASE)
+#define DIS_CLR                             (1 << 31)
+
+#define PFC_STS(p)                          PORT_MAC_CTRL_REG(p, 0x24)
+#define PFC_CTRL                            (PORT_MAC_CTRL_BASE + 0xB0)
+#define PFC_EN(p)                           (1 << p)
+#define PFC_SYN_EN(p)                       (0x80 << p)
+
+#define GMACCR                              (PORT_MAC_CTRL_BASE + 0x3e00)
+#define MTCC_LMT_S                          8
+#define MAX_RX_JUMBO_S                      4
+
+/* Values of MAX_RX_PKT_LEN */
+#define RX_PKT_LEN_1518                     (0)
+#define RX_PKT_LEN_1536                     (1)
+#define RX_PKT_LEN_1522                     (2)
+#define RX_PKT_LEN_MAX_JUMBO                (3)
+
+/* Fields of PMCR */
+#define FORCE_MODE                          (1 << 31)
+#define IPG_CFG_S                           (20)
+#define IPG_CFG_M                           (0x300000)
+#define EXT_PHY                             (1 << 19)
+#define MAC_MODE                            (1 << 18)
+#define MAC_TX_EN                           (1 << 16)
+#define MAC_RX_EN                           (1 << 15)
+#define MAC_PRE                             (1 << 14)
+#define BKOFF_EN                            (1 << 12)
+#define BACKPR_EN                           (1 << 11)
+#define FORCE_EEE1G                         (1 << 7)
+#define FORCE_EEE100                        (1 << 6)
+#define FORCE_RX_FC                         (1 << 5)
+#define FORCE_TX_FC                         (1 << 4)
+#define FORCE_SPD_S                         (28)
+#define FORCE_SPD_M                         (0x70000000)
+#define FORCE_DPX                           (1 << 25)
+#define FORCE_LINK                          (1 << 24)
+
+/* Fields of PMSR */
+#define EEE1G_STS                           (1 << 7)
+#define EEE100_STS                          (1 << 6)
+#define RX_FC_STS                           (1 << 5)
+#define TX_FC_STS                           (1 << 4)
+#define MAC_SPD_STS_S                       (28)
+#define MAC_SPD_STS_M                       (0x70000000)
+#define MAC_DPX_STS                         (1 << 25)
+#define MAC_LNK_STS                         (1 << 24)
+
+/* Values of MAC_SPD_STS */
+#define MAC_SPD_10                          0
+#define MAC_SPD_100                         1
+#define MAC_SPD_1000                        2
+#define MAC_SPD_2500                        3
+
+/* Values of IPG_CFG */
+#define IPG_96BIT                           0
+#define IPG_96BIT_WITH_SHORT_IPG            1
+#define IPG_64BIT                           2
+
+/* Register of MIB Base address */
+#define MAC_GLOBAL_REG_BASE                 0x10213E00
+#define ARL_ACL_ATK_REG_BASE                0x10200000
+
+#define MIB_BASE                            0x10214000
+#define MIB_PORT_OFFSET                     0x0200
+#define MIB_ACL_EVENT_OFFSET                0x0F00
+#define MIB_TDPC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x00)
+#define MIB_TCRC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x04)
+#define MIB_TUPC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x08)
+#define MIB_TMPC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x0C)
+#define MIB_TBPC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x10)
+#define MIB_TCEC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x14)
+#define MIB_TSCEC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x18)
+#define MIB_TMCEC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x1C)
+#define MIB_TDEC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x20)
+#define MIB_TLCEC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x24)
+#define MIB_TXCEC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x28)
+#define MIB_TPPC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x2C)
+#define MIB_TL64PC(p)                       (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x30)
+#define MIB_TL65PC(p)                       (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x34)
+#define MIB_TL128PC(p)                      (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x38)
+#define MIB_TL256PC(p)                      (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x3C)
+#define MIB_TL512PC(p)                      (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x40)
+#define MIB_TL1024PC(p)                     (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x44)
+#define MIB_TL1519PC(p)                     (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x48)
+
+#define MIB_TOCL(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x4C)
+#define MIB_TOCH(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x50)
+#define MIB_TODPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x54)
+#define MIB_TOCL2(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x58)
+#define MIB_TOCH2(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x5C)
+
+
+
+#define MIB_RDPC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x80)
+#define MIB_RFPC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x84)
+#define MIB_RUPC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x88)
+#define MIB_RMPC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x8C)
+#define MIB_RBPC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x90)
+#define MIB_RAEPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x94)
+#define MIB_RCEPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x98)
+#define MIB_RUSPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x9C)
+#define MIB_RFEPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xA0)
+#define MIB_ROSPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xA4)
+#define MIB_RJEPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xA8)
+#define MIB_RPPC(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xAC)
+#define MIB_RL64PC(p)                       (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xB0)
+#define MIB_RL65PC(p)                       (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xB4)
+#define MIB_RL128PC(p)                      (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xB8)
+#define MIB_RL256PC(p)                      (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xBC)
+#define MIB_RL512PC(p)                      (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xC0)
+#define MIB_RL1024PC(p)                     (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xC4)
+#define MIB_RL1519PC(p)                     (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xC8)
+
+#define MIB_ROCL(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xCC)
+#define MIB_ROCH(p)                         (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xD0)
+#define MIB_RCDPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xD4)
+#define MIB_RIDPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xD8)
+#define MIB_RADPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xDC)
+#define MIB_FCDPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xE0)
+#define MIB_WRDPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xE4)
+#define MIB_MRDPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xE8)
+#define MIB_ROCL2(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xEC)
+#define MIB_ROCH2(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xF0)
+#define MIB_SFSPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xF4)
+#define MIB_SFTPC(p)                        (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xF8)
+#define MIB_RXC_DPC(p)                      (MIB_BASE + (p) * MIB_PORT_OFFSET + 0xFC)
+
+
+#define MIB_TMIB_HF_STS(p)                  (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x7C)
+#define MIB_RMIB_HF_STS(p)                  (MIB_BASE + (p) * MIB_PORT_OFFSET + 0x100)
+
+#define ACL_MIB_CNT_CFG                     (ARL_ACL_ATK_REG_BASE + 0x534)
+#define ACL_MIB_CNT                         (ARL_ACL_ATK_REG_BASE + 0x538)
+
+
+#define MIB_CCR                             (MAC_GLOBAL_REG_BASE + 0x0030)
+#define MIB_PCLR                            (MAC_GLOBAL_REG_BASE + 0x0034)
+#define MIB_CCR_MIB_ENABLE_OFFSET           (31)
+#define MIB_CCR_MIB_ENABLE_LENGTH            (1)
+#define MIB_CCR_MIB_ENABLE                  (1 << 31)
+#define MIB_CCR_RX_OCT_CNT_GOOD             (1 << 7)
+#define MIB_CCR_RX_OCT_CNT_BAD              (1 << 6)
+#define MIB_CCR_TX_OCT_CNT_GOOD             (1 << 5)
+#define MIB_CCR_TX_OCT_CNT_BAD              (1 << 4)
+
+#define CSR_ACL_MIB_CLEAR                   (1 << 0)
+
+#define SGMII_REG_BASE                      0x5000
+#define SGMII_REG_PORT_BASE                 0x1000
+#define SGMII_REG(p, r)                     (SGMII_REG_BASE + (p) * SGMII_REG_PORT_BASE + (r))
+#define PCS_CONTROL_1(p)                    SGMII_REG(p, 0x00)
+#define PCS_SPEED_ABILITY(p)                SGMII_REG(p, 0x08)
+#define SGMII_MODE(p)                       SGMII_REG(p, 0x20)
+#define QPHY_PWR_STATE_CTRL(p)              SGMII_REG(p, 0xE8)
+#define PHYA_CTRL_SIGNAL3(p)                SGMII_REG(p, 0x128)
+
+/* Fields of PCS_CONTROL_1 */
+#define SGMII_AN_ABILITY                    (1 << 19)
+#define SGMII_LINK_STATUS                   (1 << 18)
+#define SGMII_AN_ENABLE_OFFT                (12)
+#define SGMII_AN_ENABLE                     (1 << 12)
+#define SGMII_AN_RESTART                    (1 << 9)
+
+/* Fields of SGMII_MODE */
+#define SGMII_REMOTE_FAULT_DIS              (1 << 8)
+#define SGMII_IF_MODE_FORCE_DUPLEX          (1 << 4)
+#define SGMII_IF_MODE_FORCE_SPEED_OFFT      (0x2)
+#define SGMII_IF_MODE_FORCE_SPEED_R         (0x2)
+#define SGMII_IF_MODE_FORCE_SPEED_M         (0x0C)
+#define SGMII_IF_MODE_ADVERT_AN             (1 << 1)
+
+/* Config of AN Tx control information (SGMII)
+* LINK- 1:link up, 0:link down
+* DUPLEX- 1:full, 0:half
+* MODE - 1:SGMII, 0:Clause37
+*/
+#define AN_CONFIG_TX_LINK                   (1 << 15)
+#define AN_CONFIG_TX_DUPLEX                 (1 << 12)
+#define AN_CONFIG_TX_SPEED_OFFT             (10)
+#define AN_CONFIG_TX_SPEED_MSK              (3 << AN_CONFIG_TX_SPEED_OFFT)
+#define AN_CONFIG_TX_MODE_SGMII             (1)
+
+/* Config of AN Tx control information (Clause37)
+* MODE - 1:SGMII, 0:Clause37
+*/
+#define AN_CONFIG_TX_FULL_DUPLEX_CL37       (1 << 5)
+#define AN_CONFIG_TX_HALF_DUPLEX_CL37       (1 << 6)
+#define AN_CONFIG_TX_SYMMETRIC_PAUSE        (1 << 7)
+#define AN_CONFIG_TX_ASYMMETRIC_PAUSE       (1 << 8)
+
+/* Values of SGMII_IF_MODE_FORCE_SPEED */
+#define SGMII_IF_MODE_FORCE_SPEED_10        0
+#define SGMII_IF_MODE_FORCE_SPEED_100       1
+#define SGMII_IF_MODE_FORCE_SPEED_1000      2
+
+/* Fields of QPHY_PWR_STATE_CTRL */
+#define PHYA_PWD                            (1 << 4)
+
+/* Fields of PHYA_CTRL_SIGNAL3 */
+#define RG_TPHY_SPEED_S                     2
+#define RG_TPHY_SPEED_M                     0x0c
+
+/* Values of RG_TPHY_SPEED */
+#define RG_TPHY_SPEED_1000                  0
+#define RG_TPHY_SPEED_2500                  1
+
+
+#define SCU_BASE                            0x10000000
+#define RG_RGMII_TXCK_C                     (SCU_BASE + 0x1d0)
+
+#define HSGMII_AN_CSR_BASE                  0x10220000
+#define SGMII_REG_AN0                       (HSGMII_AN_CSR_BASE + 0x000)
+#define SGMII_REG_AN_13                     (HSGMII_AN_CSR_BASE + 0x034)
+#define SGMII_REG_AN_FORCE_CL37             (HSGMII_AN_CSR_BASE + 0x060)
+
+#define HSGMII_CSR_PCS_BASE                 0x10220000
+#define RG_HSGMII_PCS_CTROL_1               (HSGMII_CSR_PCS_BASE + 0xa00)
+#define RG_AN_SGMII_MODE_FORCE              (HSGMII_CSR_PCS_BASE + 0xa24)
+
+#define MULTI_SGMII_CSR_BASE                0x10224000
+#define SGMII_STS_CTRL_0                    (MULTI_SGMII_CSR_BASE + 0x018)
+#define MSG_RX_CTRL_0                       (MULTI_SGMII_CSR_BASE + 0x100)
+#define MSG_RX_LIK_STS_0                    (MULTI_SGMII_CSR_BASE + 0x514)
+#define MSG_RX_LIK_STS_2                    (MULTI_SGMII_CSR_BASE + 0x51c)
+#define PHY_RX_FORCE_CTRL_0                 (MULTI_SGMII_CSR_BASE + 0x520)
+
+#define XFI_CSR_PCS_BASE                    0x10225000
+#define RG_USXGMII_AN_CONTROL_0             (XFI_CSR_PCS_BASE + 0xbf8)
+
+#define MULTI_PHY_RA_CSR_BASE               0x10226000
+#define RG_RATE_ADAPT_CTRL_0               (MULTI_PHY_RA_CSR_BASE + 0x000)
+#define RATE_ADP_P0_CTRL_0                 (MULTI_PHY_RA_CSR_BASE + 0x100)
+#define MII_RA_AN_ENABLE                   (MULTI_PHY_RA_CSR_BASE + 0x300)
+
+#define QP_DIG_CSR_BASE                     0x1022a000
+#define QP_CK_RST_CTRL_4                    (QP_DIG_CSR_BASE + 0x310)
+#define QP_DIG_MODE_CTRL_0                  (QP_DIG_CSR_BASE + 0x324)
+#define QP_DIG_MODE_CTRL_1                  (QP_DIG_CSR_BASE + 0x330)
+
+#define SERDES_WRAPPER_BASE                 0x1022c000
+#define USGMII_CTRL_0                       (SERDES_WRAPPER_BASE + 0x000)
+
+#define QP_PMA_TOP_BASE                     0x1022e000
+#define PON_RXFEDIG_CTRL_0                  (QP_PMA_TOP_BASE + 0x100)
+#define PON_RXFEDIG_CTRL_9                  (QP_PMA_TOP_BASE + 0x124)
+
+#define SS_LCPLL_PWCTL_SETTING_2            (QP_PMA_TOP_BASE + 0x208)
+#define SS_LCPLL_TDC_FLT_2                  (QP_PMA_TOP_BASE + 0x230)
+#define SS_LCPLL_TDC_FLT_5                  (QP_PMA_TOP_BASE + 0x23c)
+#define SS_LCPLL_TDC_PCW_1                  (QP_PMA_TOP_BASE + 0x248)
+#define INTF_CTRL_8                         (QP_PMA_TOP_BASE + 0x320)
+#define INTF_CTRL_9                         (QP_PMA_TOP_BASE + 0x324)
+#define PLL_CTRL_0                          (QP_PMA_TOP_BASE + 0x400)
+#define PLL_CTRL_2                          (QP_PMA_TOP_BASE + 0x408)
+#define PLL_CTRL_3                          (QP_PMA_TOP_BASE + 0x40c)
+#define PLL_CTRL_4                          (QP_PMA_TOP_BASE + 0x410)
+#define PLL_CK_CTRL_0                       (QP_PMA_TOP_BASE + 0x414)
+#define RX_DLY_0                            (QP_PMA_TOP_BASE + 0x614)
+#define RX_CTRL_2                           (QP_PMA_TOP_BASE + 0x630)
+#define RX_CTRL_5                           (QP_PMA_TOP_BASE + 0x63c)
+#define RX_CTRL_6                           (QP_PMA_TOP_BASE + 0x640)
+#define RX_CTRL_7                           (QP_PMA_TOP_BASE + 0x644)
+#define RX_CTRL_8                           (QP_PMA_TOP_BASE + 0x648)
+#define RX_CTRL_26                          (QP_PMA_TOP_BASE + 0x690)
+#define RX_CTRL_42                          (QP_PMA_TOP_BASE + 0x6d0)
+
+#define QP_ANA_CSR_BASE                     0x1022f000
+#define RG_QP_RX_DAC_EN                     (QP_ANA_CSR_BASE + 0x00)
+#define RG_QP_RXAFE_RESERVE                 (QP_ANA_CSR_BASE + 0x04)
+#define RG_QP_CDR_LPF_MJV_LIM               (QP_ANA_CSR_BASE + 0x0c)
+#define RG_QP_CDR_LPF_SETVALUE              (QP_ANA_CSR_BASE + 0x14)
+#define RG_QP_CDR_PR_CKREF_DIV1             (QP_ANA_CSR_BASE + 0x18)
+#define RG_QP_CDR_PR_KBAND_DIV_PCIE         (QP_ANA_CSR_BASE + 0x1c)
+#define RG_QP_CDR_FORCE_IBANDLPF_R_OFF      (QP_ANA_CSR_BASE + 0x20)
+#define RG_QP_TX_MODE_16B_EN                (QP_ANA_CSR_BASE + 0x28)
+#define RG_QP_PLL_IPLL_DIG_PWR_SEL          (QP_ANA_CSR_BASE + 0x3c)
+#define RG_QP_PLL_SDM_ORD                   (QP_ANA_CSR_BASE + 0x40)
+
+#define ETHER_SYS_BASE                      0x1028c800
+#define RG_P5MUX_MODE                       (ETHER_SYS_BASE + 0x00)
+#define RG_FORCE_CKDIR_SEL                  (ETHER_SYS_BASE + 0x04)
+#define RG_SWITCH_MODE                      (ETHER_SYS_BASE + 0x08)
+#define RG_FORCE_MAC5_SB                    (ETHER_SYS_BASE + 0x2c)
+#define CSR_RMII                            (ETHER_SYS_BASE + 0x70)
+
+
+#define SYS_CTRL                            0x7000
+#define SW_PHY_RST                          (1 << 2)
+#define SW_SYS_RST                          (1 << 1)
+#define SW_REG_RST                          (1 << 0)
+
+#define PHY_IAC                             0x1000e000
+
+#define CLKGEN_CTRL                         0x7500
+#define CLK_SKEW_OUT_S                      8
+#define CLK_SKEW_OUT_M                      0x300
+#define CLK_SKEW_IN_S                       6
+#define CLK_SKEW_IN_M                       0xc0
+#define RXCLK_NO_DELAY                      (1 << 5)
+#define TXCLK_NO_REVERSE                    (1 << 4)
+#define GP_MODE_S                           1
+#define GP_MODE_M                           0x06
+#define GP_CLK_EN                           (1 << 0)
+
+/* Values of GP_MODE */
+#define GP_MODE_RGMII                       0
+#define GP_MODE_MII                         1
+#define GP_MODE_REV_MII                     2
+
+/* Values of CLK_SKEW_IN */
+#define CLK_SKEW_IN_NO_CHANGE               0
+#define CLK_SKEW_IN_DELAY_100PPS            1
+#define CLK_SKEW_IN_DELAY_200PPS            2
+#define CLK_SKEW_IN_REVERSE                 3
+
+/* Values of CLK_SKEW_OUT */
+#define CLK_SKEW_OUT_NO_CHANGE              0
+#define CLK_SKEW_OUT_DELAY_100PPS           1
+#define CLK_SKEW_OUT_DELAY_200PPS           2
+#define CLK_SKEW_OUT_REVERSE                3
+
+#define HWSTRAP                             0x7800
+#define XTAL_FSEL_S                         7
+#define XTAL_FSEL_M                         (1 << 7)
+
+#define XTAL_40MHZ                          0
+#define XTAL_25MHZ                          1
+
+#define PLLGP_EN                            0x7820
+#define EN_COREPLL                          (1 << 2)
+#define SW_CLKSW                            (1 << 1)
+#define SW_PLLGP                            (1 << 0)
+
+#define PLLGP_CR0                           0x78a8
+#define RG_COREPLL_EN                       (1 << 22)
+#define RG_COREPLL_POSDIV_S                 23
+#define RG_COREPLL_POSDIV_M                 0x3800000
+#define RG_COREPLL_SDM_PCW_S                1
+#define RG_COREPLL_SDM_PCW_M                0x3ffffe
+#define RG_COREPLL_SDM_PCW_CHG              (1 << 0)
+
+#define MHWSTRAP                            0x7804
+#define STRAP_CHG_STRAP                     (1 << 8)
+#define STRAP_PHY_EN                        (1 << 6)
+
+#define TOP_SIG_SR                          0x780c
+#define PAD_DUAL_SGMII_EN                   (1 << 1)
+
+/* RGMII and SGMII PLL clock */
+#define ANA_PLLGP_CR2                       0x78b0
+#define ANA_PLLGP_CR5                       0x78bc
+
+/* Efuse Register Define */
+#define GBE_EFUSE                           0x7bc8
+#define GBE_SEL_EFUSE_EN                    (1 << 0)
+
+/* GPIO_PAD_0 */
+#define GPIO_MODE0                          0x7c0c
+#define GPIO_MODE0_S                        0
+#define GPIO_MODE0_M                        0xf
+#define GPIO_0_INTERRUPT_MODE               0x1
+
+#define SMT0_IOLB                           0x7f04
+#define SMT_IOLB_5_SMI_MDC_EN               (1 << 5)
+
+/* PHY CL22 reg */
+#define PHY_PAGE_0                          0x0
+/* Mode Control Register */
+#define PHY_MCR                             0x00
+#define MCR_SR                              (1 << 15)
+#define MCR_LB                              (1 << 14)
+#define MCR_MR_FC_SPD_INT_0                 (1 << 13)
+#define MCR_AN_EN                           (1 << 12)
+#define MCR_PW_DN                           (1 << 11)
+#define MCR_ISO                             (1 << 10)
+#define MCR_RST_AN                          (1 << 9)
+#define MCR_MR_DUX                          (1 << 8)
+#define MCR_MR_CLS_TEST                     (1 << 7)
+#define MCR_MR_FC_SPD_INT_1                 (1 << 6)
+
+/* Mode Status Register */
+#define PHY_MSR                             0x01
+#define MSR_CAP_100T4                       (1 << 15)
+#define MSR_CAP_100X_FDX                    (1 << 14)
+#define MSR_CAP_100X_HDX                    (1 << 13)
+#define MSR_CAP_10T_FDX                     (1 << 12)
+#define MSR_CAP_10T_HDX                     (1 << 11)
+#define MSR_CAP_100T2_HDX                   (1 << 10)
+#define MSR_CAP_100T2_FDX                   (1 << 9)
+#define MSR_EXT_STA_EN                      (1 << 8)
+#define MSR_PRAM_SUP_CAP                    (1 << 6)
+#define MSR_AN_COMP                         (1 << 5)
+#define MSR_RMT_FAULT                       (1 << 4)
+#define MSR_AN_CAP                          (1 << 3)
+#define MSR_LINK_STA                        (1 << 2)
+#define MSR_JAB_DECT                        (1 << 1)
+#define MSR_EXT_CAP                         (1 << 0)
+
+/* Auto-Negotiation Advertisement Register */
+#define PHY_AN_ADV                          0x04
+#define AN_ADV_NX_PAGE_REQ                  (1 << 15)
+#define AN_ADV_RF                           (1 << 13)
+#define AN_ADV_CAP_PAUSE                    (3 << 10)
+#define AN_ADV_CAP_100_T4                   (1 << 9)
+#define AN_ADV_CAP_100_FDX                  (1 << 8)
+#define AN_ADV_CAP_100_HDX                  (1 << 7)
+#define AN_ADV_CAP_10_FDX                   (1 << 6)
+#define AN_ADV_CAP_10_HDX                   (1 << 5)
+#define AN_ADV_802_9_ISLAN_16T              (2 << 0)
+#define AN_ADV_802_3                        (1 << 0)
+
+/* Auto-Negotiation Link Partner Advertisement Register */
+#define PHY_AN_LP_ADV                       0x05
+#define AN_LP_NX_PAGE_REQ                   (1 << 15)
+#define AN_LP_ACK                           (1 << 14)
+#define AN_LP_RF                            (1 << 13)
+#define AN_LP_CAP_PAUSE                     (3 << 10)
+#define AN_LP_CAP_100_T4                    (1 << 9)
+#define AN_LP_CAP_100_FDX                   (1 << 8)
+#define AN_LP_CAP_100_HDX                   (1 << 7)
+#define AN_LP_CAP_10_FDX                    (1 << 6)
+#define AN_LP_CAP_10_HDX                    (1 << 5)
+#define AN_LP_802_9_ISLAN_16T               (2 << 0)
+#define AN_LP_802_3                         (1 << 0)
+
+/* 1000BASE-T Control Register */
+#define PHY_CR1G                            0x09
+#define CR1G_TEST_TM4                       (4 << 13)
+#define CR1G_TEST_TM3                       (3 << 13)
+#define CR1G_TEST_TM2                       (2 << 13)
+#define CR1G_TEST_TM1                       (1 << 13)
+#define CR1G_TEST_NORMAL                    (0 << 13)
+#define CR1G_MS_EN                          (1 << 12)
+#define CR1G_MS_CONF                        (1 << 11)
+#define CR1G_PORT_TYPE                      (1 << 10)
+#define CR1G_ADV_CAP1000_FDX                (1 << 9)
+#define CR1G_ADV_CAP1000_HDX                (1 << 8)
+
+/* 1000BASE-T Status Register */
+#define PHY_SR1G                            0x0A
+#define SR1G_MS_CFG_FAULT                   (1 << 15)
+#define SR1G_MS_CFG_RES                     (1 << 14)
+#define SR1G_LOC_RX                         (1 << 13)
+#define SR1G_RMT_RX                         (1 << 12)
+#define SR1G_CAP1000_FDX                    (1 << 11)
+#define SR1G_CAP1000_HDX                    (1 << 10)
+#define SR1G_IDLE_ERR_MASK                  0xFF
+
+#define PHY_PAGE_1                          0x1
+/* Ethernet Packet Generator Control Register */
+#define PHY_EPG                             0x1D
+#define EPG_EN                              (1 << 15)
+#define EPG_RUN                             (1 << 14)
+#define EPG_TX_DUR                          (1 << 13)
+#define EPG_PKT_LEN_10KB                    (3 << 11)
+#define EPG_PKT_LEN_1518B                   (2 << 11)
+#define EPG_PKT_LEN_64B                     (1 << 11)
+#define EPG_PKT_LEN_125B                    (0 << 11)
+#define EPG_PKT_GAP                         (1 << 10)
+#define EPG_DES_ADDR(a)                     ( ( (a) & 0xF ) << 6 )
+#define EPG_SUR_ADDR(a)                     ( ( (a) & 0xF ) << 2 )
+#define EPG_PL_TYP_RANDOM                   (1 << 1)
+#define EPG_BAD_FCS                         (1 << 0)
+
+/* external*/
+#define EXPHY_CMD_WRITE                     (0x10)
+#define DFETAILDC_COEFF_L                   (0x11)
+#define DFETAILDC_COEFF_M                   (0x12)
+
+/* PHY CL22 reg */
+#define PHY_PAGE                            (0x1F)
+
+/* PHY CL45 reg */
+#define PHY_DEV_07H                         (0x07)
+#define PHY_DEV_1FH                         (0x1F)
+#define PHY_DEV_1EH                         (0x1E)
+
+/* dev 07h, reg 03Ch: EEE Advertisement Register */
+#define EEE_ADV_REG                         (0x3C)
+#define EEE_ADV_1000BT                      (1 << 2)
+#define EEE_ADV_100BT                       (1 << 1)
+
+/* dev 1Eh, reg 013h: TX pair delay Register */
+#define TX_PAIR_DELAY_SEL_REG               (0x013)
+
+/* dev 1Eh, reg 03Ch: Bypass power-down Register */
+#define BYPASS_POWER_DOWN_REG0              (0x3C)
+#define BYPASS_POWER_DOWN_REG1              (0x3D)
+#define BYPASS_POWER_DOWN_REG2              (0x3E)
+
+
+/* dev 1Eh, reg 145h: T10 Test Conttrol Register */
+#define PD_DIS                              (1 << 15)
+#define FC_TDI_EN                           (1 << 14)
+#define FC_DI_ACT                           (1 << 13)
+#define FC_LITN_NO_COMP                     (1 << 12)
+#define FC_MDI_CO_MDIX                      (3 << 3)
+#define FC_MDI_CO_MDI                       (2 << 3)
+#define FC_MDI_CO_NOT                       (0 << 3)
+#define FC_10T_POLAR_SWAP                   (3 << 1)
+#define FC_10T_POLAR_NORMAL                 (2 << 1)
+#define FC_10T_POLAR_NOT                    (0 << 1)
+
+/* dev 1Eh, reg 14Ah: DSP control 1 Register */
+#define DSP_CONTROL_REG                     (0x14A)
+#define PICMD_MISER_MODE_INT(v)             (((v) & 0x7ff) << 5)
+
+/* dev 1Eh, reg 20Bh: DSP state machine PM control Register */
+#define DSP_FRE_PM_REG                      (0x20B)
+
+/* dev 1Eh, reg 20Eh: DSP state machine FRE control Register */
+#define DSP_FRE_REG                         (0x20E)
+#define DSP_FRE_RP_FSM_EN                   (1 << 4)
+#define DSP_FRE_DW_AUTO_INC                 (1 << 2)
+#define DSP_FRE_WR_EN                       (1 << 1)
+#define DSP_FRE_SW_RST                      (1 << 0)
+
+/* dev 1Eh, reg 2d1h: Register */
+#define RG_LPI_REG                          (0x2D1)
+#define RG_LPI_VCO_EEE_STGO_EN              (1 << 10)
+#define RG_LPI_TR_READY                     (1 << 9)
+#define RG_LPI_SKIP_SD_SLV_TR               (1 << 8)
+#define VCO_SLICER_THRES_H                  (0x33)
+
+/* dev 1Fh, reg 021h: LED Basic control Register */
+#define LED_BCR                             (0x021)
+#define LED_BCR_EXT_CTRL                    (1 << 15)
+#define LED_BCR_EVT_ALL                     (1 << 4)
+#define LED_BCR_CLK_EN                      (1 << 3)
+#define LED_BCR_TIME_TEST                   (1 << 2)
+#define LED_BCR_MODE_MASK                   (3)
+#define LED_BCR_MODE_DISABLE                (0)
+#define LED_BCR_MODE_2LED                   (1)
+#define LED_BCR_MODE_3LED_1                 (2)
+#define LED_BCR_MODE_3LED_2                 (3)
+
+/* dev 1Fh, reg 022h: LED On Duration Register */
+#define LED_ON_DUR                          (0x022)
+#define LED_ON_DUR_MASK                     (0xFFFF)
+
+/* dev 1Fh, reg 023h: LED Blinking Duration Register */
+#define LED_BLK_DUR                         (0x023)
+#define LED_BLK_DUR_MASK                    (0xFFFF)
+
+/* dev 1Fh, reg 024h: LED On Control Register */
+#define LED_ON_CTRL(i)                      (0x024 + ( (i) * 2 ))
+#define LED_ON_EN                           (1 << 15)
+#define LED_ON_POL                          (1 << 14)
+#define LED_ON_EVT_MASK                     (0x7F)
+#define LED_ON_EVT_FORCE                    (1 << 6)
+#define LED_ON_EVT_HDX                      (1 << 5)
+#define LED_ON_EVT_FDX                      (1 << 4)
+#define LED_ON_EVT_LINK_DN                  (1 << 3)
+#define LED_ON_EVT_LINK_10M                 (1 << 2)
+#define LED_ON_EVT_LINK_100M                (1 << 1)
+#define LED_ON_EVT_LINK_1000M               (1 << 0)
+
+/* dev 1Fh, reg 025h: LED Blinking Control Register */
+#define LED_BLK_CTRL(i)                     (0x025 + ( (i) * 2 ))
+#define LED_BLK_EVT_MASK                    (0x3FF)
+#define LED_BLK_EVT_FORCE                   (1 << 9)
+#define LED_BLK_EVT_RX_IDL                  (1 << 8)
+#define LED_BLK_EVT_RX_CRC                  (1 << 7)
+#define LED_BLK_EVT_CLS                     (1 << 6)
+#define LED_BLK_EVT_10M_RX_ACT              (1 << 5)
+#define LED_BLK_EVT_10M_TX_ACT              (1 << 4)
+#define LED_BLK_EVT_100M_RX_ACT             (1 << 3)
+#define LED_BLK_EVT_100M_TX_ACT             (1 << 2)
+#define LED_BLK_EVT_1000M_RX_ACT            (1 << 1)
+#define LED_BLK_EVT_1000M_TX_ACT            (1 << 0)
+
+/* dev 1Fh, reg 27Bh: 10M Driver Register */
+#define CR_RG_TX_CM_10M(val)                ( ( (val) & 0x3 ) << 12 )
+#define CR_RG_DELAY_TX_10M(val)             ( ( (val) & 0x3 ) << 8 )
+#define CR_DA_TX_GAIN_10M_EEE(val)          ( ( ( ( (val) / 10 ) - 3 ) & 0x7 ) << 4 )
+#define CR_DA_TX_GAIN_10M(val)              ( ( ( (val) / 10 ) - 3 ) & 0x7 )
+
+/* dev 1Fh, reg 403h: PLL_group Control Register */
+#define PLL_GROUP_CONTROL_REG               (0x403)
+#define RG_SYSPLL_DDSFBK_EN                 (1 << 12)
+#define RG_SYSPLL_DMY1                      (3 << 8)
+#define RG_SYSPLL_EEE_EN                    (1 << 7)    //1:enable/0:disable EEE mode when RG_SYSPLL_EEE_EN_PYPASS = 1
+#define RG_SYSPLL_EEE_EN_PYPASS             (1 << 6)    //EEE enable is control by 0:top/1:RG_SYSPLL_EEE_EN
+#define RG_SYSPLL_AFE_PWD                   (1 << 5)    //1:enable/0:disable analog power down when RG_SYSPLL_AFE_PWD_BYPASS = 1
+#define RG_SYSPLL_AFE_PWD_BYPASS            (1 << 4)    //Analog power down is control by 0:top/1:RG_SYSPLL_AFE_PWD
+#define RG_SYSPLL_EFUSE_DIS                 (1 << 3)    //1:efuse mode / 0:disable efuse mode, and use internal RG
+#define RG_CLKDRV_FORCEIN                   (3 << 1)    //analog test mode
+#define RG_XSQ_LPF_EN                       (1 << 0)    //analog test mode
+
+/* Register of ACL address */
+#define ARL_GLOBAL_CNTRL        (REG_ARL_BASE_ADDRESS + 0x00c)
+#define ACL_BASE                (REG_ARL_BASE_ADDRESS + 0x500)
+#define ACL_GLOBAL_CFG          (ACL_BASE + 0x00)
+#define ACL_PORT_EN             (ACL_BASE + 0x04)
+#define ACL_GROUP_CFG           (ACL_BASE + 0x08)
+#define ACL_MEM_CFG             (ACL_BASE + 0x0c)
+#define ACL_MEM_CFG_WDATA0      (ACL_BASE + 0x10)
+#define ACL_MEM_CFG_WDATA1      (ACL_BASE + 0x14)
+#define ACL_MEM_CFG_WDATA2      (ACL_BASE + 0x18)
+#define ACL_MEM_CFG_WDATA3      (ACL_BASE + 0x1c)
+#define ACL_MEM_CFG_RDATA0      (ACL_BASE + 0x20)
+#define ACL_MEM_CFG_RDATA1      (ACL_BASE + 0x24)
+#define ACL_MEM_CFG_RDATA2      (ACL_BASE + 0x28)
+#define ACL_MEM_CFG_RDATA3      (ACL_BASE + 0x2c)
+#define ACL_STATUS              (ACL_BASE + 0x30)
+#define ACL_TRTCM               (REG_ARL_BASE_ADDRESS + 0x100)
+#define ACL_TRTCMA              (REG_ARL_BASE_ADDRESS + 0x104)
+#define ACL_TRTCMW_CBS          (REG_ARL_BASE_ADDRESS + 0x108)
+#define ACL_TRTCMW_EBS          (REG_ARL_BASE_ADDRESS + 0x10C)
+#define ACL_TRTCMW_CIR          (REG_ARL_BASE_ADDRESS + 0x110)
+#define ACL_TRTCMW_EIR          (REG_ARL_BASE_ADDRESS + 0x114)
+#define ACL_TRTCMR_CBS          (REG_ARL_BASE_ADDRESS + 0x118)
+#define ACL_TRTCMR_EBS          (REG_ARL_BASE_ADDRESS + 0x11c)
+#define ACL_TRTCMR_CIR          (REG_ARL_BASE_ADDRESS + 0x120)
+#define ACL_TRTCMR_EIR          (REG_ARL_BASE_ADDRESS + 0x124)
+
+#define ACLRMC                  (REG_ARL_BASE_ADDRESS + 0x470)
+#define ACLRMD1                 (REG_ARL_BASE_ADDRESS + 0x474)
+#define ACLRMD2                 (REG_ARL_BASE_ADDRESS + 0x478)
+
+#define ACL_UDF_BASE            (REG_ARL_BASE_ADDRESS + 0x200)
+#define ACL_AUTC                (ACL_UDF_BASE + 0x00)
+#define ACL_AUTW0               (ACL_UDF_BASE + 0x08)
+#define ACL_AUTW1               (ACL_UDF_BASE + 0x0c)
+#define ACL_AUTW2               (ACL_UDF_BASE + 0x10)
+#define ACL_AUTR0               (ACL_UDF_BASE + 0x20)
+#define ACL_AUTR1               (ACL_UDF_BASE + 0x24)
+#define ACL_AUTR2               (ACL_UDF_BASE + 0x28)
+
+/* Register of DPCR */
+#define BMU_PORT_BASE               (0x10204000)
+#define DPCR_COLOR_OFFSET           (0x20)
+#define DPCR_QUEUE_OFFSET           (0x4)
+#define DPCR_EN(p)                  (BMU_PORT_BASE + (p * PORT_CTRL_PORT_OFFSET) + 0x08)
+#define DPCR_BASE                   (BMU_PORT_BASE + 0x10)
+#define DPCR(p, c, q)               (DPCR_BASE + (p * PORT_CTRL_PORT_OFFSET) + (c * DPCR_COLOR_OFFSET) + (q * DPCR_QUEUE_OFFSET))
+
+/* Register of VLAN */
+#define VTCR                    (0x10200600)
+#define VLNWDATA0               (0x10200604)
+#define VLNWDATA1               (0x10200608)
+#define VLNWDATA2               (0x1020060C)
+#define VLNWDATA3               (0x10200610)
+#define VLNWDATA4               (0x10200614)
+#define VLNRDATA0               (0x10200618)
+#define VLNRDATA1               (0x1020061C)
+#define VLNRDATA2               (0x10200620)
+#define VLNRDATA3               (0x10200624)
+#define VLNRDATA4               (0x10200628)
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+
+#endif  /* AIR_REG_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_sec.h b/feed/app/switch/src/an8855_sdk/api/inc/air_sec.h
new file mode 100644
index 0000000..1f56fdd
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_sec.h
@@ -0,0 +1,308 @@
+/* FILE NAME: air_sec.h
+ * PURPOSE:
+ *      Define the security function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+#ifndef AIR_SEC_H
+#define AIR_SEC_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* Field for storm control */
+#define AIR_STORM_MAX_COUNT    (255)
+
+#define AIR_MAX_NUM_OF_MAC     (2048)
+
+typedef enum
+{
+    AIR_STORM_TYPE_BCST,
+    AIR_STORM_TYPE_MCST,
+    AIR_STORM_TYPE_UCST,
+    AIR_STORM_TYPE_LAST
+}AIR_STORM_TYPE_T;
+
+typedef enum
+{
+    AIR_STORM_UNIT_64K,
+    AIR_STORM_UNIT_256K,
+    AIR_STORM_UNIT_1M,
+    AIR_STORM_UNIT_4M,
+    AIR_STORM_UNIT_16M,
+    AIR_STORM_UNIT_32M,
+    AIR_STORM_UNIT_LAST
+}AIR_STORM_UNIT_T;
+
+/* Field for flooding port */
+typedef enum
+{
+    AIR_FLOOD_TYPE_BCST,
+    AIR_FLOOD_TYPE_MCST,
+    AIR_FLOOD_TYPE_UCST,
+    AIR_FLOOD_TYPE_QURY,
+    AIR_FLOOD_TYPE_LAST
+}AIR_FLOOD_TYPE_T;
+
+/* Port security port control configurations */
+typedef struct AIR_SEC_PORTSEC_PORT_CONFIG_S
+{
+    /* Source MAC address learning mode */
+    BOOL_T sa_lrn_en;
+
+    /* Learned source MAC address counter */
+    BOOL_T sa_lmt_en;
+
+    /* Rx SA allowable learning limit number */
+    UI32_T sa_lmt_cnt;
+
+}AIR_SEC_PORTSEC_PORT_CONFIG_T;
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+/* FUNCTION NAME: air_sec_setStormEnable
+ * PURPOSE:
+ *      Enable or disable per port storm control for specific type.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      type            --  AIR_STORM_TYPE_BCST
+ *                          AIR_STORM_TYPE_MCST
+ *                          AIR_STORM_TYPE_UCST
+ *      storm_en        --  TRUE
+ *                          FALSE
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_setStormEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_STORM_TYPE_T type,
+    const BOOL_T storm_en);
+
+/* FUNCTION NAME: air_sec_getStormEnable
+ * PURPOSE:
+ *      Get per port status of storm control for specific type.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      type            --  AIR_STORM_TYPE_BCST
+ *                          AIR_STORM_TYPE_MCST
+ *                          AIR_STORM_TYPE_UCST
+ * OUTPUT:
+ *      ptr_storm_en    --  TRUE
+ *                          FALSE
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_getStormEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_STORM_TYPE_T type,
+    BOOL_T *ptr_storm_en);
+
+/* FUNCTION NAME: air_sec_setStormRate
+ * PURPOSE:
+ *      Set per port storm rate limit control for specific type.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      type            --  AIR_STORM_TYPE_BCST
+ *                          AIR_STORM_TYPE_MCST
+ *                          AIR_STORM_TYPE_UCST
+ *      count           --  Count of the unit
+ *                          Range 0..255
+ *                          Rate = (count * unit) bps
+ *      unit            --  AIR_STORM_UNIT_64K
+ *                          AIR_STORM_UNIT_256K
+ *                          AIR_STORM_UNIT_1M
+ *                          AIR_STORM_UNIT_4M
+ *                          AIR_STORM_UNIT_16M
+ *                          AIR_STORM_UNIT_32M
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_setStormRate(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_STORM_TYPE_T type,
+    const UI32_T count,
+    const AIR_STORM_UNIT_T storm_unit);
+
+/* FUNCTION NAME: air_sec_getStormRate
+ * PURPOSE:
+ *      Get per port storm rate limit control for specific type.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      type            --  AIR_STORM_TYPE_BCST
+ *                          AIR_STORM_TYPE_MCST
+ *                          AIR_STORM_TYPE_UCST
+ * OUTPUT:
+ *      ptr_count       --  Count of the unit
+ *                          Range 0..255
+ *                          Rate = (count * unit) bps
+ *      ptr_unit        --  AIR_STORM_UNIT_64K
+ *                          AIR_STORM_UNIT_256K
+ *                          AIR_STORM_UNIT_1M
+ *                          AIR_STORM_UNIT_4M
+ *                          AIR_STORM_UNIT_16M
+ *                          AIR_STORM_UNIT_32M
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_getStormRate(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_STORM_TYPE_T type,
+    UI32_T *ptr_count,
+    AIR_STORM_UNIT_T *ptr_unit);
+
+/* FUNCTION NAME: air_sec_setFldMode
+ * PURPOSE:
+ *      Set per port flooding status for unknown type frame.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port to setting
+ *      type            --  AIR_FLOOD_TYPE_BCST
+ *                          AIR_FLOOD_TYPE_MCST
+ *                          AIR_FLOOD_TYPE_UCST
+ *                          AIR_FLOOD_TYPE_QURY
+ *      fld_en          --  TRUE : flooding specific type frame for specific port
+ *                          FALSE: drop specific type frame for specific port
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_setFldMode(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_FLOOD_TYPE_T type,
+    const BOOL_T fld_en);
+
+/* FUNCTION NAME: air_sec_getFldMode
+ * PURPOSE:
+ *      Get per port flooding status for unknown type frame.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port to setting
+ *      type            --  AIR_FLOOD_TYPE_BCST
+ *                          AIR_FLOOD_TYPE_MCST
+ *                          AIR_FLOOD_TYPE_UCST
+ *                          AIR_FLOOD_TYPE_QURY
+ * OUTPUT:
+ *      ptr_fld_en      --  TRUE : flooding specific type frame for specific port
+ *                          FALSE: drop specific type frame for specific port
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_getFldMode(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_FLOOD_TYPE_T type,
+    BOOL_T *ptr_fld_en);
+
+/* FUNCTION NAME: air_sec_setPortSecPortCfg
+ * PURPOSE:
+ *      Set port security configurations for specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Port ID
+ *      port_config     --  Structure of port configuration.
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_setPortSecPortCfg(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_SEC_PORTSEC_PORT_CONFIG_T port_config);
+
+/* FUNCTION NAME: air_sec_getPortSecPortCfg
+ * PURPOSE:
+ *      Get port security configurations for specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Port ID
+ *
+ * OUTPUT:
+ *      ptr_port_config --  Structure of port configuration.
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_getPortSecPortCfg(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_SEC_PORTSEC_PORT_CONFIG_T *ptr_port_config);
+
+#endif /* End of AIR_SEC_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_sptag.h b/feed/app/switch/src/an8855_sdk/api/inc/air_sptag.h
new file mode 100644
index 0000000..99d2028
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_sptag.h
@@ -0,0 +1,277 @@
+/* FILE NAME: air_sptag.h
+ * PURPOSE:
+ *      Define the Special Tag function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+#ifndef AIR_SPTAG_H
+#define AIR_SPTAG_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+#define AIR_STAG_BUF_LEN                (4)
+#define AIR_STAG_ALIGN_BIT_WIDTH        (8)
+#define AIR_STAG_REPLACE_MODE_MAX_DP    (10)
+
+/* cpu tx stag offset */
+#define AIR_STAG_TX_OPC_BIT_OFFSET      (5)
+#define AIR_STAG_TX_OPC_BIT_WIDTH       (3)
+#define AIR_STAG_TX_VPM_BIT_OFFSET      (0)
+#define AIR_STAG_TX_VPM_BIT_WIDTH       (2)
+#define AIR_STAG_TX_PCP_BIT_OFFSET      (5)
+#define AIR_STAG_TX_PCP_BIT_WIDTH       (3)
+#define AIR_STAG_TX_DEI_BIT_OFFSET      (4)
+#define AIR_STAG_TX_DEI_BIT_WIDTH       (1)
+
+/* cpu rx stag offset */
+#define AIR_STAG_RX_RSN_BIT_OFFSET      (2)
+#define AIR_STAG_RX_RSN_BIT_WIDTH       (3)
+#define AIR_STAG_RX_VPM_BIT_OFFSET      (0)
+#define AIR_STAG_RX_VPM_BIT_WIDTH       (2)
+#define AIR_STAG_RX_SP_BIT_OFFSET       (0)
+#define AIR_STAG_RX_SP_BIT_WIDTH        (5)
+#define AIR_STAG_RX_PCP_BIT_OFFSET      (5)
+#define AIR_STAG_RX_PCP_BIT_WIDTH       (3)
+#define AIR_STAG_RX_DEI_BIT_OFFSET      (4)
+#define AIR_STAG_RX_DEI_BIT_WIDTH       (1)
+#define AIR_PORT_NUM                    (6)
+
+#define AIR_PORT_FOREACH(bitmap, port)                 \
+            for(port = 0; port < AIR_PORT_NUM; port++) \
+                if(bitmap & BIT(port))
+
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+typedef enum
+{
+    AIR_STAG_MODE_INSERT,
+    AIR_STAG_MODE_REPLACE,
+    AIR_STAG_MODE_LAST
+} AIR_STAG_MODE_T;
+
+typedef enum
+{
+    /* Egress DP is port map */
+    AIR_STAG_OPC_PORTMAP,
+
+    /* Egress DP is port id */
+    AIR_STAG_OPC_PORTID,
+
+    /* Forward the packet according to lookup result */
+    AIR_STAG_OPC_LOOKUP,
+    AIR_STAG_OPC_LAST
+} AIR_STAG_OPC_T;
+
+typedef enum
+{
+    AIR_STAG_REASON_CODE_NORMAL,
+    AIR_STAG_REASON_CODE_SFLOW,
+    AIR_STAG_REASON_CODE_TTL_ERR,
+    AIR_STAG_REASON_CODE_ACL,
+    AIR_STAG_REASON_CODE_SA_FULL,
+    AIR_STAG_REASON_CODE_PORT_MOVE_ERR,
+    AIR_STAG_REASON_CODE_LAST,
+} AIR_STAG_REASON_CODE_T;
+
+typedef enum
+{
+    AIR_STAG_VPM_UNTAG,
+    AIR_STAG_VPM_TPID_8100,
+    AIR_STAG_VPM_TPID_88A8,
+    AIR_STAG_VPM_TPID_PRE_DEFINED,
+    AIR_STAG_VPM_LAST,
+} AIR_STAG_VPM_T;
+
+typedef struct AIR_STAG_TX_PARA_S
+{
+    /* destination port operation code */
+    AIR_STAG_OPC_T      opc;
+
+    /* tag attribute */
+    AIR_STAG_VPM_T      vpm;
+
+    /* destination port map */
+    UI32_T              pbm;
+
+    /* PRI in vlan tag */
+    UI32_T              pri :3;
+
+    /* CFI in vlan tag */
+    UI32_T              cfi :1;
+
+    /* VID in vlan tag */
+    UI32_T              vid :12;
+} AIR_STAG_TX_PARA_T;
+
+
+typedef struct AIR_SPTAG_RX_PARA_S
+{
+    AIR_STAG_REASON_CODE_T rsn;        /* tag attribute */
+    AIR_STAG_VPM_T         vpm;        /* tag attribute */
+    UI32_T                 spn;        /* source port */
+    UI32_T                 pri;        /* PRI in vlan tag */
+    UI32_T                 cfi;        /* CFI in vlan tag */
+    UI32_T                 vid;        /* VID in vlan tag */
+}AIR_SPTAG_RX_PARA_T;
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+/* FUNCTION NAME: air_sptag_setState
+ * PURPOSE:
+ *      Set special tag enable/disable for port
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Special tag Port
+ *      sp_en           --  special tag Enable or Disable
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_setState(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T sp_en);
+
+/* FUNCTION NAME: air_switch_getCpuPortEn
+ * PURPOSE:
+ *      Get CPU port member
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Special tag Port
+ *
+ * OUTPUT:
+ *      sp_en           --  special tag enable or disable
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_getState(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *sp_en);
+
+/* FUNCTION NAME: air_sptag_setMode
+ * PURPOSE:
+ *      Set special tag enable/disable for port
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Special tag Port
+ *      mode            --  insert mode or replace mode
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_setMode(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T mode);
+
+/* FUNCTION NAME: air_sptag_getMode
+ * PURPOSE:
+ *      Get CPU port member
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Special tag Port
+ *
+ * OUTPUT:
+ *      mode            --  insert or replace mode
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_getMode(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *mode);
+
+/* FUNCTION NAME: air_sptag_encodeTx
+ * PURPOSE:
+ *      Encode tx special tag into buffer.
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_sptag_tx    --  Special tag parameters
+ *      ptr_buf         --  Buffer address
+ *      ptr_len         --  Buffer length
+ * OUTPUT:
+ *      ptr_len         --  Written buffer length
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_encodeTx(
+    const UI32_T unit,
+    const AIR_STAG_MODE_T mode,
+    AIR_STAG_TX_PARA_T *ptr_sptag_tx,
+    UI8_T *ptr_buf,
+    UI32_T *ptr_len);
+
+/* FUNCTION NAME: air_sptag_decodeRx
+ * PURPOSE:
+ *      Decode rx special tag from buffer.
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_buf         --  Buffer address
+ *      len             --  Buffer length
+ * OUTPUT:
+ *      ptr_sptag_rx    --  Special tag parameters
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_decodeRx(
+    const UI32_T unit,
+    const UI8_T *ptr_buf,
+    const UI32_T len,
+    AIR_SPTAG_RX_PARA_T *ptr_sptag_rx);
+
+#endif  /* AIR_SPTAG_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_stp.h b/feed/app/switch/src/an8855_sdk/api/inc/air_stp.h
new file mode 100644
index 0000000..2497392
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_stp.h
@@ -0,0 +1,101 @@
+/* FILE NAME: air_stp.h
+ * PURPOSE:
+ *      Define the STP function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+#ifndef AIR_STP_H
+#define AIR_STP_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* Definition of STP state
+ * 2'b00: Disable(STP)    / Discard(RSTP)
+ * 2'b01: Listening(STP)  / Discard(RSTP)
+ * 2'b10: Learning(STP)   / Learning(RSTP)
+ * 2'b11: Forwarding(STP) / Forwarding(RSTP)
+ * */
+typedef enum
+{
+    AIR_STP_STATE_DISABLE,
+    AIR_STP_STATE_LISTEN,
+    AIR_STP_STATE_LEARN,
+    AIR_STP_STATE_FORWARD,
+    AIR_STP_STATE_LAST
+}AIR_STP_STATE_T;
+
+#define AIR_STP_FID_NUMBER    (16)
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+/* FUNCTION NAME: air_stp_setPortstate
+ * PURPOSE:
+ *      Set the STP port state for a specifiec port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      fid             --  Filter ID for MSTP
+ *      state           --  AIR_STP_STATE_DISABLE
+ *                          AIR_STP_STATE_LISTEN
+ *                          AIR_STP_STATE_LEARN
+ *                          AIR_STP_STATE_FORWARD
+ * OUTPUT:
+ *        None
+ *
+ * RETURN:
+ *        AIR_E_OK
+ *        AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_stp_setPortstate(
+    const UI32_T unit,
+    const UI8_T port,
+    const UI8_T fid,
+    const AIR_STP_STATE_T state);
+
+/* FUNCTION NAME: air_stp_getPortstate
+ * PURPOSE:
+ *      Get the STP port state for a specifiec port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      fid             --  Filter ID for MSTP
+ *
+ * OUTPUT:
+ *      ptr_state       --  AIR_STP_STATE_DISABLE
+ *                          AIR_STP_STATE_LISTEN
+ *                          AIR_STP_STATE_LEARN
+ *                          AIR_STP_STATE_FORWARD
+ * RETURN:
+ *        AIR_E_OK
+ *        AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+
+AIR_ERROR_NO_T
+air_stp_getPortstate(
+    const UI32_T unit,
+    const UI32_T port,
+    const UI32_T fid,
+    AIR_STP_STATE_T *ptr_state);
+
+#endif /* End of AIR_STP_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_switch.h b/feed/app/switch/src/an8855_sdk/api/inc/air_switch.h
new file mode 100644
index 0000000..0c10cc4
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_switch.h
@@ -0,0 +1,250 @@
+/* FILE NAME: air_switch.h
+ * PURPOSE:
+ *      Define the switch function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+#ifndef AIR_SWITCH_H
+#define AIR_SWITCH_H
+
+/* INCLUDE FILE DECLARATIONS
+*/
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+#define SYS_INT_EN                 0x1021C010
+#define SYS_INT_STS                0x1021C014
+
+/* DATA TYPE DECLARATIONS
+*/
+typedef enum
+{
+    AIR_SYS_INTR_TYPE_PHY0_LC = 0,
+    AIR_SYS_INTR_TYPE_PHY1_LC,
+    AIR_SYS_INTR_TYPE_PHY2_LC,
+    AIR_SYS_INTR_TYPE_PHY3_LC,
+    AIR_SYS_INTR_TYPE_PHY4_LC,
+    AIR_SYS_INTR_TYPE_PHY5_LC,
+    AIR_SYS_INTR_TYPE_PHY6_LC,
+    AIR_SYS_INTR_TYPE_PHY7_LC,
+    AIR_SYS_INTR_TYPE_MAC_PC = 16,
+    AIR_SYS_INTR_TYPE_LAST
+}AIR_SYS_INTR_TYPE_T;
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+*/
+
+/* FUNCTION NAME: air_switch_setCpuPort
+ * PURPOSE:
+ *      Set CPU port member
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  CPU port index
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_setCpuPort(
+    const UI32_T unit,
+    const UI32_T portmap);
+
+/* FUNCTION NAME: air_switch_getCpuPort
+ * PURPOSE:
+ *      Get CPU port member
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_port        --  CPU port index
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_getCpuPort(
+    const UI32_T unit,
+    UI32_T *ptr_portmap);
+
+/* FUNCTION NAME: air_switch_setCpuPortEN
+ * PURPOSE:
+ *      Set CPU port Enable
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      cpu_en          --  CPU Port Enable
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_setCpuPortEn(
+    const UI32_T unit,
+    const BOOL_T cpu_en);
+
+/* FUNCTION NAME: air_switch_getCpuPortEn
+ * PURPOSE:
+ *      Get CPU port member
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      cpu_en          --  CPU Port enable
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_getCpuPortEn(
+    const UI32_T unit,
+    BOOL_T *cpu_en);
+
+/* FUNCTION NAME: air_switch_setSysIntrEn
+ * PURPOSE:
+ *      Set system interrupt enable
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      intr            --  system interrupt type
+ *      enable          --  system interrupt enable/disable
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_setSysIntrEn(
+    const UI32_T unit,
+    const AIR_SYS_INTR_TYPE_T intr,
+    const BOOL_T enable);
+
+/* FUNCTION NAME: air_switch_getSysIntrEn
+ * PURPOSE:
+ *      Get system interrupt enable
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      intr            --  system interrupt type
+ *
+ * OUTPUT:
+ *      ptr_enable      --  system interrupt enable/disable
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_getSysIntrEn(
+    const UI32_T unit,
+    const AIR_SYS_INTR_TYPE_T intr,
+    BOOL_T *ptr_enable);
+
+/* FUNCTION NAME: air_switch_setSysIntrStatus
+ * PURPOSE:
+ *      Set system interrupt status
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      intr            --  system interrupt type
+ *      enable          --  write TRUE to clear interrupt status
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_setSysIntrStatus(
+    const UI32_T unit,
+    const AIR_SYS_INTR_TYPE_T intr,
+    const BOOL_T enable);
+
+/* FUNCTION NAME: air_switch_getSysIntrStatus
+ * PURPOSE:
+ *      Get system interrupt status
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      intr            --  system interrupt type
+ *
+ * OUTPUT:
+ *      ptr_enable      --  system interrupt status
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_getSysIntrStatus(
+    const UI32_T unit,
+    const AIR_SYS_INTR_TYPE_T intr,
+    BOOL_T *ptr_enable);
+
+/* FUNCTION NAME: air_switch_reset
+ * PURPOSE:
+ *      Reset whole system
+ *
+ * INPUT:
+ *      None
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_reset(
+    const UI32_T unit);
+
+#endif /* End of AIR_SWITCH_H */
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_types.h b/feed/app/switch/src/an8855_sdk/api/inc/air_types.h
new file mode 100644
index 0000000..3bae3bd
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_types.h
@@ -0,0 +1,56 @@
+/* FILE NAME:   air_types.h
+ * PURPOSE:
+ *      Define the commom data type in AIR SDK.
+ * NOTES:
+ */
+
+#ifndef AIR_TYPES_H
+#define AIR_TYPES_H
+
+/* INCLUDE FILE DECLARATIONS
+ */
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+#ifndef FALSE
+#define FALSE               0
+#endif
+
+#ifndef TRUE
+#define TRUE                1
+#endif
+
+#ifndef NULL
+#define NULL                (void *)0
+#endif
+
+#ifndef LOW
+#define LOW                 0
+#endif
+
+#ifndef HIGH
+#define HIGH                1
+#endif
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+typedef int                 BOOL_T;
+typedef signed char         I8_T;
+typedef unsigned char       UI8_T;
+typedef signed short        I16_T;
+typedef unsigned short      UI16_T;
+typedef signed int          I32_T;
+typedef unsigned int        UI32_T;
+typedef char                C8_T;
+typedef unsigned long long  UI64_T;
+
+typedef UI8_T   AIR_MAC_T[6];
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+ */
+
+#endif  /* AIR_TYPES_H */
+
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_ver.h b/feed/app/switch/src/an8855_sdk/api/inc/air_ver.h
new file mode 100644
index 0000000..0681b6c
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_ver.h
@@ -0,0 +1,29 @@
+/* FILE NAME: air_ver.h
+ * PURPOSE:
+ *      Define the version for AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+#ifndef AIR_VER_H
+#define AIR_VER_H
+
+/* INCLUDE FILE DECLARATIONS
+ */
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+#define AIR_VER_SDK    "v1.0.1"
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+ */
+
+#endif  /* AIR_VER_H */
+
diff --git a/feed/app/switch/src/an8855_sdk/api/inc/air_vlan.h b/feed/app/switch/src/an8855_sdk/api/inc/air_vlan.h
new file mode 100644
index 0000000..1ae6237
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/inc/air_vlan.h
@@ -0,0 +1,977 @@
+/* FILE NAME:   air_vlan.h
+ * PURPOSE:
+ *      Define the vlan functions in AIR SDK.
+ * NOTES:
+ */
+
+#ifndef AIR_VLAN_H
+#define AIR_VLAN_H
+
+/* INCLUDE FILE DECLARATIONS
+ */
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+#define AIR_VLAN_ID_MIN                             0
+#define AIR_VLAN_ID_MAX                             4095
+#define AIR_DEFAULT_VLAN_ID                         1
+
+#define AIR_FILTER_ID_MAX                           7
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+typedef enum
+{
+    AIR_VLAN_PORT_EGS_TAG_CTL_TYPE_UNTAGGED = 0,
+    AIR_VLAN_PORT_EGS_TAG_CTL_TYPE_TAGGED = 2,
+    AIR_VLAN_PORT_EGS_TAG_CTL_TYPE_LAST,
+} AIR_VLAN_PORT_EGS_TAG_CTL_TYPE_T;
+
+typedef enum
+{
+    AIR_PORT_EGS_TAG_ATTR_UNTAGGED = 0,
+    AIR_PORT_EGS_TAG_ATTR_SWAP,
+    AIR_PORT_EGS_TAG_ATTR_TAGGED,
+    AIR_PORT_EGS_TAG_ATTR_STACK,
+    AIR_PORT_EGS_TAG_ATTR_LAST
+} AIR_PORT_EGS_TAG_ATTR_T;
+
+typedef enum
+{
+    AIR_VLAN_ACCEPT_FRAME_TYPE_ALL = 0,            /* untagged, priority-tagged and tagged  */
+    AIR_VLAN_ACCEPT_FRAME_TYPE_TAG_ONLY,           /* tagged                                */
+    AIR_VLAN_ACCEPT_FRAME_TYPE_UNTAG_ONLY,         /* untagged and priority-tagged          */
+    AIR_VLAN_ACCEPT_FRAME_TYPE_RESERVED,           /* reserved                              */
+    AIR_VLAN_ACCEPT_FRAME_TYPE_LAST
+} AIR_VLAN_ACCEPT_FRAME_TYPE_T;
+
+typedef enum
+{
+    AIR_LEAKY_PKT_TYPE_UNICAST = 0,                /* unicast pkt      */
+    AIR_LEAKY_PKT_TYPE_MULTICAST,                  /* multicast pkt    */
+    AIR_LEAKY_PKT_TYPE_BROADCAST,                  /* broadcast pkt    */
+    AIR_LEAKY_PKT_TYPE_LAST
+} AIR_LEAKY_PKT_TYPE_T;
+
+typedef enum
+{
+    AIR_VLAN_PORT_ATTR_USER_PORT = 0,              /* user port        */
+    AIR_VLAN_PORT_ATTR_STACK_PORT,                 /* stack port       */
+    AIR_VLAN_PORT_ATTR_TRANSLATION_PORT,           /* translation port */
+    AIR_VLAN_PORT_ATTR_TRANSPARENT_PORT,           /* transparent port */
+    AIR_VLAN_PORT_ATTR_LAST
+} AIR_VLAN_PORT_ATTR_T;
+
+typedef enum
+{
+    AIR_IGR_PORT_EG_TAG_ATTR_DISABLE = 0,
+    AIR_IGR_PORT_EG_TAG_ATTR_CONSISTENT,
+    AIR_IGR_PORT_EG_TAG_ATTR_UNTAGGED = 4,
+    AIR_IGR_PORT_EG_TAG_ATTR_SWAP,
+    AIR_IGR_PORT_EG_TAG_ATTR_TAGGED,
+    AIR_IGR_PORT_EG_TAG_ATTR_STACK,
+    AIR_IGR_PORT_EG_TAG_ATTR_LAST
+} AIR_IGR_PORT_EG_TAG_ATTR_T;
+
+typedef union AIR_VLAN_ENTRY_S
+{
+    UI8_T valid : 1;
+    struct
+    {
+        UI32_T  vlan_table0;
+        UI32_T  vlan_table1;
+    } vlan_table;
+    struct
+    {
+        UI64_T   valid             : 1;
+        UI64_T   fid               : 4;
+        UI64_T   ivl               : 1;
+        UI64_T   copy_pri          : 1;
+        UI64_T   user_pri          : 3;
+        UI64_T   eg_ctrl_en        : 1;
+        UI64_T   eg_con            : 1;
+        UI64_T   eg_ctrl           : 14;
+        UI64_T   port_mem          : 7;
+        UI64_T   port_stag         : 1;
+        UI64_T   stag              : 12;
+        UI64_T   unm_vlan_drop     : 1;
+    } vlan_entry_format;
+} AIR_VLAN_ENTRY_T;
+
+typedef union AIR_VLAN_ENTRY_ATTR_S
+{
+    UI8_T valid : 1;
+    struct
+    {
+        UI32_T  vlan_table0;
+        UI32_T  vlan_table1;
+        UI32_T  vlan_table2;
+        UI32_T  vlan_table3;
+        UI32_T  vlan_table4;
+    } vlan_table;
+    struct
+    {
+        UI64_T   valid             : 1;
+        UI64_T   fid               : 4;
+        UI64_T   ivl               : 1;
+        UI64_T   copy_pri          : 1;
+        UI64_T   user_pri          : 3;
+        UI64_T   eg_ctrl_en        : 1;
+        UI64_T   eg_con            : 1;
+        UI64_T   eg_ctrl           : 14;
+        UI64_T   port_mem          : 7;
+        UI64_T   port_stag         : 1;
+        UI64_T   stag              : 12;
+        UI64_T   unm_vlan_drop     : 1;
+    } vlan_entry_format;
+#if 0
+    struct
+    {
+        UI64_T   valid             : 1;
+        UI64_T   type              : 3;
+        UI64_T   mac_addr          : 48;
+        UI64_T   mac_mask_len      : 6;
+        UI64_T   priority          : 3;
+        UI64_T   :0;
+        UI64_T   vid               : 12;
+    } mac_based_vlan_entry_format;
+    struct
+    {
+        UI64_T   valid             : 1;
+        UI64_T   type              : 3;
+        UI64_T   check_field       : 36;
+        UI64_T   :0;
+        UI64_T   check_field_mask  : 36;
+        UI64_T   untagged_packet   : 1;
+        UI64_T   vlan_priority     : 3;
+        UI64_T   svid              : 12;
+    } qinq_based_vlan_entry_format;
+    struct
+    {
+        UI64_T   valid             : 1;
+        UI64_T   type              : 3;
+        UI64_T   ipv4              : 32;
+        UI64_T   :0;
+        UI64_T   subnetmask        : 32;
+        UI64_T   priority          : 3;
+        UI64_T   cvid              : 12;
+    } ipv4_based_vlan_entry_format;
+    struct
+    {
+        UI64_T   valid             : 1;
+        UI64_T   :0;
+        UI64_T   ipv6_high         : 64;
+        UI64_T   ipv6_low          : 64;
+        UI64_T   subnetmask        : 8;
+        UI64_T   priority          : 3;
+        UI64_T   cvid              : 12;
+    } ipv6_based_vlan_entry_format;
+#endif
+} AIR_VLAN_ENTRY_ATTR_T;
+
+void
+_air_vlan_readEntry(
+    const UI32_T unit,
+    const UI16_T vid,
+    AIR_VLAN_ENTRY_T* vlan_entry);
+
+void
+_air_vlan_writeEntry(
+    const UI32_T unit,
+    const UI16_T vid,
+    AIR_VLAN_ENTRY_T* vlan_entry);
+
+void
+_air_untagged_vlan_readEntry(
+    const UI32_T unit,
+    const UI16_T vid,
+    AIR_VLAN_ENTRY_ATTR_T* vlan_entry);
+
+void
+_air_untagged_vlan_writeEntry(
+    const UI32_T unit,
+    const UI16_T vid,
+    AIR_VLAN_ENTRY_ATTR_T* vlan_entry);
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+ */
+/* FUNCTION NAME:   air_vlan_create
+ * PURPOSE:
+ *      Create the vlan in the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      p_attr      -- vlan attr
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Vlan creation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_create(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    AIR_VLAN_ENTRY_ATTR_T *p_attr);
+
+/* FUNCTION NAME:   air_vlan_destroy
+ * PURPOSE:
+ *      Destroy the vlan in the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK     -- Successfully read the data.
+ *      AIR_E_OTHERS -- Vlan destroy failed.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_destroy(
+    const UI32_T    unit,
+    const UI16_T    vid);
+
+/* FUNCTION NAME:   air_vlan_destroyAll
+ * PURPOSE:
+ *      Destroy the vlan in the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK     -- Successfully read the data.
+ *      AIR_E_OTHERS -- Vlan destroy failed.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_destroyAll(
+    const UI32_T    unit,
+    const UI32_T    keep_and_restore_default_vlan);
+
+/* FUNCTION NAME:   air_vlan_reset
+ * PURPOSE:
+ *      Destroy the vlan in the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK     -- Successfully reset the data.
+ *      AIR_E_OTHERS -- Vlan reset failed.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_reset(
+    const UI32_T    unit,
+    const UI16_T    vid);
+
+/* FUNCTION NAME:   air_vlan_setFid
+ * PURPOSE:
+ *      Set the filter id of the vlan to the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      fid         -- filter id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setFid(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI8_T     fid);
+
+/* FUNCTION NAME:   air_vlan_getFid
+ * PURPOSE:
+ *      Get the filter id of the vlan from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id to be created
+ * OUTPUT:
+ *      p_fid       -- filter id
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getFid(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    UI8_T           *p_fid);
+
+/* FUNCTION NAME:   air_vlan_addMemberPort
+ * PURPOSE:
+ *      Add one vlan member to the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      port        -- port id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_addMemberPort(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI32_T    port);
+
+/* FUNCTION NAME:   air_vlan_delMemberPort
+ * PURPOSE:
+ *      Delete one vlan member from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      port        -- port id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_delMemberPort(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI32_T    port);
+
+/* FUNCTION NAME:   air_vlan_setMemberPort
+ * PURPOSE:
+ *      Replace the vlan members in the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      port_bitmap -- member port bitmap
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setMemberPort(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI32_T    port_bitmap);
+
+/* FUNCTION NAME:   air_vlan_getMemberPort
+ * PURPOSE:
+ *      Get the vlan members from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      port_bitmap -- member port bitmap
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getMemberPort(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    UI32_T          *p_port_bitmap);
+
+/* FUNCTION NAME:   air_vlan_setIVL
+ * PURPOSE:
+ *      Set L2 lookup mode IVL/SVL for L2 traffic.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      enable      -- enable IVL
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setIVL(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const BOOL_T    enable);
+
+/* FUNCTION NAME:   air_vlan_getIVL
+ * PURPOSE:
+ *      Get L2 lookup mode IVL/SVL for L2 traffic.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      p_enable    -- enable IVL
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getIVL(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    BOOL_T          *p_enable);
+
+/* FUNCTION NAME:   air_vlan_setPortAcceptFrameType
+ * PURPOSE:
+ *      Set vlan accept frame type of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      type        -- accept frame type
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortAcceptFrameType(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const AIR_VLAN_ACCEPT_FRAME_TYPE_T type);
+
+/* FUNCTION NAME:   air_vlan_getPortAcceptFrameType
+ * PURPOSE:
+ *      Get vlan accept frame type of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      p_type      -- accept frame type
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortAcceptFrameType(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_VLAN_ACCEPT_FRAME_TYPE_T *p_type);
+
+/* FUNCTION NAME:   air_vlan_setPortLeakyVlanEnable
+ * PURPOSE:
+ *      Set leaky vlan enable of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      pkt_type    -- packet type
+ *      enable      -- enable leaky
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortLeakyVlanEnable(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_LEAKY_PKT_TYPE_T   pkt_type,
+    const BOOL_T    enable);
+
+/* FUNCTION NAME:   air_vlan_getPortLeakyVlanEnable
+ * PURPOSE:
+ *      Get leaky vlan enable of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      pkt_type    -- packet type
+ * OUTPUT:
+ *      p_enable    -- enable leaky
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortLeakyVlanEnable(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_LEAKY_PKT_TYPE_T   pkt_type,
+    BOOL_T          *p_enable);
+
+/* FUNCTION NAME:   air_vlan_setPortAttr
+ * PURPOSE:
+ *      Set vlan port attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      attr        -- vlan port attr
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const AIR_VLAN_PORT_ATTR_T attr);
+
+/* FUNCTION NAME:   air_vlan_getPortAttr
+ * PURPOSE:
+ *      Get vlan port attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      p_attr      -- vlan port attr
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_VLAN_PORT_ATTR_T *p_attr);
+
+/* FUNCTION NAME:   air_vlan_setIgrPortTagAttr
+ * PURPOSE:
+ *      Set vlan incoming port egress tag attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      attr        -- egress tag attr
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setIgrPortTagAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const AIR_IGR_PORT_EG_TAG_ATTR_T attr);
+
+/* FUNCTION NAME:   air_vlan_getIgrPortTagAttr
+ * PURPOSE:
+ *      Get vlan incoming port egress tag attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      p_attr      -- egress tag attr
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getIgrPortTagAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_IGR_PORT_EG_TAG_ATTR_T *p_attr);
+
+/* FUNCTION NAME:   air_vlan_setPortEgsTagAttr
+ * PURPOSE:
+ *      Set vlan port egress tag attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      attr        -- egress tag attr
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortEgsTagAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const AIR_PORT_EGS_TAG_ATTR_T attr);
+
+/* FUNCTION NAME:   air_vlan_getPortEgsTagAttr
+ * PURPOSE:
+ *      Get vlan port egress tag attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      p_attr      -- egress tag attr
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortEgsTagAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_PORT_EGS_TAG_ATTR_T *p_attr);
+
+/* FUNCTION NAME:   air_vlan_setPortOuterTPID
+ * PURPOSE:
+ *      Set stack tag TPID of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      tpid        -- TPID
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortOuterTPID(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const UI16_T    tpid);
+
+/* FUNCTION NAME:   air_vlan_getPortOuterTPID
+ * PURPOSE:
+ *      Get stack tag TPID of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      p_tpid        -- TPID
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortOuterTPID(
+    const UI32_T    unit,
+    const UI32_T    port,
+    UI16_T          *p_tpid);
+
+/* FUNCTION NAME:   air_vlan_setPortPVID
+ * PURPOSE:
+ *      Set PVID of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      pvid        -- native vlan id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortPVID(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const UI16_T    pvid);
+
+/* FUNCTION NAME:   air_vlan_getPortPVID
+ * PURPOSE:
+ *      Get PVID of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      p_pvid      -- native vlan id
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortPVID(
+    const UI32_T    unit,
+    const UI32_T    port,
+    UI16_T          *p_pvid);
+
+/* FUNCTION NAME:   air_vlan_setServiceTag
+ * PURPOSE:
+ *      Set Vlan service tag.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      stag        -- service stag
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setServiceTag(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI16_T    stag);
+
+/* FUNCTION NAME:   air_vlan_getServiceTag
+ * PURPOSE:
+ *      Get Vlan service tag.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      p_stag      -- service stag
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getServiceTag(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    UI16_T          *p_stag);
+
+/* FUNCTION NAME:   air_vlan_setEgsTagCtlEnable
+ * PURPOSE:
+ *      Set per vlan egress tag control.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      enable      -- enable vlan egress tag control
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setEgsTagCtlEnable(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const BOOL_T    enable);
+
+/* FUNCTION NAME:   air_vlan_getEgsTagCtlEnable
+ * PURPOSE:
+ *      Get per vlan egress tag control.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      p_enable    -- enable vlan egress tag control
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getEgsTagCtlEnable(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    BOOL_T          *p_enable);
+
+/* FUNCTION NAME:   air_vlan_setEgsTagConsistent
+ * PURPOSE:
+ *      Set per vlan egress tag consistent.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      enable      -- enable vlan egress tag consistent
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setEgsTagConsistent(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const BOOL_T    enable);
+
+/* FUNCTION NAME:   air_vlan_getEgsTagConsistent
+ * PURPOSE:
+ *      Get per vlan egress tag consistent.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      p_enable    -- enable vlan egress tag consistent
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getEgsTagConsistent(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    BOOL_T          *p_enable);
+
+/* FUNCTION NAME:   air_vlan_setPortBasedStag
+ * PURPOSE:
+ *      Set vlan port based stag enable.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      enable      -- vlan port based stag enable
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortBasedStag(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const BOOL_T    enable);
+
+/* FUNCTION NAME:   air_vlan_getPortBasedStag
+ * PURPOSE:
+ *      Get vlan port based stag enable.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      p_enable    -- vlan port based stag enable
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortBasedStag(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    BOOL_T          *p_enable);
+
+/* FUNCTION NAME:   air_vlan_setPortEgsTagCtl
+ * PURPOSE:
+ *      Set vlan port egress tag control.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      port        -- port id
+ *      tag_ctl     -- egress tag control
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortEgsTagCtl(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI32_T    port,
+    const AIR_VLAN_PORT_EGS_TAG_CTL_TYPE_T    tag_ctl);
+
+/* FUNCTION NAME:   air_vlan_getPortEgsTagCtl
+ * PURPOSE:
+ *      Get vlan port egress tag control.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      p_tag_ctl   -- egress tag control
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortEgsTagCtl(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI32_T    port,
+    AIR_VLAN_PORT_EGS_TAG_CTL_TYPE_T   *ptr_tag_ctl);
+
+#endif  /* AIR_VLAN_H */
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_acl.c b/feed/app/switch/src/an8855_sdk/api/src/air_acl.c
new file mode 100644
index 0000000..9be3e0f
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_acl.c
@@ -0,0 +1,2032 @@
+/* FILE NAME: air_acl.c
+ * PURPOSE:
+ *      Define the ACL function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+#define ACL_DERIVE_TBL_MULTIFIELDS(data_buffer, offset, width, dst)             \
+({                                                                              \
+    UI32_T value = 0;                                                           \
+    _deriveTblMultiFields((data_buffer), (offset), (width), &value);            \
+    dst = value;                                                                \
+})
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM BODIES
+*/
+static AIR_ERROR_NO_T
+_checkDone(
+    const UI32_T unit,
+    const AIR_ACL_CHECK_TYPE_T type)
+{
+    UI32_T check_bit = 0, i = 0, reg = 0, value = 0, offset = 0;
+
+    switch(type)
+    {
+        case AIR_ACL_CHECK_ACL:
+            check_bit = 1;
+            reg = ACL_MEM_CFG;
+            offset = ACL_MEM_CFG_DONE_OFFSET;
+            break;
+        case AIR_ACL_CHECK_UDF:
+            check_bit = 0;
+            reg = ACL_AUTC;
+            offset = ACL_UDF_ACC_OFFSET;
+            break;
+        case AIR_ACL_CHECK_TRTCM:
+            check_bit = 0;
+            reg = ACL_TRTCMA;
+            offset = ACL_TRTCM_BUSY_OFFSET;
+            break;
+        case AIR_ACL_CHECK_METER:
+            check_bit = 0;
+            reg = ACLRMC;
+            offset = ACL_RATE_BUSY_OFFSET;
+            break;
+        default:
+            return AIR_E_BAD_PARAMETER;
+    }
+    for(i=0; i < ACL_MAX_BUSY_TIME; i++)
+    {
+        aml_readReg(unit, reg, &value);
+        if (check_bit == (value >> offset))
+        {
+            break;
+        }
+        AIR_UDELAY(1);
+    }
+    if(i >= ACL_MAX_BUSY_TIME)
+    {
+        return AIR_E_TIMEOUT;
+    }
+    return AIR_E_OK;
+}
+
+static void
+_convertToTCcell(
+    const UI32_T *data0,
+    const UI32_T *data1,
+    UI32_T *arr0,
+    UI32_T *arr1,
+    UI32_T size)
+{
+    UI32_T i = 0;
+
+    for(i = 0; i < size; i++)
+    {
+        arr0[i] = data0[i] | (~data1[i]);
+        arr1[i] = (~data0[i]) | (~data1[i]);
+    }
+}
+
+static void
+_parseFromTCcell(
+    const UI32_T *data0,
+    const UI32_T *data1,
+    UI32_T *arr0,
+    UI32_T *arr1,
+    UI32_T size)
+{
+    UI32_T i = 0;
+
+    for(i = 0; i < size; i++)
+    {
+        arr1[i] = ~(data0[i] & data1[i]);
+        arr0[i] = data0[i] | (~arr1[i]);
+    }
+}
+
+static int
+_fillTblMultiFields(
+    UI32_T          *data_buffer,
+    UI32_T          data_count,
+    const UI32_T    offset,
+    const UI32_T    width,
+    const UI32_T    value)
+{
+    UI32_T data_index = 0, bit_index = 0;
+    UI32_T extended_data[2] = {0};
+    UI32_T extended_mask[2] = {0};
+    UI32_T msk;
+    UI32_T val;
+
+    AIR_CHECK_PTR(data_buffer);
+
+    if((0 == data_count) || (0 == width) || (width > 32) || (offset+width > data_count*32))
+    {
+        return 0;
+    }
+
+    msk = ((1U<<(width-1U))<<1U)-1U;
+    val = value & msk;
+    data_index = offset / 32;
+    bit_index = offset % 32;
+
+    extended_data[0] = val << bit_index;
+    extended_data[1] = (val >> (31U-bit_index))>>1U;
+    extended_mask[0] = msk << bit_index;
+    extended_mask[1] = (msk >> (31U-bit_index))>>1U;
+
+    data_buffer[data_index] = (data_buffer[data_index] & ~extended_mask[0]) | extended_data[0];
+    if ((data_index+1)<data_count)
+    {
+        data_buffer[data_index+1] = (data_buffer[data_index+1] & ~extended_mask[1]) | extended_data[1];
+    }
+
+    return 0;
+}
+
+static int
+_deriveTblMultiFields(
+    UI32_T          *data_buffer,
+    const UI32_T    offset,
+    const UI32_T    width,
+    UI32_T          *ptr_value)
+{
+    UI32_T data_index = 0, bit_index = 0;
+    UI32_T extended_data[2] = {0};
+    UI32_T extended_mask[2] = {0};
+    UI32_T msk = 0;
+
+    AIR_CHECK_PTR(data_buffer);
+    AIR_CHECK_PTR(ptr_value);
+
+    if(width==0 || width>32)
+    {
+        return 0;
+    }
+    msk = ((1U<<(width-1U))<<1U)-1U;
+    data_index = offset / 32;
+    bit_index = offset % 32;
+
+    extended_mask[0] = msk << bit_index;
+    extended_mask[1] = (msk >> (31U-bit_index))>>1U;
+    extended_data[0] = (data_buffer[data_index] & extended_mask[0]) >> bit_index;
+    extended_data[1] = ((data_buffer[data_index+1] & extended_mask[1]) << (31U-bit_index))<<1U;
+
+    *ptr_value = extended_data[0] | extended_data[1];
+    return 0;
+}
+
+static void
+_air_acl_setRuleTable(
+    const AIR_ACL_RULE_TYPE_T type,
+    const BOOL_T iskey,
+    const AIR_ACL_FIELD_T *ptr_field,
+    UI32_T *data)
+{
+    UI32_T n = 0;
+
+    switch(type)
+    {
+        case AIR_ACL_RULE_TYPE_0:
+            if(TRUE == iskey)
+            {
+                _fillTblMultiFields(data, 12, RULE_TYPE0_OFFSET, RULE_TYPE0_WIDTH, 0);
+            }
+            else
+            {
+                _fillTblMultiFields(data, 12, RULE_TYPE0_OFFSET, RULE_TYPE0_WIDTH, 1);
+            }
+            for(n=0; n<6; n++)
+            {
+                _fillTblMultiFields(data, 12, DMAC_OFFSET + DMAC_WIDTH*(5-n), DMAC_WIDTH, ptr_field->dmac[n]);
+            }
+            for(n=0; n<6; n++)
+            {
+                _fillTblMultiFields(data, 12, SMAC_OFFSET + SMAC_WIDTH*(5-n), SMAC_WIDTH, ptr_field->smac[n]);
+            }
+            _fillTblMultiFields(data, 12, STAG_OFFSET, STAG_WIDTH, ptr_field->stag);
+            _fillTblMultiFields(data, 12, CTAG_OFFSET, CTAG_WIDTH, ptr_field->ctag);
+            _fillTblMultiFields(data, 12, ETYPE_OFFSET, ETYPE_WIDTH, ptr_field->etype);
+            _fillTblMultiFields(data, 12, DIP_OFFSET, DIP_WIDTH, ptr_field->dip[0]);
+            _fillTblMultiFields(data, 12, SIP_OFFSET, SIP_WIDTH, ptr_field->sip[0]);
+            _fillTblMultiFields(data, 12, DSCP_OFFSET, DSCP_WIDTH, ptr_field->dscp);
+            _fillTblMultiFields(data, 12, PROTOCOL_OFFSET, PROTOCOL_WIDTH, ptr_field->protocol);
+            _fillTblMultiFields(data, 12, DPORT_OFFSET, DPORT_WIDTH, ptr_field->dport);
+            _fillTblMultiFields(data, 12, SPORT_OFFSET, SPORT_WIDTH, ptr_field->sport);
+            _fillTblMultiFields(data, 12, UDF_OFFSET, UDF_WIDTH, ptr_field->udf);
+            _fillTblMultiFields(data, 12, FIELDMAP_OFFSET, FIELDMAP_WIDTH, ptr_field->fieldmap);
+            _fillTblMultiFields(data, 12, IS_IPV6_OFFSET, IS_IPV6_WIDTH, ptr_field->isipv6);
+            _fillTblMultiFields(data, 12, PORTMAP_OFFSET, PORTMAP_WIDTH, ptr_field->portmap);
+            break;
+         case AIR_ACL_RULE_TYPE_1:
+            _fillTblMultiFields(data, 12, RULE_TYPE1_OFFSET, RULE_TYPE1_WIDTH, 1);
+            for(n=1; n<4; n++)
+            {
+                _fillTblMultiFields(data, 12, DIP_IPV6_OFFSET + DIP_IPV6_WIDTH*(n-1), DIP_IPV6_WIDTH, ptr_field->dip[n]);
+            }
+            for(n=1; n<4; n++)
+            {
+                _fillTblMultiFields(data, 12, SIP_IPV6_OFFSET + SIP_IPV6_WIDTH*(n-1), SIP_IPV6_WIDTH, ptr_field->sip[n]);
+            }
+            _fillTblMultiFields(data, 12, FLOW_LABEL_OFFSET, FLOW_LABEL_WIDTH, ptr_field->flow_label);
+            break;
+        default:
+            return;
+    }
+}
+
+static void
+_air_acl_getRuleTable(
+    const AIR_ACL_RULE_TYPE_T type,
+    UI32_T *data,
+    AIR_ACL_FIELD_T *ptr_field)
+{
+    UI32_T n = 0;
+
+    switch(type)
+    {
+        case AIR_ACL_RULE_TYPE_0:
+            for(n=0; n<6; n++)
+            {
+                ACL_DERIVE_TBL_MULTIFIELDS(data, DMAC_OFFSET + DMAC_WIDTH*(5-n), DMAC_WIDTH, ptr_field->dmac[n]);
+            }
+            for(n=0; n<6; n++)
+            {
+                ACL_DERIVE_TBL_MULTIFIELDS(data, SMAC_OFFSET + SMAC_WIDTH*(5-n), SMAC_WIDTH, ptr_field->smac[n]);
+            }
+            ACL_DERIVE_TBL_MULTIFIELDS(data, STAG_OFFSET, STAG_WIDTH, ptr_field->stag);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, CTAG_OFFSET, CTAG_WIDTH, ptr_field->ctag);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, ETYPE_OFFSET, ETYPE_WIDTH, ptr_field->etype);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, DIP_OFFSET, DIP_WIDTH, ptr_field->dip[0]);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, SIP_OFFSET, SIP_WIDTH, ptr_field->sip[0]);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, DSCP_OFFSET, DSCP_WIDTH, ptr_field->dscp);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, PROTOCOL_OFFSET, PROTOCOL_WIDTH, ptr_field->protocol);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, DPORT_OFFSET, DPORT_WIDTH, ptr_field->dport);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, SPORT_OFFSET, SPORT_WIDTH, ptr_field->sport);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, UDF_OFFSET, UDF_WIDTH, ptr_field->udf);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, FIELDMAP_OFFSET, FIELDMAP_WIDTH, ptr_field->fieldmap);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, IS_IPV6_OFFSET, IS_IPV6_WIDTH, ptr_field->isipv6);
+            ACL_DERIVE_TBL_MULTIFIELDS(data, PORTMAP_OFFSET, PORTMAP_WIDTH, ptr_field->portmap);
+            break;
+         case AIR_ACL_RULE_TYPE_1:
+            for(n=1; n<4; n++)
+            {
+                ACL_DERIVE_TBL_MULTIFIELDS(data, DIP_IPV6_OFFSET + DIP_IPV6_WIDTH*(n-1), DIP_IPV6_WIDTH, ptr_field->dip[n]);
+            }
+            for(n=1; n<4; n++)
+            {
+                ACL_DERIVE_TBL_MULTIFIELDS(data, SIP_IPV6_OFFSET + SIP_IPV6_WIDTH*(n-1), SIP_IPV6_WIDTH, ptr_field->sip[n]);
+            }
+            ACL_DERIVE_TBL_MULTIFIELDS(data, FLOW_LABEL_OFFSET, FLOW_LABEL_WIDTH, ptr_field->flow_label);
+            break;
+        default:
+            return;
+    }
+}
+
+static void
+_air_acl_setActionTable(
+    const AIR_ACL_ACTION_T *ptr_action,
+    UI32_T *data)
+{
+    int i = 0;
+
+    _fillTblMultiFields(data, 4, PORT_FORCE_OFFSET, PORT_FORCE_WIDTH, ptr_action->port_en);
+    _fillTblMultiFields(data, 4, VLAN_PORT_SWAP_OFFSET, VLAN_PORT_SWAP_WIDTH, ptr_action->vlan_port_sel);
+    _fillTblMultiFields(data, 4, DST_PORT_SWAP_OFFSET, DST_PORT_SWAP_WIDTH, ptr_action->dest_port_sel);
+    _fillTblMultiFields(data, 4, PORT_OFFSET, PORT_WIDTH, ptr_action->portmap);
+
+    _fillTblMultiFields(data, 4, ACL_MIB_EN_OFFSET, ACL_MIB_EN_WIDTH, ptr_action->cnt_en);
+    _fillTblMultiFields(data, 4, ACL_MIB_ID_OFFSET, ACL_MIB_ID_WIDTH, ptr_action->cnt_idx);
+
+    _fillTblMultiFields(data, 4, ATTACK_RATE_EN_OFFSET, ATTACK_RATE_EN_WIDTH, ptr_action->attack_en);
+    _fillTblMultiFields(data, 4, ATTACK_RATE_ID_OFFSET, ATTACK_RATE_ID_WIDTH, ptr_action->attack_idx);
+
+    _fillTblMultiFields(data, 4, RATE_EN_OFFSET, RATE_EN_WIDTH, ptr_action->rate_en);
+    _fillTblMultiFields(data, 4, RATE_INDEX_OFFSET, RATE_INDEX_WIDTH, ptr_action->rate_idx);
+
+    _fillTblMultiFields(data, 4, PORT_FW_EN_OFFSET, PORT_FW_EN_WIDTH, ptr_action->fwd_en);
+    _fillTblMultiFields(data, 4, FW_PORT_OFFSET, FW_PORT_WIDTH, ptr_action->fwd);
+
+    _fillTblMultiFields(data, 4, MIRROR_OFFSET, MIRROR_WIDTH, ptr_action->mirrormap);
+
+    _fillTblMultiFields(data, 4, PRI_USER_EN_OFFSET, PRI_USER_EN_WIDTH, ptr_action->pri_user_en);
+    _fillTblMultiFields(data, 4, PRI_USER_OFFSET, PRI_USER_WIDTH, ptr_action->pri_user);
+
+    _fillTblMultiFields(data, 4, EG_TAG_EN_OFFSET, EG_TAG_EN_WIDTH, ptr_action->egtag_en);
+    _fillTblMultiFields(data, 4, EG_TAG_OFFSET, EG_TAG_WIDTH, ptr_action->egtag);
+
+    _fillTblMultiFields(data, 4, LKY_VLAN_EN_OFFSET, LKY_VLAN_EN_WIDTH, ptr_action->lyvlan_en);
+    _fillTblMultiFields(data, 4, LKY_VLAN_OFFSET, LKY_VLAN_WIDTH, ptr_action->lyvlan);
+
+    _fillTblMultiFields(data, 4, BPDU_OFFSET, BPDU_WIDTH, ptr_action->bpdu);
+
+    _fillTblMultiFields(data, 4, ACL_MANG_OFFSET, ACL_MANG_WIDTH, ptr_action->mang);
+
+    _fillTblMultiFields(data, 4, TRTCM_EN_OFFSET, TRTCM_EN_WIDTH, ptr_action->trtcm_en);
+    _fillTblMultiFields(data, 4, DROP_PCD_SEL_OFFSET, DROP_PCD_SEL_WIDTH, ptr_action->trtcm.drop_pcd_sel);
+    _fillTblMultiFields(data, 4, ACL_DROP_PCD_R_OFFSET, ACL_DROP_PCD_R_WIDTH, ptr_action->trtcm.drop_pcd_r);
+    _fillTblMultiFields(data, 4, ACL_DROP_PCD_Y_OFFSET, ACL_DROP_PCD_Y_WIDTH, ptr_action->trtcm.drop_pcd_y);
+    _fillTblMultiFields(data, 4, ACL_DROP_PCD_G_OFFSET, ACL_DROP_PCD_G_WIDTH, ptr_action->trtcm.drop_pcd_g);
+    _fillTblMultiFields(data, 4, CLASS_SLR_SEL_OFFSET, CLASS_SLR_SEL_WIDTH, ptr_action->trtcm.cls_slr_sel);
+    _fillTblMultiFields(data, 4, CLASS_SLR_OFFSET, CLASS_SLR_WIDTH, ptr_action->trtcm.cls_slr);
+    _fillTblMultiFields(data, 4, ACL_TCM_SEL_OFFSET, ACL_TCM_SEL_WIDTH, ptr_action->trtcm.tcm_sel);
+    _fillTblMultiFields(data, 4, ACL_TCM_OFFSET, ACL_TCM_WIDTH, ptr_action->trtcm.usr_tcm);
+    _fillTblMultiFields(data, 4, ACL_CLASS_IDX_OFFSET, ACL_CLASS_IDX_WIDTH, ptr_action->trtcm.tcm_idx);
+
+    _fillTblMultiFields(data, 4, ACL_VLAN_HIT_OFFSET, ACL_VLAN_HIT_WIDTH, ptr_action->vlan_en);
+    _fillTblMultiFields(data, 4, ACL_VLAN_VID_OFFSET, ACL_VLAN_VID_WIDTH, ptr_action->vlan_idx);
+}
+
+static void
+_air_acl_getActionTable(
+    UI32_T *data,
+    AIR_ACL_ACTION_T *ptr_action)
+{
+    ACL_DERIVE_TBL_MULTIFIELDS(data, PORT_FORCE_OFFSET, PORT_FORCE_WIDTH, ptr_action->port_en);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, VLAN_PORT_SWAP_OFFSET, VLAN_PORT_SWAP_WIDTH, ptr_action->vlan_port_sel);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, DST_PORT_SWAP_OFFSET, DST_PORT_SWAP_WIDTH, ptr_action->dest_port_sel);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, PORT_OFFSET, PORT_WIDTH, ptr_action->portmap);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ACL_MIB_EN_OFFSET, ACL_MIB_EN_WIDTH, ptr_action->cnt_en);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ACL_MIB_ID_OFFSET, ACL_MIB_ID_WIDTH, ptr_action->cnt_idx);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ATTACK_RATE_EN_OFFSET, ATTACK_RATE_EN_WIDTH, ptr_action->attack_en);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ATTACK_RATE_ID_OFFSET, ATTACK_RATE_ID_WIDTH, ptr_action->attack_idx);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, RATE_EN_OFFSET, RATE_EN_WIDTH, ptr_action->rate_en);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, RATE_INDEX_OFFSET, RATE_INDEX_WIDTH, ptr_action->rate_idx);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, PORT_FW_EN_OFFSET, PORT_FW_EN_WIDTH, ptr_action->fwd_en);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, FW_PORT_OFFSET, FW_PORT_WIDTH, ptr_action->fwd);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, MIRROR_OFFSET, MIRROR_WIDTH, ptr_action->mirrormap);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, PRI_USER_EN_OFFSET, PRI_USER_EN_WIDTH, ptr_action->pri_user_en);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, PRI_USER_OFFSET, PRI_USER_WIDTH, ptr_action->pri_user);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, EG_TAG_EN_OFFSET, EG_TAG_EN_WIDTH, ptr_action->egtag_en);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, EG_TAG_OFFSET, EG_TAG_WIDTH, ptr_action->egtag);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, LKY_VLAN_EN_OFFSET, LKY_VLAN_EN_WIDTH, ptr_action->lyvlan_en);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, LKY_VLAN_OFFSET, LKY_VLAN_WIDTH, ptr_action->lyvlan);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, BPDU_OFFSET, BPDU_WIDTH, ptr_action->bpdu);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ACL_MANG_OFFSET, ACL_MANG_WIDTH, ptr_action->mang);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, TRTCM_EN_OFFSET, TRTCM_EN_WIDTH, ptr_action->trtcm_en);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, DROP_PCD_SEL_OFFSET, DROP_PCD_SEL_WIDTH, ptr_action->trtcm.drop_pcd_sel);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ACL_DROP_PCD_R_OFFSET, ACL_DROP_PCD_R_WIDTH, ptr_action->trtcm.drop_pcd_r);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ACL_DROP_PCD_Y_OFFSET, ACL_DROP_PCD_Y_WIDTH, ptr_action->trtcm.drop_pcd_y);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ACL_DROP_PCD_G_OFFSET, ACL_DROP_PCD_G_WIDTH, ptr_action->trtcm.drop_pcd_g);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, CLASS_SLR_SEL_OFFSET, CLASS_SLR_SEL_WIDTH, ptr_action->trtcm.cls_slr_sel);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, CLASS_SLR_OFFSET, CLASS_SLR_WIDTH, ptr_action->trtcm.cls_slr);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ACL_TCM_SEL_OFFSET, ACL_TCM_SEL_WIDTH, ptr_action->trtcm.tcm_sel);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ACL_TCM_OFFSET, ACL_TCM_WIDTH, ptr_action->trtcm.usr_tcm);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ACL_CLASS_IDX_OFFSET, ACL_CLASS_IDX_WIDTH, ptr_action->trtcm.tcm_idx);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ACL_VLAN_HIT_OFFSET, ACL_VLAN_HIT_WIDTH, ptr_action->vlan_en);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, ACL_VLAN_VID_OFFSET, ACL_VLAN_VID_WIDTH, ptr_action->vlan_idx);
+
+}
+
+static AIR_ERROR_NO_T
+_air_acl_writeReg(
+    const UI32_T unit,
+    const UI32_T rule_idx,
+    const UI32_T block_num,
+    const AIR_ACL_RULE_TCAM_T type,
+    const AIR_ACL_MEM_SEL_T sel,
+    const AIR_ACL_MEM_FUNC_T func,
+    const UI32_T *data)
+{
+    UI32_T bn = 0, value = 0;
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+
+    for (bn = 0; bn < block_num; bn++)
+    {
+        if(AIR_E_TIMEOUT == _checkDone(unit, AIR_ACL_CHECK_ACL))
+        {
+            return AIR_E_TIMEOUT;
+        }
+        aml_writeReg(unit, ACL_MEM_CFG_WDATA0, data[bn*4]);
+        aml_writeReg(unit, ACL_MEM_CFG_WDATA1, data[bn*4+1]);
+        aml_writeReg(unit, ACL_MEM_CFG_WDATA2, data[bn*4+2]);
+        aml_writeReg(unit, ACL_MEM_CFG_WDATA3, data[bn*4+3]);
+
+        value = (rule_idx << ACL_MEM_CFG_RULE_ID_OFFSET) | (type << ACL_MEM_CFG_TCAM_CELL_OFFSET) |
+            (bn << ACL_MEM_CFG_DATA_BN_OFFSET) | (sel << ACL_MEM_CFG_MEM_SEL_OFFSET) |
+            (func << ACL_MEM_CFG_FUNC_SEL_OFFSET) | ACL_MEM_CFG_EN;
+        if ((ret = aml_writeReg(unit, ACL_MEM_CFG, value)) != AIR_E_OK)
+        {
+            return ret;
+        }
+    }
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+_air_acl_readReg(
+    const UI32_T unit,
+    const UI32_T rule_idx,
+    const UI32_T block_num,
+    const AIR_ACL_RULE_TCAM_T type,
+    const AIR_ACL_MEM_SEL_T sel,
+    const AIR_ACL_MEM_FUNC_T func,
+    UI32_T *data)
+{
+    UI32_T bn = 0, value = 0;
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+
+    for (bn = 0; bn < block_num; bn++)
+    {
+        value = (rule_idx << ACL_MEM_CFG_RULE_ID_OFFSET) | (type << ACL_MEM_CFG_TCAM_CELL_OFFSET) |
+            (bn << ACL_MEM_CFG_DATA_BN_OFFSET) | (sel << ACL_MEM_CFG_MEM_SEL_OFFSET) |
+            (func << ACL_MEM_CFG_FUNC_SEL_OFFSET) | ACL_MEM_CFG_EN;
+        if ((ret = aml_writeReg(unit, ACL_MEM_CFG, value)) != AIR_E_OK)
+        {
+            return ret;
+        }
+        if(AIR_E_TIMEOUT == _checkDone(unit, AIR_ACL_CHECK_ACL))
+        {
+            return AIR_E_TIMEOUT;
+        }
+        aml_readReg(unit, ACL_MEM_CFG_RDATA0, data+bn*4);
+        aml_readReg(unit, ACL_MEM_CFG_RDATA1, data+bn*4+1);
+        aml_readReg(unit, ACL_MEM_CFG_RDATA2, data+bn*4+2);
+        aml_readReg(unit, ACL_MEM_CFG_RDATA3, data+bn*4+3);
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_setRuleCtrl
+ * PURPOSE:
+ *      Set ACL rule control.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      rule_idx        --  Index of ACL rule entry
+ *      ptr_rule        --  Structure of ACL rule control
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setRuleCtrl(
+    const UI32_T unit,
+    const UI32_T rule_idx,
+    AIR_ACL_CTRL_T *ptr_ctrl)
+{
+    UI32_T data_en[4] = {0}, data_end[4] = {0}, data_rev[4] = {0};
+
+    if(TRUE == ptr_ctrl->rule_en)
+    {
+        _air_acl_readReg(unit, AIR_ACL_RULE_CONFIG_ENABLE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_READ, data_en);
+        data_en[rule_idx/32] |= (1 << (rule_idx%32));
+        _air_acl_writeReg(unit, AIR_ACL_RULE_CONFIG_ENABLE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_WRITE, data_en);
+    }
+    else
+    {
+        _air_acl_readReg(unit, AIR_ACL_RULE_CONFIG_ENABLE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_READ, data_en);
+        data_en[rule_idx/32] &= ~(1 << (rule_idx%32));
+        _air_acl_writeReg(unit, AIR_ACL_RULE_CONFIG_ENABLE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_WRITE, data_en);
+    }
+
+    if(TRUE == ptr_ctrl->end)
+    {
+        _air_acl_readReg(unit, AIR_ACL_RULE_CONFIG_END, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_READ, data_end);
+        data_end[rule_idx/32] |= (1 << (rule_idx%32));
+        _air_acl_writeReg(unit, AIR_ACL_RULE_CONFIG_END, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_WRITE, data_end);
+    }
+    else
+    {
+        _air_acl_readReg(unit, AIR_ACL_RULE_CONFIG_END, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_READ, data_end);
+        data_end[rule_idx/32] &= ~(1 << (rule_idx%32));
+        _air_acl_writeReg(unit, AIR_ACL_RULE_CONFIG_END, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_WRITE, data_end);
+
+    }
+
+    if(TRUE == ptr_ctrl->reverse)
+    {
+        _air_acl_readReg(unit, AIR_ACL_RULE_CONFIG_REVERSE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_READ, data_rev);
+        data_rev[rule_idx/32] |= (1 << (rule_idx%32));
+        _air_acl_writeReg(unit, AIR_ACL_RULE_CONFIG_REVERSE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_WRITE, data_rev);
+    }
+    else
+    {
+        _air_acl_readReg(unit, AIR_ACL_RULE_CONFIG_REVERSE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_READ, data_rev);
+        data_rev[rule_idx/32] &= ~(1 << (rule_idx%32));
+        _air_acl_writeReg(unit, AIR_ACL_RULE_CONFIG_REVERSE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_WRITE, data_rev);
+    }
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_getRuleCtrl
+ * PURPOSE:
+ *      Get ACL rule control.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      rule_idx        --  Index of ACL rule entry
+ *
+ * OUTPUT:
+ *      ptr_ctrl        --  Structure of ACL rule control
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getRuleCtrl(
+    const UI32_T unit,
+    const UI32_T rule_idx,
+    AIR_ACL_CTRL_T *ptr_ctrl)
+{
+    UI32_T data_en[4] = {0}, data_end[4] = {0}, data_rev[4] = {0};
+
+    _air_acl_readReg(unit, AIR_ACL_RULE_CONFIG_ENABLE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_READ, data_en);
+    if(data_en[rule_idx/32] & (1 << (rule_idx%32)))
+    {
+        ptr_ctrl->rule_en = TRUE;
+    }
+    else
+    {
+        ptr_ctrl->rule_en = FALSE;
+    }
+
+    _air_acl_readReg(unit, AIR_ACL_RULE_CONFIG_END, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_READ, data_end);
+    if(data_end[rule_idx/32] & (1 << (rule_idx%32)))
+    {
+        ptr_ctrl->end = TRUE;
+    }
+    else
+    {
+        ptr_ctrl->end = FALSE;
+    }
+
+    _air_acl_readReg(unit, AIR_ACL_RULE_CONFIG_REVERSE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_READ, data_rev);
+    if(data_rev[rule_idx/32] & (1 << (rule_idx%32)))
+    {
+        ptr_ctrl->reverse = TRUE;
+    }
+    else
+    {
+        ptr_ctrl->reverse = FALSE;
+    }
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_setRule
+ * PURPOSE:
+ *      Set ACL rule entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      rule_idx        --  Index of ACL rule entry
+ *      rule            --  Structure of ACL rule entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setRule(
+    const UI32_T            unit,
+    const UI32_T            rule_idx,
+    AIR_ACL_RULE_T          *rule)
+{
+    UI32_T  type0_key[12] = {0}, type0_mask[12] = {0};
+    UI32_T  type1_key[12] = {0}, type1_mask[12] = {0};
+    UI32_T  type0_t[12] = {0}, type0_c[12] = {0};
+    UI32_T  type1_t[12] = {0}, type1_c[12] = {0};
+    AIR_ACL_CTRL_T ctrl;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((rule_idx >= ACL_MAX_RULE_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((rule->key.flow_label > BITS_RANGE(0, FLOW_LABEL_WIDTH)), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((rule->key.fieldmap > BITS_RANGE(0, AIR_ACL_FIELD_TYPE_LAST)), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != rule->key.isipv6) && (FALSE != rule->key.isipv6), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((rule->key.portmap & (~AIR_ALL_PORT_BITMAP)), AIR_E_BAD_PARAMETER);
+
+    AIR_PARAM_CHK((TRUE != rule->ctrl.rule_en) && (FALSE != rule->ctrl.rule_en), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != rule->ctrl.reverse) && (FALSE != rule->ctrl.reverse), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != rule->ctrl.end) && (FALSE != rule->ctrl.end), AIR_E_BAD_PARAMETER);
+
+    memset(type0_key, 0, sizeof(type0_key));
+    memset(type0_mask, 0, sizeof(type0_mask));
+    memset(type1_key, 0, sizeof(type1_key));
+    memset(type1_mask, 0, sizeof(type1_mask));
+
+    memset(type0_t, 0, sizeof(type0_t));
+    memset(type0_c, 0, sizeof(type0_c));
+    memset(type1_t, 0, sizeof(type1_t));
+    memset(type1_c, 0, sizeof(type1_c));
+
+    /* Fill rule type table */
+    _air_acl_setRuleTable(AIR_ACL_RULE_TYPE_0, TRUE, &rule->key, type0_key);
+    _air_acl_setRuleTable(AIR_ACL_RULE_TYPE_0, FALSE, &rule->mask, type0_mask);
+
+    /* Calculate T/C cell */
+    _convertToTCcell(type0_key, type0_mask, type0_t, type0_c, 12);
+
+    /* Set T/C cell to reg */
+    _air_acl_writeReg(unit, rule_idx, 3, AIR_ACL_RULE_T_CELL, AIR_ACL_MEM_SEL_RULE, AIR_ACL_MEM_FUNC_WRITE, type0_t);
+    _air_acl_writeReg(unit, rule_idx, 3, AIR_ACL_RULE_C_CELL, AIR_ACL_MEM_SEL_RULE, AIR_ACL_MEM_FUNC_WRITE, type0_c);
+
+    /* If match ipv6 flow lable or dip/dip, set rule type 1 */
+    if ((1 == rule->key.isipv6) && (rule->key.fieldmap & ((1 << AIR_ACL_DIP) | (1 << AIR_ACL_SIP) | (1 << AIR_ACL_FLOW_LABEL))))
+    {
+         _air_acl_setRuleTable(AIR_ACL_RULE_TYPE_1, TRUE, &rule->key, type1_key);
+         _air_acl_setRuleTable(AIR_ACL_RULE_TYPE_1, FALSE, &rule->mask, type1_mask);
+         _convertToTCcell(type1_key, type1_mask, type1_t, type1_c, 12);
+         _air_acl_writeReg(unit, rule_idx+1, 3, AIR_ACL_RULE_T_CELL, AIR_ACL_MEM_SEL_RULE, AIR_ACL_MEM_FUNC_WRITE, type1_t);
+         _air_acl_writeReg(unit, rule_idx+1, 3, AIR_ACL_RULE_C_CELL, AIR_ACL_MEM_SEL_RULE, AIR_ACL_MEM_FUNC_WRITE, type1_c);
+    }
+
+    /* Config rule enable/end/rev */
+    memcpy(&ctrl, &rule->ctrl, sizeof(AIR_ACL_CTRL_T));
+    if ((1 == rule->key.isipv6) && (rule->key.fieldmap & ((1 << AIR_ACL_DIP) | (1 << AIR_ACL_SIP) | (1 << AIR_ACL_FLOW_LABEL))))
+    {
+        ctrl.end = 0;
+        air_acl_setRuleCtrl(unit, rule_idx, &ctrl);
+        air_acl_setRuleCtrl(unit, rule_idx+1, &rule->ctrl);
+    }
+    else
+    {
+        air_acl_setRuleCtrl(unit, rule_idx, &rule->ctrl);
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_delRule
+ * PURPOSE:
+ *      Delete an ACL rule entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      rule_idx        --  Index of ACL rule entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_delRule(
+    const UI32_T unit,
+    const UI32_T rule_idx)
+{
+    UI32_T  type0_t[12]={0}, type0_c[12]={0}, type1_t[12]={0}, type1_c[12]={0};
+    AIR_ACL_CTRL_T ctrl={0};
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((rule_idx >= ACL_MAX_RULE_NUM), AIR_E_BAD_PARAMETER);
+
+    /* Delete the entry from ACL rule table */
+    _air_acl_writeReg(unit, rule_idx, 3, AIR_ACL_RULE_T_CELL, AIR_ACL_MEM_SEL_RULE, AIR_ACL_MEM_FUNC_WRITE, type0_t);
+    _air_acl_writeReg(unit, rule_idx, 3, AIR_ACL_RULE_C_CELL, AIR_ACL_MEM_SEL_RULE, AIR_ACL_MEM_FUNC_WRITE, type0_c);
+    air_acl_setRuleCtrl(unit, rule_idx, &ctrl);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_clearRule
+ * PURPOSE:
+ *      Clear all ACL rule entries.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_clearRule(
+    const UI32_T   unit)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0;
+    UI32_T  data[4]={0};
+
+    value = (AIR_ACL_MEM_FUNC_CLEAR << ACL_MEM_CFG_FUNC_SEL_OFFSET) | ACL_MEM_CFG_EN;
+    if ((ret = aml_writeReg(unit, ACL_MEM_CFG, value)) != AIR_E_OK)
+    {
+        return ret;
+    }
+
+    _air_acl_writeReg(unit, AIR_ACL_RULE_CONFIG_ENABLE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_WRITE, data);
+    _air_acl_writeReg(unit, AIR_ACL_RULE_CONFIG_END, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_WRITE, data);
+    _air_acl_writeReg(unit, AIR_ACL_RULE_CONFIG_REVERSE, 1, 0, 0, AIR_ACL_MEM_FUNC_CONFIG_WRITE, data);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_clearAction
+ * PURPOSE:
+ *      Clear all ACL action entries.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_clearAction(
+    const UI32_T   unit)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0;
+    UI32_T  data[4]={0};
+
+    value = (AIR_ACL_MEM_SEL_ACTION << ACL_MEM_CFG_MEM_SEL_OFFSET) | (AIR_ACL_MEM_FUNC_CLEAR << ACL_MEM_CFG_FUNC_SEL_OFFSET) | ACL_MEM_CFG_EN;
+    if ((ret = aml_writeReg(unit, ACL_MEM_CFG, value)) != AIR_E_OK)
+    {
+        return ret;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_getRule
+ * PURPOSE:
+ *      Get ACL rule entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      rule_idx        --  Index of ACL rule entry
+ *
+ * OUTPUT:
+ *      ptr_rule        --  Structure of ACL rule entry
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getRule(
+    const UI32_T unit,
+    const UI32_T rule_idx,
+    AIR_ACL_RULE_T *ptr_rule)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  bn = 0;
+    UI32_T  value = 0, n = 0, idx = 0;
+    UI32_T  type0_key[12] = {0}, type0_mask[12] = {0};
+    UI32_T  type1_key[12] = {0}, type1_mask[12] = {0};
+    UI32_T  type0_t[12] = {0}, type0_c[12] = {0};
+    UI32_T  type1_t[12] = {0}, type1_c[12] = {0};
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((rule_idx >= ACL_MAX_RULE_NUM), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_rule);
+
+    _air_acl_readReg(unit, rule_idx, 3, AIR_ACL_RULE_T_CELL, AIR_ACL_MEM_SEL_RULE, AIR_ACL_MEM_FUNC_READ, type0_t);
+    _air_acl_readReg(unit, rule_idx, 3, AIR_ACL_RULE_C_CELL, AIR_ACL_MEM_SEL_RULE, AIR_ACL_MEM_FUNC_READ, type0_c);
+    /* rule type 1 */
+    if(1 == (type0_t[0] & 0x1))
+    {
+        idx = rule_idx-1;
+        AIR_PRINT("This is the part of ipv6 rule, please get rule(%d)\n", idx);
+        return AIR_E_OK;
+    }
+
+    _parseFromTCcell(type0_t, type0_c, type0_key, type0_mask, 12);
+
+    _air_acl_getRuleTable(AIR_ACL_RULE_TYPE_0, type0_key, &ptr_rule->key);
+    _air_acl_getRuleTable(AIR_ACL_RULE_TYPE_0, type0_mask, &ptr_rule->mask);
+
+    if ((TRUE == ptr_rule->key.isipv6) && (ptr_rule->mask.fieldmap & ((1 << AIR_ACL_DIP) | (1 << AIR_ACL_SIP) | (1 << AIR_ACL_FLOW_LABEL))))
+    {
+        _air_acl_readReg(unit, rule_idx+1, 3, AIR_ACL_RULE_T_CELL, AIR_ACL_MEM_SEL_RULE, AIR_ACL_MEM_FUNC_READ, type1_t);
+        _air_acl_readReg(unit, rule_idx+1, 3, AIR_ACL_RULE_C_CELL, AIR_ACL_MEM_SEL_RULE, AIR_ACL_MEM_FUNC_READ, type1_c);
+        _parseFromTCcell(type1_t, type1_c, type1_key, type1_mask, 12);
+
+        _air_acl_getRuleTable(AIR_ACL_RULE_TYPE_1, type1_key, &ptr_rule->key);
+        _air_acl_getRuleTable(AIR_ACL_RULE_TYPE_1, type1_mask, &ptr_rule->mask);
+    }
+    if ((TRUE == ptr_rule->key.isipv6) && (ptr_rule->mask.fieldmap & ((1 << AIR_ACL_DIP) | (1 << AIR_ACL_SIP) | (1 << AIR_ACL_FLOW_LABEL))))
+    {
+        air_acl_getRuleCtrl(unit, rule_idx+1, &ptr_rule->ctrl);
+    }
+    else
+    {
+        air_acl_getRuleCtrl(unit, rule_idx, &ptr_rule->ctrl);
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_setAction
+ * PURPOSE:
+ *      Set an ACL action entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      act_idx         --  Index of ACL action entry
+ *      act             --  Structure of ACL action entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_NOT_SUPPORT
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setAction(
+    const UI32_T unit,
+    const UI32_T act_idx,
+    const AIR_ACL_ACTION_T act)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  data[4] = {0};
+
+    /* Check parameter */
+    AIR_PARAM_CHK((act_idx >= ACL_MAX_ACTION_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != act.port_en) && (FALSE != act.port_en), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != act.dest_port_sel) && (FALSE != act.dest_port_sel), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != act.vlan_port_sel) && (FALSE != act.vlan_port_sel), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.portmap & (~AIR_ALL_PORT_BITMAP)), AIR_E_BAD_PARAMETER);
+
+    AIR_PARAM_CHK((TRUE != act.cnt_en) && (FALSE != act.cnt_en), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.cnt_idx >= ACL_MAX_MIB_NUM), AIR_E_BAD_PARAMETER);
+
+    AIR_PARAM_CHK((TRUE != act.attack_en) && (FALSE != act.attack_en), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.attack_idx >= ACL_MAX_ATTACK_RATE_NUM), AIR_E_BAD_PARAMETER);
+
+    AIR_PARAM_CHK((TRUE != act.rate_en) && (FALSE != act.rate_en), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.rate_idx >= ACL_MAX_METER_NUM), AIR_E_BAD_PARAMETER);
+
+    AIR_PARAM_CHK((TRUE != act.vlan_en) && (FALSE != act.vlan_en), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.vlan_idx >= ACL_MAX_VLAN_NUM), AIR_E_BAD_PARAMETER);
+
+    AIR_PARAM_CHK((act.mirrormap > BITS_RANGE(0, ACL_MAX_MIR_SESSION_NUM)), AIR_E_BAD_PARAMETER);
+
+    AIR_PARAM_CHK((TRUE != act.pri_user_en) && (FALSE != act.pri_user_en), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.pri_user >= AIR_MAX_NUM_OF_QUEUE), AIR_E_BAD_PARAMETER);
+
+    AIR_PARAM_CHK((TRUE != act.lyvlan_en) && (FALSE != act.lyvlan_en), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != act.lyvlan) && (FALSE != act.lyvlan), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != act.mang) && (FALSE != act.mang), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != act.bpdu) && (FALSE != act.bpdu), AIR_E_BAD_PARAMETER);
+
+    AIR_PARAM_CHK((TRUE != act.fwd_en) && (FALSE != act.fwd_en), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.fwd >= AIR_ACL_ACT_FWD_LAST), AIR_E_BAD_PARAMETER);
+
+    AIR_PARAM_CHK((TRUE != act.egtag_en) && (FALSE != act.egtag_en), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.egtag >= AIR_ACL_ACT_EGTAG_LAST), AIR_E_BAD_PARAMETER);
+
+    AIR_PARAM_CHK((TRUE != act.trtcm_en) && (FALSE != act.trtcm_en), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != act.trtcm.cls_slr_sel) && (FALSE != act.trtcm.cls_slr), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.trtcm.cls_slr >= ACL_MAX_CLASS_SLR_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != act.trtcm.drop_pcd_sel) && (FALSE != act.trtcm.drop_pcd_sel), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.trtcm.drop_pcd_g >= ACL_MAX_DROP_PCD_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.trtcm.drop_pcd_y >= ACL_MAX_DROP_PCD_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.trtcm.drop_pcd_r >= ACL_MAX_DROP_PCD_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != act.trtcm.tcm_sel) && (FALSE != act.trtcm.tcm_sel), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.trtcm.usr_tcm >= AIR_ACL_ACT_USR_TCM_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((act.trtcm.tcm_idx >= ACL_MAX_TRTCM_NUM), AIR_E_BAD_PARAMETER);
+
+    _air_acl_setActionTable(&act, data);
+    _air_acl_writeReg(unit, act_idx, 1, 0, AIR_ACL_MEM_SEL_ACTION, AIR_ACL_MEM_FUNC_WRITE, data);
+
+    return ret;
+}
+
+/* FUNCTION NAME: air_acl_getAction
+ * PURPOSE:
+ *      Get an ACL action entry with speficic index.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      act_idx         --  Index of ACL action entry
+ *
+ * OUTPUT:
+ *      ptr_act         --  Structure of ACL action entry
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_ENTRY_NOT_FOUND
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getAction(
+    const UI32_T unit,
+    const UI32_T act_idx,
+    AIR_ACL_ACTION_T *ptr_act)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T i = 0;
+    UI32_T data[4] = {0};
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((act_idx >= ACL_MAX_ACTION_NUM), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_act);
+
+    _air_acl_readReg(unit, act_idx, 1, 0, AIR_ACL_MEM_SEL_ACTION, AIR_ACL_MEM_FUNC_READ, data);
+    _air_acl_getActionTable(data, ptr_act);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_delAction
+ * PURPOSE:
+ *      Delete an ACL action entry with specific index
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      act_idx         --  Index of ACL action entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_ENTRY_NOT_FOUND
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_delAction(
+    const UI32_T unit,
+    const UI32_T act_idx)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0;
+    UI32_T  data[4] = {0};
+
+    /* Check parameter */
+    AIR_PARAM_CHK((act_idx >= ACL_MAX_ACTION_NUM), AIR_E_BAD_PARAMETER);
+
+    _air_acl_writeReg(unit, act_idx, 1, 0, AIR_ACL_MEM_SEL_ACTION, AIR_ACL_MEM_FUNC_WRITE, data);
+    return ret;
+}
+
+/* FUNCTION NAME: air_acl_setTrtcm
+ * PURPOSE:
+ *      Set a trTCM entry with the specific index.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      tcm_idx         --  Index of trTCM entry
+ *      tcm             --  Structure of trTCM entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      Index 0 ~ 31 can be selected in tcm_idx.
+ */
+AIR_ERROR_NO_T
+air_acl_setTrtcm(
+    const UI32_T unit,
+    const UI32_T tcm_idx,
+    const AIR_ACL_TRTCM_T tcm)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((tcm_idx >= ACL_MAX_TRTCM_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((tcm.cbs > ACL_MAX_CBS_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((tcm.cir > ACL_MAX_CIR_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((tcm.pbs > ACL_MAX_PBS_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((tcm.pir > ACL_MAX_PIR_NUM), AIR_E_BAD_PARAMETER);
+
+    if(AIR_E_TIMEOUT == _checkDone(unit, AIR_ACL_CHECK_TRTCM))
+    {
+        return AIR_E_TIMEOUT;
+    }
+
+    aml_writeReg(unit, ACL_TRTCMW_CBS, tcm.cbs & ACL_TRTCM_CBS_MASK);
+    aml_writeReg(unit, ACL_TRTCMW_EBS, tcm.pbs & ACL_TRTCM_EBS_MASK);
+    aml_writeReg(unit, ACL_TRTCMW_CIR, tcm.cir & ACL_TRTCM_CIR_MASK);
+    aml_writeReg(unit, ACL_TRTCMW_EIR, tcm.pir & ACL_TRTCM_EIR_MASK);
+
+    value = (1 << ACL_TRTCM_BUSY_OFFSET) | ACL_TRTCM_WRITE | ((tcm_idx & ACL_TRTCM_ID_MASK) << ACL_TRTCM_ID_OFFSET);
+
+    if ((ret = aml_writeReg(unit, ACL_TRTCMA, value)) != AIR_E_OK)
+    {
+        return ret;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_delTrtcm
+ * PURPOSE:
+ *      Delete an ACL trTCM entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      trtcm_idx       --  Index of ACL trTCM entry
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      Index 0 ~ 31 can be selected in tcm_idx.
+ */
+AIR_ERROR_NO_T
+air_acl_delTrtcm(
+    const UI32_T unit,
+    const UI32_T tcm_idx)
+{
+    AIR_ACL_TRTCM_T tcm;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((tcm_idx >= ACL_MAX_TRTCM_NUM), AIR_E_BAD_PARAMETER);
+
+    /* Delete the entry from trTCM table */
+    memset(&tcm, 0, sizeof(tcm));
+    return air_acl_setTrtcm(unit, tcm_idx, tcm);
+}
+
+/* FUNCTION NAME: air_acl_clearTrtcm
+ * PURPOSE:
+ *      Clear all ACL trTCM entries.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_clearTrtcm(
+    const UI32_T unit)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    AIR_ACL_TRTCM_T tcm;
+    UI32_T i = 0;
+
+    /* Delete all entries from trTCM table */
+    memset(&tcm, 0, sizeof(tcm));
+    for(i=0; i < ACL_MAX_TRTCM_NUM; i++)
+    {
+        ret = air_acl_setTrtcm(unit, i, tcm);
+        if(AIR_E_OK != ret)
+        {
+            return ret;
+        }
+    }
+    return ret;
+}
+
+/* FUNCTION NAME: air_acl_getTrtcm
+ * PURPOSE:
+ *      Get a trTCM entry with the specific index.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      tcm_idx         --  Index of trTCM entry
+ *
+ * OUTPUT:
+ *      ptr_tcm         --  Structure of trTCM entry
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      Index 0 ~ 31 can be selected in tcm_idx.
+ */
+AIR_ERROR_NO_T
+air_acl_getTrtcm(
+    const UI32_T unit,
+    const UI32_T tcm_idx,
+    AIR_ACL_TRTCM_T *ptr_tcm)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0, trtcmr1 = 0, trtcmr2 = 0, trtcmr3 = 0, trtcmr4 = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((tcm_idx >= ACL_MAX_TRTCM_NUM), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_tcm);
+
+    if(AIR_E_TIMEOUT == _checkDone(unit, AIR_ACL_CHECK_TRTCM))
+    {
+        return AIR_E_TIMEOUT;
+    }
+
+    value = (1 << ACL_TRTCM_BUSY_OFFSET) | ACL_TRTCM_READ | ((tcm_idx & ACL_TRTCM_ID_MASK) << ACL_TRTCM_ID_OFFSET);
+
+    if ((ret = aml_writeReg(unit, ACL_TRTCMA, value)) != AIR_E_OK)
+    {
+        return ret;
+    }
+
+    aml_readReg(unit, ACL_TRTCMR_CBS, &trtcmr1);
+    aml_readReg(unit, ACL_TRTCMR_EBS, &trtcmr2);
+    aml_readReg(unit, ACL_TRTCMR_CIR, &trtcmr3);
+    aml_readReg(unit, ACL_TRTCMR_EIR, &trtcmr4);
+
+    ptr_tcm->cbs = trtcmr1 & ACL_TRTCM_CBS_MASK;
+    ptr_tcm->pbs = trtcmr2 & ACL_TRTCM_EBS_MASK;
+    ptr_tcm->cir = trtcmr3 & ACL_TRTCM_CIR_MASK;
+    ptr_tcm->pir = trtcmr4 & ACL_TRTCM_EIR_MASK;
+
+    return AIR_E_OK;
+
+}
+
+/* FUNCTION NAME: air_acl_setTrtcmEnable
+ * PURPOSE:
+ *      Set trTCM enable so the meter table will be updated based on PIR and CIR.
+ *      The color marker will also be enabled when ACL is hit.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setTrtcmEnable(
+    const UI32_T unit,
+    const BOOL_T state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK(((TRUE != state) && (FALSE != state)), AIR_E_BAD_PARAMETER);
+
+    /* Read data from register */
+    aml_readReg(unit, ACL_TRTCM, &u32dat);
+
+    if (TRUE == state)
+    {
+        u32dat |= (BIT(ACL_TRTCM_EN_OFFSET));
+    }
+    else
+    {
+        u32dat &= ~(BIT(ACL_TRTCM_EN_OFFSET));
+    }
+
+    /* Write data to register */
+    aml_writeReg(unit, ACL_TRTCM, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_getTrtcm
+ * PURPOSE:
+ *      Get a trTCM enable state.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getTrtcmEnable(
+    const UI32_T unit,
+    BOOL_T *const ptr_state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_CHECK_PTR(ptr_state);
+
+    /* Read data from register */
+    aml_readReg(unit, ACL_TRTCM, &u32dat);
+
+    if (u32dat & BIT(ACL_TRTCM_EN_OFFSET))
+    {
+        (*ptr_state) = TRUE;
+    }
+    else
+    {
+        (*ptr_state) = FALSE;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_setPortEnable
+ * PURPOSE:
+ *      Set ACL state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setPortEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state)
+{
+    UI32_T u32dat = 0, value = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != state) && (FALSE != state)), AIR_E_BAD_PARAMETER);
+
+    value = state ? 1 : 0;
+    aml_readReg(unit, ACL_PORT_EN, &u32dat);
+    u32dat = (u32dat & ~(ACL_EN_MASK << port)) | (value << port);
+    aml_writeReg(unit, ACL_PORT_EN, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_getPortEnable
+ * PURPOSE:
+ *      Get ACL state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getPortEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for state checking */
+    AIR_CHECK_PTR(ptr_state);
+
+    /* Read data from register */
+    aml_readReg(unit, ACL_PORT_EN, &u32dat);
+
+    (*ptr_state) = BITS_OFF_R(u32dat, port, ACL_EN_MASK);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_setDropEnable
+ * PURPOSE:
+ *      Set ACL drop precedence state
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setDropEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != state) && (FALSE != state)), AIR_E_BAD_PARAMETER);
+
+    u32dat = state ? 1 : 0;
+    aml_writeReg(unit, DPCR_EN(port), u32dat);
+    return AIR_E_OK;
+
+}
+
+/* FUNCTION NAME: air_acl_getDropEnable
+ * PURPOSE:
+ *      Get ACL drop precedence state
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getDropEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *ptr_state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_state);
+
+    aml_readReg(unit, DPCR_EN(port), &u32dat);
+    *ptr_state = u32dat ? TRUE : FALSE;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_acl_setDropThreshold
+ * PURPOSE:
+ *      Set ACL drop threshold.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      color           --  AIR_ACL_DP_COLOR_YELLOW: Yellow
+ *                          AIR_ACL_DP_COLOR_RED   : Red
+ *      queue           --  Output queue number
+ *      high            --  High threshold
+ *      low             --  Low threshold
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      Key parameter include port, color, queue.
+ */
+AIR_ERROR_NO_T
+air_acl_setDropThreshold(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_ACL_DP_COLOR_T color,
+    const UI8_T queue,
+    const UI32_T high,
+    const UI32_T low)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((color >= AIR_ACL_DP_COLOR_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((queue >= AIR_MAX_NUM_OF_QUEUE), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((high > BITS_RANGE(0, DPCR_HIGH_THRSH_WIDTH)), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((low > BITS_RANGE(0, DPCR_LOW_THRSH_WIDTH)), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, DPCR(port, color, queue), &u32dat);
+    u32dat = (u32dat & ~(DPCR_LOW_THRSH_MASK)) | low;
+    u32dat = (u32dat & ~(DPCR_HIGH_THRSH_MASK << DPCR_HIGH_THRSH_OFFSET)) | (high << DPCR_HIGH_THRSH_OFFSET);
+    aml_writeReg(unit, DPCR(port, color, queue), u32dat);
+    return AIR_E_OK;
+
+}
+
+/* FUNCTION NAME: air_acl_getDropThreshold
+ * PURPOSE:
+ *      Get ACL drop threshold.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      color           --  AIR_ACL_DP_COLOR_YELLOW: Yellow
+ *                          AIR_ACL_DP_COLOR_RED   : Red
+ *      queue           --  Output queue number
+ *
+ * OUTPUT:
+ *      ptr_high        --  High threshold
+ *      ptr_low         --  Low threshold
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      Key parameter include port, color, queue.
+ */
+AIR_ERROR_NO_T
+air_acl_getDropThreshold(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_ACL_DP_COLOR_T color,
+    const UI8_T queue,
+    UI32_T *ptr_high,
+    UI32_T *ptr_low)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((color >= AIR_ACL_DP_COLOR_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((queue >= AIR_MAX_NUM_OF_QUEUE), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_high);
+    AIR_CHECK_PTR(ptr_low);
+
+    aml_readReg(unit, DPCR(port, color, queue), &u32dat);
+    *ptr_low = u32dat & DPCR_LOW_THRSH_MASK;
+    *ptr_high = (u32dat >> DPCR_HIGH_THRSH_OFFSET) & DPCR_HIGH_THRSH_MASK;
+    return AIR_E_OK;
+
+}
+
+/* FUNCTION NAME: air_acl_setDropProbability
+ * PURPOSE:
+ *      Set ACL drop probability.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      color           --  AIR_ACL_DP_COLOR_YELLOW: Yellow
+ *                          AIR_ACL_DP_COLOR_RED   : Red
+ *      queue           --  Output queue number
+ *      probability     --  Drop probability (value:0 ~ 1023, unit:1/1023; eg: value-102 = 10% )
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      Key parameter include port, color, queue.
+ */
+AIR_ERROR_NO_T
+air_acl_setDropProbability(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_ACL_DP_COLOR_T color,
+    const UI8_T queue,
+    const UI32_T probability)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((color >= AIR_ACL_DP_COLOR_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((queue >= AIR_MAX_NUM_OF_QUEUE), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((probability > BITS_RANGE(0, DPCR_PBB_WIDTH)), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, DPCR(port, color, queue), &u32dat);
+    u32dat = (u32dat & ~(DPCR_PBB_MASK << DPCR_PBB_OFFSET)) | (probability << DPCR_PBB_OFFSET);
+    aml_writeReg(unit, DPCR(port, color, queue), u32dat);
+    return AIR_E_OK;
+
+}
+
+/* FUNCTION NAME: air_acl_getDropProbability
+ * PURPOSE:
+ *      Get ACL drop probability.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      color           --  AIR_ACL_DP_COLOR_YELLOW: Yellow
+ *                          AIR_ACL_DP_COLOR_RED   : Red
+ *      queue           --  Output queue number
+ *
+ * OUTPUT:
+ *      ptr_probability --  Drop probability (value:0 ~ 1023, unit:1/1023; eg: value-102 = 10% )
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      Key parameter include port, color, queue.
+ */
+AIR_ERROR_NO_T
+air_acl_getDropProbability(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_ACL_DP_COLOR_T color,
+    const UI8_T queue,
+    UI32_T *ptr_probability)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((color >= AIR_ACL_DP_COLOR_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((queue >= AIR_MAX_NUM_OF_QUEUE), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_probability);
+
+    /* Read data from register */
+    aml_readReg(unit, DPCR(port, color, queue), &u32dat);
+
+    (*ptr_probability) = BITS_OFF_R(u32dat, DPCR_PBB_OFFSET, DPCR_PBB_WIDTH);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:
+ *      air_acl_setGlobalState
+ * PURPOSE:
+ *      Set the ACL global enable state.
+ * INPUT:
+ *      unit        -- Device ID
+ *      state       -- Enable state of ACL
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setGlobalState(
+    const UI32_T        unit,
+    const BOOL_T        state)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0, data = 0;
+
+    AIR_PARAM_CHK((TRUE != state) && (FALSE != state), AIR_E_BAD_PARAMETER);
+
+    value = state ? 1 : 0;
+    if ((ret = aml_readReg(unit, ACL_GLOBAL_CFG, &data)) != AIR_E_OK)
+    {
+        return ret;
+    }
+    data = (data & ~ACL_EN_MASK) | value;
+    if ((ret = aml_writeReg(unit, ACL_GLOBAL_CFG, data)) != AIR_E_OK)
+    {
+        return ret;
+    }
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:
+ *      air_acl_getGlobalState
+ * PURPOSE:
+ *      Get the ACL global enable state.
+ * INPUT:
+ *      unit             -- Device ID
+ * OUTPUT:
+ *      ptr_state        -- Enable state
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getGlobalState(
+    const UI32_T         unit,
+    BOOL_T               *ptr_state)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0;
+
+    AIR_CHECK_PTR(ptr_state);
+    if ((ret = aml_readReg(unit, ACL_GLOBAL_CFG, &value)) != AIR_E_OK)
+    {
+        return ret;
+    }
+
+    value &= ACL_EN_MASK;
+    *ptr_state = value ? TRUE : FALSE;
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:
+ *      air_acl_setUdfRule
+ * PURPOSE:
+ *      Set ACL UDF rule of specified entry index.
+ * INPUT:
+ *      unit             -- Device ID
+ *      rule_idx         -- ACLUDF table entry index
+ *      udf_rule         -- Structure of ACL UDF rule entry
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setUdfRule(
+    const UI32_T                unit,
+    const UI32_T                rule_idx,
+    AIR_ACL_UDF_RULE_T          udf_rule)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0;
+    UI32_T  data[3] = {0};
+
+    /* Check parameter */
+    AIR_PARAM_CHK((rule_idx >= ACL_MAX_UDF_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != udf_rule.valid) && (FALSE != udf_rule.valid), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((udf_rule.offset_format >= AIR_ACL_RULE_OFS_FMT_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((udf_rule.offset >= ACL_MAX_WORD_OFST_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((udf_rule.cmp_sel >= AIR_ACL_RULE_CMP_SEL_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((udf_rule.pattern > ACL_MAX_CMP_PAT_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((udf_rule.mask > ACL_MAX_CMP_BIT_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((udf_rule.low_threshold > ACL_MAX_CMP_PAT_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((udf_rule.high_threshold > ACL_MAX_CMP_BIT_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((udf_rule.portmap & (~AIR_ALL_PORT_BITMAP)), AIR_E_BAD_PARAMETER);
+
+    _fillTblMultiFields(data, 3, PORT_BITMAP_OFFSET, PORT_BITMAP_WIDTH, udf_rule.portmap);
+    _fillTblMultiFields(data, 3, UDF_RULE_EN_OFFSET, UDF_RULE_EN_WIDTH, udf_rule.valid);
+    _fillTblMultiFields(data, 3, UDF_PKT_TYPE_OFFSET, UDF_PKT_TYPE_WIDTH, udf_rule.offset_format);
+    _fillTblMultiFields(data, 3, WORD_OFST_OFFSET, WORD_OFST_WIDTH, udf_rule.offset);
+
+    _fillTblMultiFields(data, 3, CMP_SEL_OFFSET, CMP_SEL_WIDTH, udf_rule.cmp_sel);
+    if(AIR_ACL_RULE_CMP_SEL_PATTERN == udf_rule.cmp_sel)
+    {
+        _fillTblMultiFields(data, 3, CMP_PAT_OFFSET, CMP_PAT_WIDTH, udf_rule.pattern);
+        _fillTblMultiFields(data, 3, CMP_MASK_OFFSET, CMP_MASK_WIDTH, udf_rule.mask);
+    }
+    else
+    {
+        _fillTblMultiFields(data, 3, CMP_PAT_OFFSET, CMP_PAT_WIDTH, udf_rule.low_threshold);
+        _fillTblMultiFields(data, 3, CMP_MASK_OFFSET, CMP_MASK_WIDTH, udf_rule.high_threshold);
+    }
+
+    if(AIR_E_TIMEOUT == _checkDone(unit, AIR_ACL_CHECK_UDF))
+    {
+        return AIR_E_TIMEOUT;
+    }
+    aml_writeReg(unit, ACL_AUTW0, data[0]);
+    aml_writeReg(unit, ACL_AUTW1, data[1]);
+    aml_writeReg(unit, ACL_AUTW2, data[2]);
+    value = (rule_idx & ACL_UDF_ADDR_MASK) | ACL_UDF_WRITE | (1U << ACL_UDF_ACC_OFFSET);
+    if ((ret = aml_writeReg(unit, ACL_AUTC, value)) != AIR_E_OK)
+    {
+        return ret;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:
+ *      air_acl_getUdfRule
+ * PURPOSE:
+ *      Get ACL UDF rule of specified entry index.
+ * INPUT:
+ *      unit             -- Device ID
+ *      rule_idx         -- ACLUDF table entry index
+ * OUTPUT:
+ *      ptr_udf_rule     -- Structure of ACL UDF rule entry
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getUdfRule(
+    const UI32_T                unit,
+    const UI8_T                 rule_idx,
+    AIR_ACL_UDF_RULE_T          *ptr_udf_rule)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0;
+    UI32_T  data[3] = {0};
+
+    /* Check parameter */
+    AIR_PARAM_CHK((rule_idx >= ACL_MAX_UDF_NUM), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_udf_rule);
+
+    value = (rule_idx & ACL_UDF_ADDR_MASK) | ACL_UDF_READ | (1U << ACL_UDF_ACC_OFFSET);
+    if ((ret = aml_writeReg(unit, ACL_AUTC, value)) != AIR_E_OK)
+    {
+        return ret;
+    }
+    if(AIR_E_TIMEOUT == _checkDone(unit, AIR_ACL_CHECK_UDF))
+    {
+        return AIR_E_TIMEOUT;
+    }
+    aml_readReg(unit, ACL_AUTR0, data);
+    aml_readReg(unit, ACL_AUTR1, data+1);
+    aml_readReg(unit, ACL_AUTR2, data+2);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, PORT_BITMAP_OFFSET, PORT_BITMAP_WIDTH, ptr_udf_rule->portmap);
+
+    ACL_DERIVE_TBL_MULTIFIELDS(data, UDF_RULE_EN_OFFSET, UDF_RULE_EN_WIDTH, ptr_udf_rule->valid);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, UDF_PKT_TYPE_OFFSET, UDF_PKT_TYPE_WIDTH, ptr_udf_rule->offset_format);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, WORD_OFST_OFFSET, WORD_OFST_WIDTH, ptr_udf_rule->offset);
+    ACL_DERIVE_TBL_MULTIFIELDS(data, CMP_SEL_OFFSET, CMP_SEL_WIDTH, ptr_udf_rule->cmp_sel);
+    if(AIR_ACL_RULE_CMP_SEL_PATTERN == ptr_udf_rule->cmp_sel)
+    {
+        ACL_DERIVE_TBL_MULTIFIELDS(data, CMP_PAT_OFFSET, CMP_PAT_WIDTH, ptr_udf_rule->pattern);
+        ACL_DERIVE_TBL_MULTIFIELDS(data, CMP_MASK_OFFSET, CMP_MASK_WIDTH, ptr_udf_rule->mask);
+    }
+    else
+    {
+        ACL_DERIVE_TBL_MULTIFIELDS(data, CMP_PAT_OFFSET, CMP_PAT_WIDTH, ptr_udf_rule->low_threshold);
+        ACL_DERIVE_TBL_MULTIFIELDS(data, CMP_MASK_OFFSET, CMP_MASK_WIDTH, ptr_udf_rule->high_threshold);
+    }
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:
+ *      air_acl_delUdfRule
+ * PURPOSE:
+ *      Delete ACL UDF rule of specified entry index.
+ * INPUT:
+ *      unit             -- Device ID
+ *      rule_idx         -- ACLUDF table entry index
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_delUdfRule(
+    const UI32_T      unit,
+    const UI8_T       rule_idx)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0;
+    UI32_T  data = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((rule_idx >= ACL_MAX_UDF_NUM), AIR_E_BAD_PARAMETER);
+
+    aml_writeReg(unit, ACL_AUTW0, data);
+    aml_writeReg(unit, ACL_AUTW1, data);
+    aml_writeReg(unit, ACL_AUTW2, data);
+
+    value = (rule_idx & ACL_UDF_ADDR_MASK) | ACL_UDF_WRITE | (1U << ACL_UDF_ACC_OFFSET);
+    if ((ret = aml_writeReg(unit, ACL_AUTC, value)) != AIR_E_OK)
+    {
+        return ret;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:
+ *      air_acl_clearUdfRule
+ * PURPOSE:
+ *      Clear acl all udf rule.
+ * INPUT:
+ *      unit             -- Device ID
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_clearUdfRule(
+    const UI32_T    unit)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0;
+
+    value = ACL_UDF_CLEAR | (1U << ACL_UDF_ACC_OFFSET);
+    if ((ret = aml_writeReg(unit, ACL_AUTC, value)) != AIR_E_OK)
+    {
+        return ret;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:
+ *      air_acl_setMeterTable
+ * PURPOSE:
+ *      Set flow ingress rate limit by meter table.
+ * INPUT:
+ *      unit                -- Device ID
+ *      meter_id            -- Meter id
+ *      enable              -- Meter enable state
+ *      rate                -- Ratelimit(unit:64kbps)
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_setMeterTable(
+    const UI32_T            unit,
+    const UI32_T            meter_id,
+    const BOOL_T            enable,
+    const UI32_T            rate)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((meter_id >= ACL_MAX_METER_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((rate > ACL_MAX_TOKEN_NUM), AIR_E_BAD_PARAMETER);
+
+    if(TRUE == enable)
+    {
+        value = (1 << ACL_RATE_BUSY_OFFSET) | ACL_RATE_WRITE | ((meter_id & ACL_RATE_ID_MASK) << ACL_RATE_ID_OFFSET) | ACL_RATE_EN |
+            (rate & ACL_RATE_TOKEN_MASK);
+    }
+    else if(FALSE == enable)
+    {
+        value = (1 << ACL_RATE_BUSY_OFFSET) | ACL_RATE_WRITE | ((meter_id & ACL_RATE_ID_MASK) << ACL_RATE_ID_OFFSET) | ACL_RATE_DIS;
+    }
+    else
+    {
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_TIMEOUT == _checkDone(unit, AIR_ACL_CHECK_METER))
+    {
+        return AIR_E_TIMEOUT;
+    }
+    if ((ret = aml_writeReg(unit, ACLRMC, value)) != AIR_E_OK)
+    {
+        return ret;
+    }
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:
+ *      air_acl_getMeterTable
+ * PURPOSE:
+ *      Get meter table configuration.
+ * INPUT:
+ *      unit                -- Device ID
+ *      meter_id            -- Meter id
+ * OUTPUT:
+ *      ptr_enable          -- Meter enable state
+ *      ptr_rate            -- Ratelimit(unit:64kbps)
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_acl_getMeterTable(
+    const UI32_T            unit,
+    const UI32_T            meter_id,
+    BOOL_T                  *ptr_enable,
+    UI32_T                  *ptr_rate)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T  value = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((meter_id >= ACL_MAX_METER_NUM), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_enable);
+    AIR_CHECK_PTR(ptr_rate);
+
+    if(AIR_E_TIMEOUT == _checkDone(unit, AIR_ACL_CHECK_METER))
+    {
+        return AIR_E_TIMEOUT;
+    }
+    value = (1 << ACL_RATE_BUSY_OFFSET) | ACL_RATE_READ | ((meter_id & ACL_RATE_ID_MASK) << ACL_RATE_ID_OFFSET) | ACL_RATE_EN;
+
+    if ((ret = aml_writeReg(unit, ACLRMC, value)) != AIR_E_OK)
+    {
+        return ret;
+    }
+    aml_readReg(unit, ACLRMD1, &value);
+    *ptr_enable = ((value >> ACL_RATE_EN_OFFSET) & 0x1) ? TRUE : FALSE;
+    *ptr_rate = value & ACL_RATE_TOKEN_MASK;
+
+    return AIR_E_OK;
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_aml.c b/feed/app/switch/src/an8855_sdk/api/src/air_aml.c
new file mode 100644
index 0000000..38b85a4
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_aml.c
@@ -0,0 +1,218 @@
+/* FILE NAME:  air_aml.c
+ * PURPOSE:
+ *      It provides access management layer function.
+ * NOTES:
+ *
+ */
+
+/* INCLUDE FILE DECLARATIONS
+ */
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+
+/* GLOBAL VARIABLE DECLARATIONS
+ */
+AML_DEV_ACCESS_T _ext_dev_access;
+
+/* EXPORTED SUBPROGRAM BODIES
+ */
+
+/* LOCAL SUBPROGRAM BODIES
+ */
+/* FUNCTION NAME:   aml_readReg
+ * PURPOSE:
+ *      To read data from the register of the specified chip unit.
+ * INPUT:
+ *      unit        -- the device unit
+ *      addr_offset -- the address of register
+ * OUTPUT:
+ *      ptr_data    -- pointer for the register data
+ * RETURN:
+ *      NPS_E_OK     -- Successfully read the data.
+ *      NPS_E_OTHERS -- Failed to read the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_readReg(
+    const UI32_T    unit,
+    const UI32_T    addr_offset,
+    UI32_T          *ptr_data)
+{
+    AIR_CHECK_PTR(ptr_data);
+
+    if (!_ext_dev_access.read_callback)
+    {
+        return AIR_E_OTHERS;
+    }
+
+    return _ext_dev_access.read_callback(unit, addr_offset, ptr_data);
+}
+
+/* FUNCTION NAME:   aml_writeReg
+ * PURPOSE:
+ *      To write data to the register of the specified chip unit.
+ * INPUT:
+ *      unit        -- the device unit
+ *      addr_offset -- the address of register
+ *      data        -- written data
+ * OUTPUT:
+ *      none
+ * RETURN:
+ *      NPS_E_OK     -- Successfully write the data.
+ *      NPS_E_OTHERS -- Failed to write the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_writeReg(
+    const UI32_T    unit,
+    const UI32_T    addr_offset,
+    const UI32_T    data)
+{
+    if (!_ext_dev_access.write_callback)
+    {
+        return AIR_E_OTHERS;
+    }
+
+    return _ext_dev_access.write_callback(unit, addr_offset, data);
+}
+
+/* FUNCTION NAME:   aml_readPhyReg
+ * PURPOSE:
+ *      To read data from the phy register of the specified chip unit in Clause22.
+ * INPUT:
+ *      unit        -- the device unit
+ *      port_id     -- physical port number
+ *      addr_offset -- the address of phy register
+ * OUTPUT:
+ *      ptr_data    -- pointer for the register data
+ * RETURN:
+ *      NPS_E_OK     -- Successfully read the data.
+ *      NPS_E_OTHERS -- Failed to read the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_readPhyReg(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    addr_offset,
+    UI32_T          *ptr_data)
+{
+    AIR_CHECK_PTR(ptr_data);
+
+    if (!_ext_dev_access.phy_read_callback)
+    {
+        return AIR_E_OTHERS;
+    }
+
+    return _ext_dev_access.phy_read_callback(unit, port_id, addr_offset, ptr_data);
+}
+
+/* FUNCTION NAME:   aml_writePhyReg
+ * PURPOSE:
+ *      To write data to the phy register of the specified chip unit in Clause22.
+ * INPUT:
+ *      unit        -- the device unit
+ *      port_id     -- physical port number
+ *      addr_offset -- the address of phy register
+ *      data        -- written data
+ * OUTPUT:
+ *      none
+ * RETURN:
+ *      NPS_E_OK     -- Successfully write the data.
+ *      NPS_E_OTHERS -- Failed to write the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_writePhyReg(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    addr_offset,
+    const UI32_T    data)
+{
+    if (!_ext_dev_access.phy_write_callback)
+    {
+        return AIR_E_OTHERS;
+    }
+
+    return _ext_dev_access.phy_write_callback(unit, port_id, addr_offset, data);
+}
+
+/* FUNCTION NAME:   aml_readPhyRegCL45
+ * PURPOSE:
+ *      To read data from the phy register of the specified chip unit in Clause45.
+ * INPUT:
+ *      unit        -- the device unit
+ *      port_id     -- physical port number
+ *      dev_type    -- phy register type
+ *      addr_offset -- the address of phy register
+ * OUTPUT:
+ *      ptr_data    -- pointer for the register data
+ * RETURN:
+ *      NPS_E_OK     -- Successfully read the data.
+ *      NPS_E_OTHERS -- Failed to read the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_readPhyRegCL45(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    dev_type,
+    const UI32_T    addr_offset,
+    UI32_T          *ptr_data)
+{
+    AIR_CHECK_PTR(ptr_data);
+
+    if (!_ext_dev_access.phy_cl45_read_callback)
+    {
+        return AIR_E_OTHERS;
+    }
+
+    return _ext_dev_access.phy_cl45_read_callback(unit, port_id, dev_type, addr_offset, ptr_data);
+}
+
+/* FUNCTION NAME:   aml_writePhyRegCL45
+ * PURPOSE:
+ *      To write data to the phy register of the specified chip unit in Clause45.
+ * INPUT:
+ *      unit        -- the device unit
+ *      port_id     -- physical port number
+ *      dev_type    -- phy register offset
+ *      addr_offset -- the address of phy register
+ *      data        -- written data
+ * OUTPUT:
+ *      none
+ * RETURN:
+ *      NPS_E_OK     -- Successfully write the data.
+ *      NPS_E_OTHERS -- Failed to write the data.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+aml_writePhyRegCL45(
+    const UI32_T    unit,
+    const UI32_T    port_id,
+    const UI32_T    dev_type,
+    const UI32_T    addr_offset,
+    const UI32_T    data)
+{
+    if (!_ext_dev_access.phy_cl45_write_callback)
+    {
+        return AIR_E_OTHERS;
+    }
+
+    return _ext_dev_access.phy_cl45_write_callback(unit, port_id, dev_type, addr_offset, data);
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_cmd.c b/feed/app/switch/src/an8855_sdk/api/src/air_cmd.c
new file mode 100644
index 0000000..95c11e8
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_cmd.c
@@ -0,0 +1,8022 @@
+/* FILE NAME:   air_cmd.c
+ * PURPOSE:
+ *      Define the command line function in AIR SDK.
+ * NOTES:
+ */
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+#define MAC_STR         "%02X%02X%02X%02X%02X%02X"
+#define MAC2STR(m)      (m)[0],(m)[1],(m)[2],(m)[3],(m)[4],(m)[5]
+#define AIR_MAC_LEN    (12)
+#define CMD_NO_PARA     (0xFFFFFFFF)
+#define CMD_VARIABLE_PARA (0xFFFFFFFE)
+#define L2_WDOG_KICK_NUM            (100)
+
+#define TOLOWER(x)      ((x) | 0x20)
+#define isxdigit(c)     (('0' <= (c) && (c) <= '9') || ('a' <= (c) && (c) <= 'f') || ('A' <= (c) && (c) <= 'F'))
+#define isdigit(c)      ('0' <= (c) && (c) <= '9')
+#define CMD_CHECK_PARA(__shift__, __op__, __size__) do          \
+{                                                               \
+    if ((__shift__) __op__ (__size__))                          \
+    {                                                           \
+        ;                                                       \
+    }                                                           \
+    else                                                        \
+    {                                                           \
+        return (AIR_E_BAD_PARAMETER);                           \
+    }                                                           \
+} while(0)
+
+/* DATA TYPE DECLARATIONS
+*/
+typedef struct {
+    C8_T*               name;
+    AIR_ERROR_NO_T     (*func)(UI32_T argc, C8_T *argv[]);
+    UI32_T              argc_min;
+    C8_T*               argc_errmsg;
+} AIR_CMD_T;
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+/* String Utility */
+static BOOL_T _strcmp(const char *s1, const char *s2);
+static C8_T * _strtok_r(C8_T *s, const C8_T *delim, C8_T **last);
+static C8_T * _strtok(C8_T *s, const C8_T *delim, C8_T **last);
+UI32_T _strtoul(const C8_T *cp, C8_T **endp, UI32_T base);
+static I32_T _strtol(const C8_T *cp, C8_T **endp, UI32_T base);
+
+/* Type Converter */
+static AIR_ERROR_NO_T _str2mac(C8_T *str, C8_T *mac);
+static AIR_ERROR_NO_T _hex2bit(const UI32_T hex, UI32_T *ptr_bit);
+static AIR_ERROR_NO_T _hex2bitstr(const UI32_T hex, C8_T *ptr_bit_str, UI32_T str_len);
+static AIR_ERROR_NO_T _portListStr2Ary(const C8_T *str, UI32_T *ary, const UI32_T ary_num);
+
+/* Register Operation */
+static AIR_ERROR_NO_T doRegRead(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doRegWrite(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doReg(UI32_T argc, C8_T *argv[]);
+
+/* PHY Operation */
+static AIR_ERROR_NO_T doPhyCL22Read(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPhyCL22Write(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPhyCL22(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPhyCL45Read(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPhyCL45Write(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPhyCL45(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPhy(UI32_T argc, C8_T *argv[]);
+
+/* Porting setting */
+static AIR_ERROR_NO_T doPortSetMatrix(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortSetVlanMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortSet(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doPortGetMatrix(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortGetVlanMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortGet(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doPort(UI32_T argc, C8_T *argv[]);
+
+/* Vlan setting */
+static AIR_ERROR_NO_T doVlanInitiate(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanCreate(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanDestroy(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanDestroyAll(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanDump(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanAddPortMem(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanDelPortMem(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doVlanSetFid(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetMemPort(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetIVL(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetPortBaseStag(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetStag(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetEgsTagCtlEn(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetEgsTagCtlCon(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetEgsTagCtl(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetPortActFrame(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetLeakyVlanEn(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetPortVlanAttr(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetIgsPortETagAttr(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetPortETagAttr(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetPortOuterTPID(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSetPvid(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanSet(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doVlanGetPortActFrame(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanGetLeakyVlanEn(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanGetPortVlanAttr(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanGetIgsPortETagAttr(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanGetPortETagAttr(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanGetPortOuterTPID(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanGetPvid(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doVlanGet(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doVlan(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doFlowCtrl(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doJumbo(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doL2Add(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doL2Del(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doL2Clear(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doL2Get(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doL2Set(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doL2Dump(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doL2(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doAnMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLocalAdv(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doRemoteAdv(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortSpeed(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortDuplex(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortStatus(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortBckPres(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortPsMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortSmtSpdDwn(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortSpTag(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortEnable(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPort5GBaseRMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortHsgmiiMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortSgmiiMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortRmiiMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doPortRgmiiMode(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doSptagEn(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSptagMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSptagDecode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSptagEncode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSptag(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doMacAddr(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T _printMacEntry(AIR_MAC_ENTRY_T * mt, UI32_T age_unit, UI8_T count, UI8_T title);
+static AIR_ERROR_NO_T doGetMacAddr(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMacAddrAgeOut(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doDumpMacAddr(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doLagMember(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLagMemberCnt(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLagPtseed(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLagHashtype(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLagDstInfo(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLagState(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLagSpsel(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLagGet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLagSet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLag(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doStpPortstate(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doStpGet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doStpSet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doStp(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doMirrorGetSid(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMirrorDelSid(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMirrorAddRlist(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMirrorAddTlist(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMirrorSetSessionEnable(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMirrorSetSession(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMirrorSet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMirrorAdd(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMirrorGet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMirrorDel(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMirror(UI32_T argc,C8_T *argv[]);
+
+static AIR_ERROR_NO_T doMibClearPort(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMibClearAcl(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMibGetPort(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMibGetAcl(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMibClear(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMibGet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doMib(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doQosScheduleAlgo(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doQosTrustMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doQosPri2Queue(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doQosDscp2Pri(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doQosRateLimitEnable(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doQosRateLimit(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doQosPortPriority(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doQosRateLimitExMngFrm(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doQosGet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doQosSet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doQos(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doDiagTxComply(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doDiagSet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doDiagGet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doDiag(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doLedMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLedState(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLedUsrDef(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLedBlkTime(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLedSet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLedGet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doLed(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doSwitchCpuPortEn(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSwitchCpuPort(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSwitchPhyLCIntrEn(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSwitchPhyLCIntrSts(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSwitchSet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSwitchGet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSwitch(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doShowVersion(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doShow(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T doStormEnable(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doStormRate(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doFldMode(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSaLearning(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSaLimit(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSecGet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSecSet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doSec(UI32_T argc, C8_T *argv[]);
+
+static void _air_acl_printRuleMap(UI32_T *rule_map, UI32_T ary_num);
+static AIR_ERROR_NO_T doAclEn(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclRule(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclUdfRule(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclRmvRule(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclRmvUdfRule(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclAction(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclRmvAction(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclDumpAction(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclTrtcm(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclTrtcmEn(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclRmvTrtcm(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclPortEn(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclDropEn(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclDropThrsh(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclDropPbb(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclMeter(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclDump(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclSet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclGet(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclDel(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAclClear(UI32_T argc, C8_T *argv[]);
+static AIR_ERROR_NO_T doAcl(UI32_T argc, C8_T *argv[]);
+
+static AIR_ERROR_NO_T subcmd(const AIR_CMD_T tab[], UI32_T argc, C8_T *argv[]);
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+const static C8_T *_sptag_vpm[] =
+{
+    "untagged",
+    "8100",
+    "predefined",
+    "unknown"
+};
+
+const static C8_T *_sptag_pt[] =
+{
+    "disable pass through",
+    "enable pass through"
+};
+
+const static C8_T *_air_mac_address_forward_control_string [] =
+{
+    "Default",
+    "CPU include",
+    "CPU exclude",
+    "CPU only",
+    "Drop"
+};
+
+static AIR_CMD_T regCmds[] =
+{
+    {"r",           doRegRead,      1,      "reg r <reg(4'hex)>"},
+    {"w",           doRegWrite,     2,      "reg w <reg(4'hex)> <value(8'hex)>"},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T phyCL22Cmds[] =
+{
+    {"r",           doPhyCL22Read,  2,      "phy cl22 r <port(0..4)> <reg(2'hex)>"},
+    {"w",           doPhyCL22Write, 3,      "phy cl22 w <port(0..4)> <reg(2'hex)> <value(4'hex)>"},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T phyCL45Cmds[] =
+{
+    {"r",           doPhyCL45Read,  3,      "phy cl45 r <port(0..4)> <dev(2'hex)> <reg(3'hex)>"},
+    {"w",           doPhyCL45Write, 4,      "phy cl45 w <port(0..4)> <dev(2'hex)> <reg(3'hex)> <value(4'hex)>"},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T phyCmds[] =
+{
+    {"cl22",         doPhyCL22,     0,      NULL},
+    {"cl45",         doPhyCL45,     0,      NULL},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T portSetCmds[] =
+{
+    {"matrix",      doPortSetMatrix,        2,                "port set matrix <port(0..6)> <matrix(6:0)>"},
+    {"vlanMode",    doPortSetVlanMode,      2,                "port set vlanMode <port(0..6)> <vlanMode(0:matrix,1:fallback,2:check,3:security)>"},
+    {"flowCtrl",    doFlowCtrl,             3,                "port set flowCtrl <port(0..6)> <dir(0:Tx,1:Rx)> <fc_en(1:En,0:Dis)>"},
+    {"jumbo",       doJumbo,                2,                "port set jumbo <pkt_len(0:1518,1:1536,2:1552,3:max)> <frame_len(2..15)>"},
+    {"anMode",      doAnMode,               2,                "port set anMode <port(0..4)> <en(0:force,1:AN)>"},
+    {"localAdv",    doLocalAdv,             7,                "port set localAdv <port(0..4)> <10H(1:En,0:Dis)> <10F(1:En,0:Dis)> <100H(1:En,0:Dis)> <100F(1:En,0:Dis)> <1000F(1:En,0:Dis)> <pause(1:En,0:Dis)>"},
+    {"speed",       doPortSpeed,            2,                "port set speed <port(0..4)> <speed(0:10M,1:100M,2:1G,3:2.5G)>"},
+    {"duplex",      doPortDuplex,           2,                "port set duplex <port(0..4)> <duplex(0:half,1:full)>"},
+    {"bckPres",     doPortBckPres,          2,                "port set bckPres <port(0..6)> <bckPres(1:En,0:Dis)>"},
+    {"psMode",      doPortPsMode,           3,                "port set psMode <port(0..4)> <ls(1:En,0:Dis)> <eee(1:En,0:Dis)>"},
+    {"smtSpdDwn",   doPortSmtSpdDwn,        3,                "port set smtSpdDwn <port(0..4)> <en(1:En,0:Dis)> <retry(2..5)>"},
+    {"spTag",       doPortSpTag,            2,                "port set spTag <port(0..6)> <en(1:En,0:Dis)>"},
+    {"enable",      doPortEnable,           2,                "port set enable <port(0..4)> <en(1:En,0:Dis)>"},
+    {"5GBaseRMode", doPort5GBaseRMode,      CMD_NO_PARA,      "port set 5GBaseRMode"},
+    {"hsgmiiMode",  doPortHsgmiiMode,       CMD_NO_PARA,      "port set hsgmiiMode"},
+    {"sgmiiMode",   doPortSgmiiMode,        2,                "port set sgmiiMode <mode(0:AN,1:Force)> <speed(0:10M,1:100M,2:1G)>"},
+    {"rmiiMode",    doPortRmiiMode,         1,                "port set rmiiMode <speed(0:10M,1:100M)>"},
+    {"rgmiiMode",   doPortRgmiiMode,        1,                "port set rgmiiMode <speed(0:10M,1:100M,2:1G)>"},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T portGetCmds[] =
+{
+    {"matrix",      doPortGetMatrix,        1,                "port get matrix <port(0..6)>"},
+    {"vlanMode",    doPortGetVlanMode,      1,                "port get vlanMode <port(0..6)>"},
+    {"flowCtrl",    doFlowCtrl,             2,                "port get flowCtrl <port(0..6)> <dir(0:Tx,1:Rx)>"},
+    {"jumbo",       doJumbo,                CMD_NO_PARA,      "port get jumbo"},
+    {"anMode",      doAnMode,               1,                "port get anMode <port(0..4)>"},
+    {"localAdv",    doLocalAdv,             1,                "port get localAdv <port(0..4)>"},
+    {"remoteAdv",   doRemoteAdv,            1,                "port get remoteAdv <port(0..4)>"},
+    {"speed",       doPortSpeed,            1,                "port get speed <port(0..4)>"},
+    {"duplex",      doPortDuplex,           1,                "port get duplex <port(0..4)>"},
+    {"status",      doPortStatus,           1,                "port get status <port(0..4)>"},
+    {"bckPres",     doPortBckPres,          1,                "port get bckPres <port(0..6)>"},
+    {"psMode",      doPortPsMode,           1,                "port get psMode <port(0..4)>"},
+    {"smtSpdDwn",   doPortSmtSpdDwn,        1,                "port get smtSpdDwn <port(0..4)>"},
+    {"spTag",       doPortSpTag,            1,                "port get spTag <port(0..6)>"},
+    {"enable",      doPortEnable,           1,                "port get enable <port(0..4)>"},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T portCmds[] =
+{
+    {"set",         doPortSet,      0,      NULL},
+    {"get",         doPortGet,      0,      NULL},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T sptagCmds[] =
+{
+    {"setEnable",       doSptagEn,          2,      "sptag setEnable port<port(0..6)> enable<1:enable 0:disable>"},
+    {"getEnable",       doSptagEn,          1,      "sptag getEnable port<port(0..6)>"},
+    {"setmode",         doSptagMode,        2,      "sptag setmode port<port(0..6)> mode<0:inset 1:replace>"},
+    {"getmode",         doSptagMode,        1,      "sptag getmode port<port(0..6)>"},
+    {"encode",          doSptagEncode,      7,      "sptag encode mode={ insert | replace } opc={ portmap | portid | lookup } dp={bitimap hex} vpm={ untagged | 8100 | 88a8 } pri=<UINT> cfi=<UINT> vid=<UINT> "},
+    {"decode",          doSptagDecode,      4,      "sptag decode <byte(hex)> <byte(hex)> <byte(hex)> <byte(hex)>"},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T vlanSetCmds[] =
+{
+    {"fid",                 doVlanSetFid,               2,      "vlan set fid <vid(0..4095)> <fid(0..7)>"},
+    {"memPort",             doVlanSetMemPort,           2,      "vlan set memPort <vid(0..4095)> <bitmap(6:0)>"},
+    {"ivl",                 doVlanSetIVL,               2,      "vlan set ivl <vid(0..4095)> <(1:En,0:Dis)>"},
+    {"portBaseStag",        doVlanSetPortBaseStag,      2,      "vlan set portBaseStag <vid(0..4095)> <(1:En,0:Dis)>"},
+    {"stag",                doVlanSetStag,              2,      "vlan set stag <vid(0..4095)> <stag(0..4095)>"},
+    {"egsTagCtlEn",         doVlanSetEgsTagCtlEn,       2,      "vlan set egsTagCtlEn <vid(0..4095)> <(1:En,0:Dis)>"},
+    {"egsTagCtlCon",        doVlanSetEgsTagCtlCon,      2,      "vlan set egsTagCtlCon <vid(0..4095)> <(1:En,0:Dis)>"},
+    {"egsTagCtl",           doVlanSetEgsTagCtl,         3,      "vlan set egsTagCtl <vid(0..4095)> <port(0..6)> <ctlType(0:untag,2:tagged)>"},
+
+    {"portActFrame",        doVlanSetPortActFrame,      2,      "vlan set portActFrame <port(0..6)> <frameType(0:all,1:tagged,2:untagged)>"},
+    {"leakyVlanEn",         doVlanSetLeakyVlanEn,       3,      "vlan set LeakyVlanEn <port(0..6)> <pktType(0:uc,1:mc,2:bc,3:ipmc)> <(1:En,0:Dis)>"},
+    {"portVlanAttr",        doVlanSetPortVlanAttr,      2,      "vlan set portVlanAttr <port(0..6)> <vlanAttr(0:user,1:stack,2:translation,3:transparent)>"},
+    {"igsPortETagAttr",     doVlanSetIgsPortETagAttr,   2,      "vlan set igsPortETagAttr <port(0..6)> <egsTagAttr(0:disable,1:consistent,4:untagged,5:swap,6:tagged,7:stack)>"},
+    {"portEgsTagAttr",      doVlanSetPortETagAttr,      2,      "vlan set portEgsTagAttr <port(0..6)> <egsTagAttr(0:untagged,1:swap,2:tagged,3:stack)>"},
+    {"portOuterTPID",       doVlanSetPortOuterTPID,     2,      "vlan set portOuterTPID <port(0..6)> <TPID(hex)>"},
+    {"pvid",                doVlanSetPvid,              2,      "vlan set pvid <port(0..6)> <vid(0..4095)>"},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T vlanGetCmds[] =
+{
+    {"portActFrame",        doVlanGetPortActFrame,      1,      "vlan get portActFrame <port(0..6)>"},
+    {"leakyVlanEn",         doVlanGetLeakyVlanEn,       1,      "vlan get leakyVlanEn <port(0..6)>"},
+    {"portVlanAttr",        doVlanGetPortVlanAttr,      1,      "vlan get portVlanAttr <port(0..6)>"},
+    {"igsPortETagAttr",     doVlanGetIgsPortETagAttr,   1,      "vlan get igsPortETagAttr <port(0..6)>"},
+    {"portEgsTagAttr",      doVlanGetPortETagAttr,      1,      "vlan get portEgsTagAttr <port(0..6)>"},
+    {"portOuterTPID",       doVlanGetPortOuterTPID,     1,      "vlan get portOuterTPID <port(0..6)>"},
+    {"pvid",                doVlanGetPvid,              1,      "vlan get pvid <port(0..6)>"},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T vlanCmds[] =
+{
+    {"initiate",        doVlanInitiate,         9,      "vlan initiate <vid(0..4095)> <fid(0..7)> <bitmap(6:0)> <ivl(1:En,0:Dis)> <portbasestag(1:En,0:Dis)> <stag(0..4095)> <egstagctlen(1:En,0:Dis)> <egstagcon(1:En,0:Dis)> <taggedbitmap(6:0)>"},
+    {"create",          doVlanCreate,           1,      "vlan create <vid(0..4095)>"},
+    {"destroy",         doVlanDestroy,          1,      "vlan destroy [ <vid(0..4095)> | <vidRange(vid0-vid1)> ]"},
+    {"destroyAll",      doVlanDestroyAll,       0,      "vlan destroyAll [ <restoreDefVlan(0:false,1:true)> | ]"},
+    {"dump",            doVlanDump,             0,      "vlan dump [ <vid(0..4095)> | <vidRange(vid0-vid1)> | ]"},
+    {"addPortMem",      doVlanAddPortMem,       2,      "vlan addPortMem <vid(0..4095)> <port(0..6)>"},
+    {"delPortMem",      doVlanDelPortMem,       2,      "vlan addPortMem <vid(0..4095)> <port(0..6)>"},
+    {"set",             doVlanSet,              0,      NULL},
+    {"get",             doVlanGet,              0,      NULL},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T l2ClearCmds[] =
+{
+    {"mac",              doMacAddr,          CMD_NO_PARA,    "l2 clear mac"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T l2DelCmds[] =
+{
+    {"mac",             doMacAddr,           3,    "l2 del mac <mac(12'hex)> [ vid <vid(0..4095)> | fid <fid(0..15)> ]"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T l2AddCmds[] =
+{
+    {"mac",             doMacAddr,           7,    "l2 add mac <static(0:dynamic,1:static)> <unauth(0:auth,1:unauth)> <mac(12'hex)> <portlist(uintlist)> [ vid <vid(0..4095)> | fid <fid(0..15)> ] <src_mac_forward=(0:default,1:cpu-exclude,2:cpu-include,3:cpu-only,4:drop)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T l2SetCmds[] =
+{
+    {"macAddrAgeOut",   doMacAddrAgeOut,    1,    "l2 set macAddrAgeOut <time(1, 1000000)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T l2GetCmds[] =
+{
+    {"mac",             doGetMacAddr,       3,              "l2 get mac <mac(12'hex)> [ vid <vid(0..4095)> | fid <fid(0..15)> ]"},
+    {"macAddrAgeOut",   doMacAddrAgeOut,    CMD_NO_PARA,    "l2 get macAddrAgeOut"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T l2DumpCmds[] =
+{
+    {"mac",                doDumpMacAddr,        0,    "l2 dump mac"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T l2Cmds[] =
+{
+    {"add",         doL2Add,        0,        NULL},
+    {"del",         doL2Del,        0,        NULL},
+    {"clear",       doL2Clear,      0,        NULL},
+    {"get",         doL2Get,        0,        NULL},
+    {"set",         doL2Set,        0,        NULL},
+    {"dump",        doL2Dump,       0,        NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T lagGetCmds[] =
+{
+    {"member",      doLagMember,    1,              "lag get member group_id(0 or 1)"},
+    {"dstInfo",     doLagDstInfo,   CMD_NO_PARA,    "lag get dstInfo"},
+    {"ptseed",      doLagPtseed,    CMD_NO_PARA,    "lag get ptseed"},
+    {"hashtype",    doLagHashtype,  CMD_NO_PARA,    "lag get hashtype"},
+    {"state",       doLagState,     CMD_NO_PARA,    "lag get state"},
+    {"spsel",       doLagSpsel,     CMD_NO_PARA,    "lag get spsel"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T lagSetCmds[] =
+{
+    {"member",       doLagMember,        4,    "lag set member <group_id(0 or 1)> <member_index(0..3)> <enable(0,1)> <port index(0..6)>"},
+    {"dstInfo",      doLagDstInfo,       7,    "lag set dstInfo <sp(1:En,0:Dis)> <sa(1:En,0:Dis)> <da(1:En,0:Dis)> <sip(1:En,0:Dis)> <dip(1:En,0:Dis)> <sport(1:En,0:Dis)> <dport(1:En,0:Dis)>"},
+    {"ptseed",       doLagPtseed,        1,    "lag set ptseed <hex32>"},
+    {"hashtype",     doLagHashtype,      1,    "lag set hashtype <0-crc32lsb;1-crc32msb;2-crc16;3-xor4>"},
+    {"state",        doLagState,         1,    "lag set state <state(1:En,0:Dis)>"},
+    {"spsel",        doLagSpsel,         1,    "lag set spsel <soure port enable(1:En,0:Dis)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T lagCmds[] =
+{
+    {"get",          doLagGet,        0,        NULL},
+    {"set",          doLagSet,        0,        NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T stpGetCmds[] =
+{
+    {"portstate",    doStpPortstate,  2,    "stp get portstate <port(0..6)> <fid(0..15)>"},
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T stpSetCmds[] =
+{
+    {"portstate",    doStpPortstate,  3,    "stp set portstate <port(0..6)> <fid(0..15)> <state(0:disable,1:listen,2:learn,3:forward)>"},
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T stpCmds[] =
+{
+    {"get",         doStpGet,           0,      NULL},
+    {"set",         doStpSet,           0,      NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T mirrorSetCmds[] =
+{
+    {"session",        doMirrorSetSession,       6,      "mirror set session <sid(0,1)> <dst_port(UINT)> <state(1:En,0:Dis)> <tag(1:on, 0:off)> <list(UINTLIST)> <dir(0:none,1:tx,2:rx,3:both)>"},
+    {"session-enable", doMirrorSetSessionEnable, 2,      "mirror set session-enable <sid(0,1)> <state(1:En,0:Dis)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T mirrorAddCmds[] =
+{
+    {"session-rlist",  doMirrorAddRlist,       2,      "mirror add session-rlist <sid(0,1)> <list(UINTLIST)>"},
+    {"session-tlist",  doMirrorAddTlist,       2,      "mirror add session-tlist <sid(0,1)> <list(UINTLIST)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T mirrorGetCmds[] =
+{
+    {"session",        doMirrorGetSid,       1,      "mirror get session <sid(0,1)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T mirrorDelCmds[] =
+{
+    {"session",        doMirrorDelSid,       1,      "mirror del session <sid(0,1)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T mirrorCmds[] =
+{
+    {"set",         doMirrorSet,        0,      NULL},
+    {"add",         doMirrorAdd,        0,      NULL},
+    {"get",         doMirrorGet,        0,      NULL},
+    {"del",         doMirrorDel,        0,      NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T mibClearCmds[] =
+{
+    {"port",        doMibClearPort,     1,      "mib clear port <port(0..6)>"},
+    {"all",         doMibClearPort,     0,      "mib clear all"},
+    {"acl",         doMibClearAcl,      0,      "mib clear acl"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T mibGetCmds[] =
+{
+    {"port",        doMibGetPort,       1,      "mib get port <port(0..6)>"},
+    {"acl",         doMibGetAcl,        1,      "mib get acl <event(0..7)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T mibCmds[] =
+{
+    {"clear",       doMibClear,         0,      NULL},
+    {"get",         doMibGet,           0,      NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T qosGetCmds[] =
+{
+    {"scheduleAlgo",    doQosScheduleAlgo,      2,  "qos get scheduleAlgo <portlist(UINTLIST)> <queue(UINT)>"},
+    {"trustMode",       doQosTrustMode,         1,  "qos get trustMode <portlist(UINTLIST)>"},
+    {"pri2Queue",       doQosPri2Queue,         0,  "qos get pri2Queue"},
+    {"dscp2Pri",        doQosDscp2Pri,          1,  "qos get dscp2Pri <dscp(0..63)>"},
+    {"rateLimitEnable", doQosRateLimitEnable,   1,  "qos get rateLimitEnable <portlist(UINTLIST)>"},
+    {"rateLimit",       doQosRateLimit,         1,  "qos get rateLimit <portlist(UINTLIST)>"},
+    {"portPriority",    doQosPortPriority,      1,  "qos get portPriority <portlist(UINTLIST)>"},
+    {"rateLmtExMngFrm", doQosRateLimitExMngFrm, 0,  "qos get rateLmtExMngFrm"},
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T qosSetCmds[] =
+{
+    {"scheduleAlgo",    doQosScheduleAlgo,      4,  "qos set scheduleAlgo <portlist(UINTLIST)> <queue(UINT)> <scheduler(0:SP,1:WRR,2:WFQ)> <weight(0..128)>, weight 0 is valid only on sp mode"},
+    {"trustMode",       doQosTrustMode,         2,  "qos set trustMode <portlist(UINTLIST)> <mode(0:port,1:1p-port,2:dscp-port,3:dscp-1p-port>"},
+    {"pri2Queue",       doQosPri2Queue,         2,  "qos set pri2Queue <priority(0..7)> <queue(0..7)>"},
+    {"dscp2Pri",        doQosDscp2Pri,          2,  "qos set dscp2Pri <dscp(0..63)> <priority(0..7)>"},
+    {"rateLimitEnable", doQosRateLimitEnable,   3,  "qos set rateLimitEnable <portlist(UINTLIST)> <dir(0:egress,1:ingress)> <rate_en(1:En,0:Dis)>"},
+    {"rateLimit",       doQosRateLimit,         5,  "qos set rateLimit <portlist(UINTLIST)> <I_CIR(0..80000)> <I_CBS(0..127)> <E_CIR(0..80000)> <E_CBS(0..127)>"},
+    {"portPriority",    doQosPortPriority,      2,  "qos set portPriority <portlist(UINTLIST)> <priority(0..7)>"},
+    {"rateLmtExMngFrm", doQosRateLimitExMngFrm, 2,  "qos set rateLmtExMngFrm <dir(0:egress)> <en(0:include,1:exclude)>"},
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T qosCmds[] =
+{
+    {"get",          doQosGet,        0,        NULL},
+    {"set",          doQosSet,        0,        NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T diagSetCmds[] =
+{
+    {"txComply",    doDiagTxComply,     2,      "diag set txComply <phy(0..5)> <mode(0..8)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T diagGetCmds[] =
+{
+    {"txComply",    doDiagTxComply,     1,      "diag get txComply <phy(0..5)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T diagCmds[] =
+{
+    {"set",         doDiagSet,          0,      NULL},
+    {"get",         doDiagGet,          0,      NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T ledSetCmds[] =
+{
+    {"mode",        doLedMode,          1,      "led set mode <mode(0:disable, 1..3:2 LED, 4:user-define)>"},
+    {"state",       doLedState,         2,      "led set state <led(0..1)> <state(1:En,0:Dis)>"},
+    {"usr",         doLedUsrDef,        4,      "led set usr <led(0..1)> <polarity(0:low, 1:high)> <on_evt(7'bin)> <blink_evt(10'bin)>"},
+    {"time",        doLedBlkTime,       1,      "led set time <time(0..5:32ms~1024ms)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T ledGetCmds[] =
+{
+    {"mode",        doLedMode,          CMD_NO_PARA,      "led get mode"},
+    {"state",       doLedState,         1,                "led get state <led(0..1)>"},
+    {"usr",         doLedUsrDef,        1,                "led get usr <led(0..1)>"},
+    {"time",        doLedBlkTime,       CMD_NO_PARA,      "led get time"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T ledCmds[] =
+{
+    {"set",         doLedSet,           0,      NULL},
+    {"get",         doLedGet,           0,      NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T showCmds[] =
+{
+    {"version",     doShowVersion,        0,        NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T secGetCmds[] =
+{
+    {"stormEnable",     doStormEnable,   2,  "sec get stormEnable <port(0..6)> <type(0:bcst,1:mcst,2:ucst)>"},
+    {"stormRate",       doStormRate,     2,  "sec get stormRate <port(0..6)> <type(0:bcst,1:mcst,2:ucst)>"},
+    {"fldMode",         doFldMode,       2,  "sec get fldMode <port(0..6)> <type(0:bcst,1:mcst,2:ucst,3:qury>"},
+    {"saLearning",      doSaLearning,    1,  "sec get saLearning <port(0..6)>"},
+    {"saLimit",         doSaLimit,       1,  "sec get saLimit <port(0..6)>"},
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T secSetCmds[] =
+{
+    {"stormEnable",     doStormEnable,   3,  "sec set stormEnable <port(0..6)> <type(0:bcst,1:mcst,2:ucst)> <en(1:En,0:Dis)>"},
+    {"stormRate",       doStormRate,     4,  "sec set stormRate <port(0..6)> <type(0:bcst,1:mcst,2:ucst)> <count(0..255)> <unit(0:64k,1:256k,2:1M,3:4M,4:16M)>"},
+    {"fldMode",         doFldMode,       3,  "sec set fldMode <port(0..6)> <type(0:bcst,1:mcst,2:ucst,3:qury> <en(1:En,0:Dis)>"},
+    {"saLearning",      doSaLearning,    2,  "sec set saLearning <port(0..6)> <learn(0:disable,1:enable)>"},
+    {"saLimit",         doSaLimit,       3,  "sec set saLimit <port(0..6)> <mode(0:disable,1:enable)> <count(0..4095)>"},
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T secCmds[] =
+{
+    {"get",          doSecGet,        0,        NULL},
+    {"set",          doSecSet,        0,        NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T switchSetCmds[] =
+{
+    {"cpuPortEn",   doSwitchCpuPortEn,   1,              "switch set cpuPortEn <cpu_en(1:En,0:Dis)>"},
+    {"cpuPort",     doSwitchCpuPort,     1,              "switch set cpuPort <port_number>"},
+    {"phyLCIntrEn",     doSwitchPhyLCIntrEn,     2,      "switch set phyLCIntrEn <phy(0..6)> <(1:En,0:Dis)>"},
+    {"phyLCIntrSts",    doSwitchPhyLCIntrSts,    2,      "switch set phyLCIntrSts <phy(0..6)> <(1:Clear)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T switchGetCmds[] =
+{
+    {"cpuPortEn",   doSwitchCpuPortEn,   CMD_NO_PARA,      "switch get cpuPortEn"},
+    {"cpuPort",     doSwitchCpuPort,     CMD_NO_PARA,      "switch get cpuPort"},
+    {"phyLCIntrEn",     doSwitchPhyLCIntrEn,     1,        "switch get phyLCIntrEn <phy(0..6)>"},
+    {"phyLCIntrSts",    doSwitchPhyLCIntrSts,    1,        "switch get phyLCIntrSts <phy(0..6)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T switchCmds[] =
+{
+    {"set",         doSwitchSet,        0,      NULL},
+    {"get",         doSwitchGet,        0,      NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T aclSetCmds[] =
+{
+    {"en",              doAclEn,            1,                     "acl set en <en(1:En,0:Dis)>"},
+    {"rule",            doAclRule,          CMD_VARIABLE_PARA,     "acl set rule <idx(0..127)>\n <state(0:Dis,1:En)> <reverse(0:Dis,1:En)> <end(0:Dis,1:En)>\n <portmap(7'bin)><ipv6(0:Dis,1:En,2:Not care)>\n[ dmac <dmac(12'hex)> <dmac_mask(12'hex)> ]\n[ smac <smac(12'hex)> <smac_mask(12'hex)> ]\n[ stag <stag(4'hex)> <stag_mask(4'hex)> ]\n[ ctag <ctag(4'hex)> <ctag_mask(4'hex)> ]\n[ etype <etype(4'hex)> <etype_mask(4'hex)> ]\n[ dip <dip(IPADDR)> <dip_mask(IPADDR)> ]\n[ sip <sip(IPADDR)> <sip_mask(IPADDR)> ]\n[ dscp <dscp(2'hex)> <dscp_mask(2'hex)> ]\n[ protocol <protocol(12'hex)> <protocol_mask(12'hex)> ]\n[ dport <dport(4'hex)> <dport_mask(4'hex)> ]\n[ sport <sport(4'hex)> <sport_mask(4'hex)> ]\n[ flow_label <flow_label(4'hex)> <flow_label_mask(4'hex)> ]\n[ udf <udf(4'hex)> <udf_mask(4'hex)> ] "},
+    {"udfRule",         doAclUdfRule,       7,                     "acl set udfRule <idx(0..15)> <mode(0:pattern, 1:threshold)> [ <pat(4'hex)> <mask(4'hex)> | <low(4'hex)> <high(4'hex)> ] <start(0:MAC header, 1:L2 payload, 2:IPv4 header, 3:IPv6 header, 4:L3 payload, 5:TCP header, 6:UDP header, 7: L4 payload)> <offset(0..127,unit:2 bytes)> <portmap(7'bin)>"},
+    {"action",          doAclAction,        CMD_VARIABLE_PARA,     "acl set action <idx(0..127)> \n[ forward <forward(0:Default,4:Exclude CPU,5:Include CPU,6:CPU only,7:Drop)> ]\n[ egtag <egtag(0:Default,1:Consistent,4:Untag,5:Swap,6:Tag,7:Stack)> ]\n[ mirrormap <mirrormap(2'bin)> ]\n[ priority <priority(0..7)> ]\n[ redirect <redirect(0:Dst,1:Vlan)> <portmap(7'bin)> ]\n[ leaky_vlan <leaky_vlan(1:En,0:Dis)> ]\n[ cnt_idx <cnt_idx(0..63)> ]\n[ rate_idx <rate_idx(0..31)> ] \n[ attack_idx <attack_idx(0..95)> ] \n[ vid <vid(0..4095)> ] \n[ manage <manage(1:En,0:Dis)> ] \n[ bpdu <bpdu(1:En,0:Dis)> ]\n[ class <class(0:Original,1:Defined)>[0..7] ]\n[ drop_pcd <drop_pcd(0:Original,1:Defined)> [red <red(0..7)>][yellow <yellow(0..7)>][green <green(0..7)>] ]\n[ color <color(0:Defined,1:Trtcm)> [ <defined_color(0:Dis,1:Green,2:Yellow,3:Red)> | <trtcm_idx(0..31)> ] ]"},
+    {"trtcm",           doAclTrtcm,         5,                     "acl set trtcm <idx(1..31)> <cir(4'hex)> <pir(4'hex)> <cbs(4'hex)> <pbs(4'hex)>"},
+    {"trtcmEn",         doAclTrtcmEn,       1,                     "acl set trtcmEn <en(1:En,0:Dis)>"},
+    {"portEn",          doAclPortEn,        2,                     "acl set portEn <port(0..6)> <en(1:En,0:Dis)>"},
+    {"dropEn",          doAclDropEn,        2,                     "acl set dropEn <port(0..6)> <en(1:En,0:Dis)>"},
+    {"dropThrsh",       doAclDropThrsh,     5,                     "acl set dropThrsh <port(0..6)> <color(0:green,1:yellow,2:red)> <queue(0..7)> <high(0..2047)> <low(0..2047)>"},
+    {"dropPbb",         doAclDropPbb,       4,                     "acl set dropPbb <port(0..6)> <color(0:green,1:yellow,2:red)> <queue(0..7)> <probability(0..1023)>"},
+    {"meter",           doAclMeter,         3,                     "acl set meter <idx(0..31)> <en(1:En,0:Dis)> <rate(0..65535)>\n Note: Limit rate = rate * 64Kbps"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T aclGetCmds[] =
+{
+    {"en",              doAclEn,            CMD_NO_PARA,    "acl get en"},
+    {"rule",            doAclRule,          1,              "acl get rule <idx(0..127)> "},
+    {"udfRule",         doAclUdfRule,       1,              "acl get udfRule <idx(0..15)>"},
+    {"action",          doAclAction,        1,              "acl get action <idx(0..127)>"},
+    {"trtcm",           doAclTrtcm,         1,              "acl get trtcm <idx(1..31)>"},
+    {"trtcmEn",         doAclTrtcmEn,       CMD_NO_PARA,    "acl get trtcmEn"},
+    {"portEn",          doAclPortEn,        1,              "acl get portEn <port(0..6)>"},
+    {"dropEn",          doAclDropEn,        1,              "acl get dropEn <port(0..6)>"},
+    {"dropThrsh",       doAclDropThrsh,     3,              "acl get dropThrsh <port(0..6)> <color(0:green,1:yellow,2:red)> <queue(0..7)>"},
+    {"dropPbb",         doAclDropPbb,       3,              "acl get dropPbb <port(0..6)> <color(0:green,1:yellow,2:red)> <queue(0..7)>"},
+    {"meter",           doAclMeter,         1,              "acl get meter <idx(0..31)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T aclDelCmds[] =
+{
+    {"rule",        doAclRmvRule,          1,         "acl del rule <idx(0..127)>"},
+    {"udfRule",     doAclRmvUdfRule,       1,         "acl del udfRule <idx(0..15)>"},
+    {"action",      doAclRmvAction,        1,         "acl del action <idx(0..127)>"},
+    {"trtcm",       doAclRmvTrtcm,         1,         "acl del trtcm <idx(0..31)>"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T aclClearCmds[] =
+{
+    {"rule",        doAclRmvRule,          CMD_NO_PARA,       "acl clear rule"},
+    {"udfRule",     doAclRmvUdfRule,       CMD_NO_PARA,       "acl clear udfRule"},
+    {"action",      doAclRmvAction,        CMD_NO_PARA,       "acl clear action"},
+    {"trtcm",       doAclRmvTrtcm,         CMD_NO_PARA,       "acl clear trtcm"},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T aclCmds[] =
+{
+    {"set",         doAclSet,           0,      NULL},
+    {"get",         doAclGet,           0,      NULL},
+    {"del",         doAclDel,           0,      NULL},
+    {"clear",       doAclClear,         0,      NULL},
+    {"dump",        doAclDump,          0,      NULL},
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+static AIR_CMD_T Cmds[] =
+{
+    {"reg",         doReg,          0,      NULL},
+    {"phy",         doPhy,          0,      NULL},
+    {"port",        doPort,         0,      NULL},
+    {"vlan",        doVlan,         0,      NULL},
+    {"l2",          doL2,           0,      NULL},
+    {"lag",         doLag,          0,      NULL},
+    {"stp",         doStp,          0,      NULL},
+    {"mirror",      doMirror,       0,      NULL},
+    {"mib",         doMib,          0,      NULL},
+    {"qos",         doQos,          0,      NULL},
+    {"diag",        doDiag,         0,      NULL},
+    {"led",         doLed,          0,      NULL},
+    {"switch",      doSwitch,       0,      NULL},
+    {"show",        doShow,         0,      NULL},
+    {"sec",         doSec,          0,      NULL},
+    {"acl",         doAcl,          0,      NULL},
+    {"sptag",       doSptag,        0,      NULL},
+
+    /* last entry, do not modify this entry */
+    {NULL, NULL, 0, NULL},
+};
+
+/* EXPORTED SUBPROGRAM BODIES
+*/
+
+/* LOCAL SUBPROGRAM BODIES
+*/
+static BOOL_T
+_strcmp(const char *s1, const char *s2)
+{
+    while(*s1 == *s2++)
+        if (*s1++ == '\0')
+            return (0);
+    return (*(const unsigned char *)s1 - *(const unsigned char *)(s2 -1));
+}
+
+static C8_T *
+_strtok_r(
+    C8_T *s,
+    const C8_T *delim,
+    C8_T **last)
+{
+    char *spanp;
+    int c = 0, sc = 0;
+    char *tok;
+
+    if (s == NULL && (s = *last) == NULL)
+    {
+        return (NULL);
+    }
+
+    /*
+     * Skip (span) leading delimiters (s += strspn(s, delim), sort of).
+     */
+    for (;;)
+    {
+        c = *s++;
+        spanp = (char *)delim;
+        do
+        {
+            if (c == (sc = *spanp++))
+            {
+                break;
+            }
+        } while (sc != 0);
+        if (sc == 0)
+        {
+            break;
+        }
+    }
+
+    if (c == 0)
+    {   /* no non-delimiter characters */
+        *last = NULL;
+        return (NULL);
+    }
+    tok = s - 1;
+
+    /*
+     * Scan token (scan for delimiters: s += strcspn(s, delim), sort of).
+     * Note that delim must have one NUL; we stop if we see that, too.
+     */
+    for (;;)
+    {
+        c = *s++;
+        spanp = (char *)delim;
+        do
+        {
+            if ((sc = *spanp++) == c)
+            {
+                if (c == 0)
+                {
+                    s = NULL;
+                }
+                else
+                {
+                    s[-1] = 0;
+                }
+                *last = s;
+                return (tok);
+            }
+        } while (sc != 0);
+    }
+    /* NOTREACHED */
+}
+
+static C8_T *
+_strtok(
+    C8_T *s,
+    const C8_T *delim,
+    C8_T **last)
+{
+    return _strtok_r(s, delim, last);
+}
+
+UI32_T
+_strtoul(
+    const C8_T *cp,
+    C8_T **endp,
+    UI32_T base)
+{
+    UI32_T result = 0, value = 0;
+
+    if (!base)
+    {
+        base = 10;
+        if (*cp == '0')
+        {
+            base = 8;
+            cp++;
+            if ((TOLOWER(*cp) == 'x') && isxdigit(cp[1]))
+            {
+                cp++;
+                base = 16;
+            }
+        }
+    }
+    else if (base == 16)
+    {
+        if (cp[0] == '0' && TOLOWER(cp[1]) == 'x')
+        {
+            cp += 2;
+        }
+    }
+    while (isxdigit(*cp) &&
+           (value = isdigit(*cp) ? *cp-'0' : TOLOWER(*cp)-'a'+10) < base)
+    {
+        result = result*base + value;
+        cp++;
+    }
+    if (endp)
+    {
+        *endp = (char *)cp;
+    }
+    return result;
+}
+
+static I32_T
+_strtol(
+    const C8_T *cp,
+    C8_T **endp,
+    UI32_T base)
+{
+    if(*cp=='-')
+    {
+        return -_strtoul(cp + 1, endp, base);
+    }
+    return _strtoul(cp, endp, base);
+}
+
+static AIR_ERROR_NO_T
+_str2mac(
+        C8_T *str,
+        C8_T *mac)
+{
+    UI32_T i = 0;
+    C8_T tmpstr[3];
+
+    /* check str */
+    AIR_CHECK_PTR(str);
+    AIR_PARAM_CHK(strlen(str) != AIR_MAC_LEN, AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(mac);
+
+    for(i=0; i<6; i++)
+    {
+        strncpy(tmpstr, str+(i*2), 2);
+        tmpstr[2] = '\0';
+        mac[i] = _strtoul(tmpstr, NULL, 16);
+    }
+
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+_str2ipv4(
+    const C8_T *ptr_str,
+    UI32_T     *ptr_addr)
+{
+    UI32_T value = 0, idx = 0, shift = 0;
+
+    AIR_CHECK_PTR(ptr_str);
+    AIR_CHECK_PTR(ptr_addr);
+
+    /* e.g. 192.168.1.2, strlen = 11 */
+    for (idx = 0; idx < strlen(ptr_str); idx++)
+    {
+        if (('0' <= ptr_str[idx]) && ('9' >= ptr_str[idx]))
+        {
+            value = (value * 10) + (ptr_str[idx] - '0');
+        }
+        else if ('.' == ptr_str[idx])
+        {
+            CMD_CHECK_PARA(value, <, 256); /* Error: invalid value */
+            CMD_CHECK_PARA(shift, <, 4);   /* Error: mem-overwrite */
+            *ptr_addr |= value << (24 - shift * 8);
+            shift += 1;
+            value = 0;
+        }
+        else
+        {
+            return AIR_E_BAD_PARAMETER; /* Error: not a digit number or dot */
+        }
+    }
+    CMD_CHECK_PARA(value, <, 256); /* Error: invalid value */
+    CMD_CHECK_PARA(shift, ==, 3);  /* Error: not an ipv4 addr */
+    *ptr_addr |= value << (24 - shift * 8);
+
+    return AIR_E_OK;
+}
+
+AIR_ERROR_NO_T
+_str2ipv6(
+    const C8_T  *ptr_str,
+    UI8_T       *ptr_addr)
+{
+    UI32_T              hex_value = 0, dec_value = 0, idx = 0;
+    BOOL_T              double_colon = FALSE, ipv4_compatible = FALSE;
+    UI32_T              double_colon_pos = 0, last_pos = 0;
+    UI8_T               tmp_ipv6[16] = {0};
+
+    AIR_CHECK_PTR(ptr_str);
+    AIR_CHECK_PTR(ptr_addr);
+
+    /* e.g. invalid:
+     * 3ffe::c0a8:0:      last cannot be colon except double-colon
+     * 3ffe:::c0a8:0      triple-colon
+     * 3ffe::c0a8::0      two double-colons
+     */
+
+    /* e.g. valid:
+     * 3ffe::c0a8:0       strlen = 12 (double-colon in middle)
+     * 3ffe:c0a8:0::      strlen = 13 (double-colon in last)
+     * ::3ffe:c0a8:0      strlen = 13 (double-colon in first)
+     * 3ffe::192.168.0.0  strlen = 17 (IPv4-compatible address)
+     */
+    for (idx = 0; idx < strlen(ptr_str); idx++)
+    {
+        if (('0' <= ptr_str[idx]) && ('9' >= ptr_str[idx]))
+        {
+            hex_value = (hex_value << 4) + (ptr_str[idx] - '0');
+            dec_value = (dec_value * 10) + (ptr_str[idx] - '0');
+        }
+        else if (('a' <= ptr_str[idx]) && ('f' >= ptr_str[idx]))
+        {
+            hex_value = (hex_value << 4) + (ptr_str[idx] - 'a') + 10;
+        }
+        else if (('A' <= ptr_str[idx]) && ('F' >= ptr_str[idx]))
+        {
+            hex_value = (hex_value << 4) + (ptr_str[idx] - 'A') + 10;
+        }
+        else if (':' == ptr_str[idx])
+        {
+            /* must belong to double-colon, calculate from last */
+            if (0 == idx)
+            {
+                continue;
+            }
+            /* not the first ch but a double-colon */
+            else if (':' == ptr_str[idx - 1])
+            {
+                CMD_CHECK_PARA(double_colon, ==, FALSE); /* Error: triple-colon or two double-colons */
+                double_colon = TRUE;
+            }
+            /* not the first ch and a double-colon */
+            else
+            {
+                CMD_CHECK_PARA(double_colon_pos, <, 15); /* Error: only 16 units for UI8_T  */
+                CMD_CHECK_PARA(last_pos,         <, 15); /* Error: only 16 units for UI8_T  */
+                tmp_ipv6[last_pos]     = (UI8_T)((hex_value >> 8) & 0xff);
+                tmp_ipv6[last_pos + 1] = (UI8_T)((hex_value >> 0) & 0xff);
+                double_colon_pos += (FALSE == double_colon)? 2 : 0;
+                last_pos += 2;
+                hex_value = 0;
+                dec_value = 0;
+            }
+        }
+        else if ('.' == ptr_str[idx])
+        {
+            CMD_CHECK_PARA(last_pos, <, 16); /* Error: only 16 units for UI8_T  */
+            tmp_ipv6[last_pos] = dec_value;
+            last_pos += 1;
+            dec_value = 0;
+            ipv4_compatible = TRUE;
+        }
+        else
+        {
+            return AIR_E_BAD_PARAMETER; /* Error: not a hex number or colon */
+        }
+    }
+
+    /* last data */
+    if (':' != ptr_str[idx - 1])
+    {
+        if (FALSE == ipv4_compatible)
+        {
+            CMD_CHECK_PARA(last_pos, <, 15); /* Error: only 16 units for UI8_T  */
+            tmp_ipv6[last_pos]     = (UI8_T)((hex_value >> 8) & 0xff);
+            tmp_ipv6[last_pos + 1] = (UI8_T)((hex_value >> 0) & 0xff);
+            last_pos += 2;
+        }
+        else
+        {
+            CMD_CHECK_PARA(last_pos, <, 16); /* Error: only 16 units for UI8_T  */
+            tmp_ipv6[last_pos] = dec_value;
+            last_pos += 1;
+        }
+    }
+    else
+    {
+        if (':' != ptr_str[idx - 2])
+        {
+            return AIR_E_BAD_PARAMETER; /* Error: last cannot be colon except double-colon */
+        }
+    }
+
+    /* move tmp_ipv6 to ptr_value */
+    if (TRUE == double_colon)
+    {
+        /* e.g.
+         * 3ffe::c0a8:0       double_colon_pos = 2, last_pos = 4+2, tmp_ipv6 = {3f,fe,c0,a8,00,00,...}
+         * 3ffe:c0a8:0::      double_colon_pos = 6, last_pos = 6,   tmp_ipv6 = {3f,fe,c0,a8,00,00,...}
+         * ::3ffe:c0a8:0      double_colon_pos = 0, last_pos = 4+2, tmp_ipv6 = {3f,fe,c0,a8,00,00,...}
+         * 3ffe::192.168.0.0  double_colon_pos = 2, last_pos = 5+1, tmp_ipv6 = {3f,fe,c0,a8,00,00,...}
+         *
+         *                                 0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
+         * 3ffe::c0a8:0       ptr_value = {3f,fe,--,--,--,--,--,--,--,--,--,--,--,--,--,--}
+         * 3ffe:c0a8:0::      ptr_value = {3f,fe,c0,a8,00,00,--,--,--,--,--,--,--,--,--,--}
+         * ::3ffe:c0a8:0      ptr_value = {--,--,--,--,--,--,--,--,--,--,--,--,--,--,--,--}
+         * 3ffe::192.168.0.0  ptr_value = {3f,fe,--,--,--,--,--,--,--,--,--,--,--,--,--,--}
+         */
+        for (idx = 0; idx < double_colon_pos; idx++)
+        {
+            ptr_addr[idx] = tmp_ipv6[idx];
+        }
+        /* e.g.
+         *                                 0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f
+         * 3ffe::c0a8:0       ptr_value = {3f,fe,--,--,--,--,--,--,--,--,--,--,c0,a8,00,00}
+         * 3ffe:c0a8:0::      ptr_value = {3f,fe,c0,a8,00,00,--,--,--,--,--,--,--,--,--,--}
+         * ::3ffe:c0a8:0      ptr_value = {--,--,--,--,--,--,--,--,--,--,3f,fe,c0,a8,00,00}
+         * 3ffe::192.168.0.0  ptr_value = {3f,fe,--,--,--,--,--,--,--,--,--,--,c0,a8,00,00}
+         */
+        for (idx = double_colon_pos; idx < last_pos; idx++)
+        {
+            ptr_addr[16 - (last_pos - idx)] = tmp_ipv6[idx];
+        }
+    }
+    else
+    {
+        for (idx = 0; idx < 16; idx++)
+        {
+            ptr_addr[idx] = tmp_ipv6[idx];
+        }
+    }
+
+    return AIR_E_OK;
+}
+
+void
+_showIpv6Str(
+    const UI8_T *ptr_ipv6,
+    C8_T *ptr_str)
+{
+    UI32_T idx = 0, next = 0, last = 16;
+    UI32_T cont_zero = 0;
+
+    while (idx < last)
+    {
+        if ((0 == cont_zero) && (0 == ptr_ipv6[idx]) && (0 == ptr_ipv6[idx + 1]))
+        {
+            next = idx + 2;
+
+            while (next < last)
+            {
+                if ((ptr_ipv6[next]) || (ptr_ipv6[next + 1]))
+                {
+                    AIR_PRINT(
+                            ptr_str + strlen(ptr_str),
+                            40 - strlen(ptr_str),
+                            "%s", (cont_zero) ? (":") : (":0"));
+                    break;
+                }
+
+                if (0 == cont_zero)
+                {
+                    cont_zero = 1;
+                }
+                next += 2;
+            }
+
+            if (next == last)
+            {
+
+                AIR_PRINT(
+                        ptr_str + strlen(ptr_str),
+                        40 - strlen(ptr_str),
+                        "%s", (cont_zero) ? ("::") : (":0"));
+            }
+
+            idx = next;
+        }
+        else
+        {
+            if (idx)
+            {
+                AIR_PRINT(
+                    ptr_str + strlen(ptr_str),
+                    40 - strlen(ptr_str),
+                    ":");
+            }
+
+            if (ptr_ipv6[idx])
+            {
+                AIR_PRINT(
+                    ptr_str + strlen(ptr_str),
+                    40 - strlen(ptr_str),
+                    "%0x%02x", ptr_ipv6[idx], ptr_ipv6[idx + 1]);
+            }
+            else
+            {
+                AIR_PRINT(
+                    ptr_str + strlen(ptr_str),
+                    40 - strlen(ptr_str),
+                    "%0x", ptr_ipv6[idx + 1]);
+            }
+
+            idx += 2;
+        }
+    }
+}
+
+static AIR_ERROR_NO_T
+_hex2bit(
+        const UI32_T hex,
+        UI32_T *ptr_bit)
+{
+    UI32_T i = 0;
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(ptr_bit);
+
+    (*ptr_bit) = 0;
+    for(i=0; i<AIR_MAX_NUM_OF_PORTS; i++)
+    {
+        if(hex & BIT(i))
+        {
+            (*ptr_bit) |= BITS_OFF_L(1UL, 4*(AIR_MAX_NUM_OF_PORTS - i - 1), 4);
+        }
+    }
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+_hex2bitstr(
+        const UI32_T hex,
+        C8_T *ptr_bit_str,
+        UI32_T str_len)
+{
+    UI32_T i = 0;
+    C8_T str_bitmap[AIR_MAX_NUM_OF_PORTS+1];
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(ptr_bit_str);
+    AIR_PARAM_CHK(str_len <= AIR_MAX_NUM_OF_PORTS, AIR_E_BAD_PARAMETER);
+
+    memset(str_bitmap, 0, AIR_MAX_NUM_OF_PORTS+1);
+
+    for(i=0; i<AIR_MAX_NUM_OF_PORTS; i++)
+    {
+        if(hex & BIT(i))
+        {
+            str_bitmap[i] = '1';
+        }
+        else
+        {
+            str_bitmap[i] = '-';
+        }
+    }
+    str_bitmap[i] = '\0';
+    strncpy(ptr_bit_str, str_bitmap, i+1);
+
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+_portListStr2Ary(
+    const C8_T *str,
+    UI32_T *ary,
+    const UI32_T ary_num)
+{
+    UI32_T i = 0;
+    UI32_T str_len = 0;
+    UI32_T val = 0;
+    C8_T *str2;
+    C8_T *pch;
+    C8_T *last;
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(str);
+    AIR_CHECK_PTR(ary);
+    AIR_PARAM_CHK(0 == ary_num, AIR_E_BAD_PARAMETER);
+
+    /* Allocate new string */
+    str_len = strlen(str);
+    str2 = AIR_MALLOC(str_len+1);
+    AIR_CHECK_PTR(str2);
+    memset(str2, 0, str_len+1);
+    strncpy(str2, str, str_len+1);
+
+    /* clear array */
+    memset(ary, 0, ary_num*4);
+
+    /* split string by ',' */
+    pch = _strtok(str2, ",", &last);
+    while(NULL != pch)
+    {
+        val = _strtoul(pch, NULL, 0);
+        ary[val/32] |= BIT(val%32);
+        pch = _strtok(NULL, ",", &last);
+    }
+
+    AIR_FREE(str2);
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+doRegRead(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    UI32_T reg = 0, val = 0;
+
+    reg = _strtoul(argv[0], NULL, 16);
+    aml_readReg(0, reg, &val);
+    AIR_PRINT("Read reg=0x%x, value=0x%x\n", reg, val);
+
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+doRegWrite(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    UI32_T reg = 0, val = 0;
+
+    reg = _strtoul(argv[0], NULL, 16);
+    val = _strtoul(argv[1], NULL, 16);
+    aml_writeReg(0, reg, val);
+    AIR_PRINT("Write reg=0x%x, value=0x%x\n", reg, val);
+
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+doReg(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(regCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doPhyCL22Read(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    UI32_T port = 0, reg = 0, val = 0;
+
+    port = _strtoul(argv[0], NULL, 0);
+    reg  = _strtoul(argv[1], NULL, 16);
+    aml_readPhyReg(0, port, reg, &val);
+    AIR_PRINT("Phy read port=%d, reg=0x%x, value=0x%x\n", port, reg, val);
+
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+doPhyCL22Write(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    UI32_T port = 0, reg = 0, val = 0;
+
+    port = _strtoul(argv[0], NULL, 0);
+    reg  = _strtoul(argv[1], NULL, 16);
+    val  = _strtoul(argv[2], NULL, 16);
+    aml_writePhyReg(0, port, reg, val);
+    AIR_PRINT("Phy write port=%d, reg=0x%x, value=0x%x\n", port, reg, val);
+
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+doPhyCL22(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(phyCL22Cmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doPhyCL45Read(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    UI32_T port = 0, dev = 0, reg = 0, val = 0;
+
+    port = _strtoul(argv[0], NULL, 0);
+    dev  = _strtoul(argv[1], NULL, 16);
+    reg  = _strtoul(argv[2], NULL, 16);
+    aml_readPhyRegCL45(0, port, dev, reg, &val);
+    AIR_PRINT("Phy read port=%d, dev=0x%x, reg=0x%x, value=0x%x\n", port, dev, reg, val);
+
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+doPhyCL45Write(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    UI32_T port = 0, dev = 0, reg = 0, val = 0;
+
+    port = _strtoul(argv[0], NULL, 0);
+    dev  = _strtoul(argv[1], NULL, 16);
+    reg  = _strtoul(argv[2], NULL, 16);
+    val  = _strtoul(argv[3], NULL, 16);
+    aml_writePhyRegCL45(0, port, dev, reg, val);
+    AIR_PRINT("Phy write port=%d, dev=0x%x, reg=0x%x, value=0x%x\n", port, dev, reg, val);
+
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+doPhyCL45(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(phyCL45Cmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doPhy(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(phyCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doPortSetMatrix(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    UI32_T matrix = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port   = _strtoul(argv[0], NULL, 0);
+    matrix = _strtoul(argv[1], NULL, 16);
+    rc = air_port_setPortMatrix(0, port, matrix);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doPortSetVlanMode(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    AIR_PORT_VLAN_MODE_T vlan_mode;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port      = _strtoul(argv[0], NULL, 0);
+    vlan_mode = _strtoul(argv[1], NULL, 0);
+    rc = air_port_setVlanMode(0, port, vlan_mode);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doPortSet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(portSetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doPortGetMatrix(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    UI32_T matrix = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    rc = air_port_getPortMatrix(0, port, &matrix);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+        return rc;
+    }
+    AIR_PRINT("Port %d Matrix: %2x\n", port, matrix);
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doPortGetVlanMode(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    AIR_PORT_VLAN_MODE_T vlan_mode;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    rc = air_port_getVlanMode(0, port, &vlan_mode);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+        return rc;
+    }
+    AIR_PRINT("Port %d Vlan Mode: ", port);
+    switch(vlan_mode)
+    {
+        case AIR_PORT_VLAN_MODE_PORT_MATRIX:
+            AIR_PRINT("matrix(%d)\n", vlan_mode);
+            break;
+        case AIR_PORT_VLAN_MODE_FALLBACK:
+            AIR_PRINT("fallback(%d)\n", vlan_mode);
+            break;
+        case AIR_PORT_VLAN_MODE_CHECK:
+            AIR_PRINT("check(%d)\n", vlan_mode);
+            break;
+        case AIR_PORT_VLAN_MODE_SECURITY:
+            AIR_PRINT("security(%d)\n", vlan_mode);
+            break;
+        default:
+            AIR_PRINT("unknown(%d)\n", vlan_mode);
+            break;
+    };
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doPortGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(portGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doPort(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(portCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doVlanInitiate(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0;
+    AIR_VLAN_ENTRY_ATTR_T vlan_entry = {0};
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid = _strtoul(argv[0], NULL, 0);
+    if (9 == argc)
+    {
+        vlan_entry.vlan_entry_format.fid           = _strtoul(argv[1], NULL, 0);
+        vlan_entry.vlan_entry_format.port_mem      = _strtoul(argv[2], NULL, 0);
+        vlan_entry.vlan_entry_format.ivl           = _strtoul(argv[3], NULL, 0);
+        vlan_entry.vlan_entry_format.port_stag     = _strtoul(argv[4], NULL, 0);
+        vlan_entry.vlan_entry_format.stag          = _strtoul(argv[5], NULL, 0);
+        vlan_entry.vlan_entry_format.eg_ctrl_en    = _strtoul(argv[6], NULL, 0);
+        vlan_entry.vlan_entry_format.eg_con        = _strtoul(argv[7], NULL, 0);
+        vlan_entry.vlan_entry_format.eg_ctrl       = _strtoul(argv[8], NULL, 0);
+
+        rc = air_vlan_create(0, vid, &vlan_entry);
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        rc = AIR_E_BAD_PARAMETER;
+    }
+
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                            break;
+        case     AIR_E_ENTRY_EXISTS:  AIR_PRINT("VLAN already exist!\n");             break;
+        default:                      AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanCreate(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid = _strtoul(argv[0], NULL, 0);
+    rc  = air_vlan_create(0, vid, NULL);
+
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                            break;
+        case     AIR_E_ENTRY_EXISTS:  AIR_PRINT("VLAN already exist!\n");             break;
+        default:                      AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanDestroy(UI32_T argc, C8_T *argv[])
+{
+    C8_T *token = NULL;
+    UI16_T vid = 0, vid_limit = AIR_VLAN_ID_MAX;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    if (argc > 0)
+    {
+        if (isdigit(argv[0][0]))
+        {
+            token = _strtok(argv[0], "-", &argv[0]);
+            vid = _strtoul(token, NULL, 0);
+            if ((token = _strtok(argv[0], "-", &argv[0])))
+                vid_limit = _strtoul(token, NULL, 0);
+            else
+                vid_limit = vid;
+            if (AIR_VLAN_ID_MAX < vid_limit)
+            {
+                AIR_PRINT("vid number should less than %d!\n", AIR_VLAN_ID_MAX);
+                return AIR_E_BAD_PARAMETER;
+            }
+            if (vid > vid_limit)
+            {
+                AIR_PRINT("vid0 should less than vid1!\n");
+                return AIR_E_BAD_PARAMETER;
+            }
+        }
+        else
+        {
+            AIR_PRINT("Bad parameter!\n");
+            return AIR_E_BAD_PARAMETER;
+        }
+    }
+
+    for (; vid <= vid_limit; vid++)
+    {
+        rc = air_vlan_destroy(0, vid);
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanDestroyAll(UI32_T argc, C8_T *argv[])
+{
+    UI32_T restore_def_vlan = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    if (argc > 0)
+    {
+        restore_def_vlan = _strtoul(argv[0], NULL, 0);
+    }
+
+    rc = air_vlan_destroyAll(0, restore_def_vlan);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanDump(UI32_T argc, C8_T *argv[])
+{
+    C8_T *token = NULL;
+    UI16_T port = 0, valid_count = 0, vid = 0, vid_limit = AIR_VLAN_ID_MAX;
+    AIR_PORT_EGS_TAG_ATTR_T tag_ctl[AIR_MAX_NUM_OF_PORTS] = {0};
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    if (argc > 0)
+    {
+        if (isdigit(argv[0][0]))
+        {
+            token = _strtok(argv[0], "-", &argv[0]);
+            vid = _strtoul(token, NULL, 0);
+            if ((token = _strtok(argv[0], "-", &argv[0])))
+                vid_limit = _strtoul(token, NULL, 0);
+            else
+                vid_limit = vid;
+            if (AIR_VLAN_ID_MAX < vid_limit)
+            {
+                AIR_PRINT("vid number should less than %d!\n", AIR_VLAN_ID_MAX);
+                return AIR_E_BAD_PARAMETER;
+            }
+            if (vid > vid_limit)
+            {
+                AIR_PRINT("vid0 should less than vid1!\n");
+                return AIR_E_BAD_PARAMETER;
+            }
+        }
+        else
+        {
+            AIR_PRINT("Bad parameter!\n");
+            return AIR_E_BAD_PARAMETER;
+        }
+    }
+
+    for (valid_count = 0; vid <= vid_limit; vid++)
+    {
+        _air_vlan_readEntry(0, vid, &vlan_entry);
+        if (vlan_entry.valid)
+        {
+            valid_count++;
+            if (1 == valid_count)
+                AIR_PRINT(" Vid Fid MemPort Ivl PortBaseStag Stag EgsTagCtlEn EgsTagCon EgsTagCtl\n======================================================================\n");
+            for (port = 0; port < AIR_MAX_NUM_OF_PORTS; port++)
+                tag_ctl[port] = (vlan_entry.vlan_entry_format.eg_ctrl >> (port * 2)) & 0x3;
+            AIR_PRINT("%4d %3d      %2x %3d %12d %4d %11d %9d   %1x%1x%1x%1x%1x%1x%1x\n",
+                vid, vlan_entry.vlan_entry_format.fid, vlan_entry.vlan_entry_format.port_mem, vlan_entry.vlan_entry_format.ivl,
+                vlan_entry.vlan_entry_format.port_stag, vlan_entry.vlan_entry_format.stag, vlan_entry.vlan_entry_format.eg_ctrl_en, vlan_entry.vlan_entry_format.eg_con,
+                tag_ctl[6], tag_ctl[5], tag_ctl[4], tag_ctl[3], tag_ctl[2], tag_ctl[1], tag_ctl[0]);
+        }
+    }
+
+    if (!valid_count)
+        AIR_PRINT("not found!\n");
+    else
+        AIR_PRINT("Found %d valid entries!\n", valid_count);
+
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+doVlanAddPortMem(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0, port = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid  = _strtoul(argv[0], NULL, 0);
+    port = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_addMemberPort(0, vid, port);
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                               break;
+        case     AIR_E_ENTRY_NOT_FOUND:  AIR_PRINT("VLAN not found!\n");                 break;
+        default:                         AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanDelPortMem(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0, port = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid  = _strtoul(argv[0], NULL, 0);
+    port = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_delMemberPort(0, vid, port);
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                               break;
+        case     AIR_E_ENTRY_NOT_FOUND:  AIR_PRINT("VLAN not found!\n");                 break;
+        default:                         AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetFid(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0;
+    UI8_T  fid = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid = _strtoul(argv[0], NULL, 0);
+    fid = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_setFid(0, vid, fid);
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                               break;
+        case     AIR_E_ENTRY_NOT_FOUND:  AIR_PRINT("VLAN not found!\n");                 break;
+        default:                         AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetMemPort(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0, port_bitmap = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid         = _strtoul(argv[0], NULL, 0);
+    port_bitmap = _strtoul(argv[1], NULL, 16);
+    rc = air_vlan_setMemberPort(0, vid, port_bitmap);
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                               break;
+        case     AIR_E_ENTRY_NOT_FOUND:  AIR_PRINT("VLAN not found!\n");                 break;
+        default:                         AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetIVL(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0;
+    BOOL_T enable = TRUE;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid    = _strtoul(argv[0], NULL, 0);
+    enable = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_setIVL(0, vid, enable);
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                               break;
+        case     AIR_E_ENTRY_NOT_FOUND:  AIR_PRINT("VLAN not found!\n");                 break;
+        default:                         AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetPortBaseStag(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0;
+    BOOL_T enable = TRUE;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid    = _strtoul(argv[0], NULL, 0);
+    enable = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_setPortBasedStag(0, vid, enable);
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                               break;
+        case     AIR_E_ENTRY_NOT_FOUND:  AIR_PRINT("VLAN not found!\n");                 break;
+        default:                         AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetStag(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0, stag = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid  = _strtoul(argv[0], NULL, 0);
+    stag = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_setServiceTag(0, vid, stag);
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                               break;
+        case     AIR_E_ENTRY_NOT_FOUND:  AIR_PRINT("VLAN not found!\n");                 break;
+        default:                         AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetEgsTagCtlEn(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0;
+    BOOL_T enable = TRUE;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid    = _strtoul(argv[0], NULL, 0);
+    enable = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_setEgsTagCtlEnable(0, vid, enable);
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                               break;
+        case     AIR_E_ENTRY_NOT_FOUND:  AIR_PRINT("VLAN not found!\n");                 break;
+        default:                         AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetEgsTagCtlCon(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0;
+    BOOL_T enable = TRUE;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid    = _strtoul(argv[0], NULL, 0);
+    enable = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_setEgsTagConsistent(0, vid, enable);
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                               break;
+        case     AIR_E_ENTRY_NOT_FOUND:  AIR_PRINT("VLAN not found!\n");                 break;
+        default:                         AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetEgsTagCtl(UI32_T argc, C8_T *argv[])
+{
+    UI16_T vid = 0, port = 0;
+    AIR_PORT_EGS_TAG_ATTR_T tag_ctl = AIR_PORT_EGS_TAG_ATTR_UNTAGGED;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    vid     = _strtoul(argv[0], NULL, 0);
+    port    = _strtoul(argv[1], NULL, 0);
+    tag_ctl = _strtoul(argv[2], NULL, 0);
+    rc = air_vlan_setPortEgsTagCtl(0, vid, port, tag_ctl);
+    switch (rc)
+    {
+        case     AIR_E_OK:                                                               break;
+        case     AIR_E_ENTRY_NOT_FOUND:  AIR_PRINT("VLAN not found!\n");                 break;
+        default:                         AIR_PRINT("Error %d: Operation failed!\n", rc); break;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetPortActFrame(UI32_T argc, C8_T *argv[])
+{
+    UI16_T port = 0;
+    AIR_VLAN_ACCEPT_FRAME_TYPE_T type = AIR_VLAN_ACCEPT_FRAME_TYPE_ALL;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    type = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_setPortAcceptFrameType(0, port, type);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetLeakyVlanEn(UI32_T argc, C8_T *argv[])
+{
+    UI16_T port = 0;
+    AIR_LEAKY_PKT_TYPE_T pkt_type = AIR_LEAKY_PKT_TYPE_UNICAST;
+    BOOL_T enable = TRUE;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port     = _strtoul(argv[0], NULL, 0);
+    pkt_type = _strtoul(argv[1], NULL, 0);
+    enable   = _strtoul(argv[2], NULL, 0);
+    rc = air_vlan_setPortLeakyVlanEnable(0, port, pkt_type, enable);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetPortVlanAttr(UI32_T argc, C8_T *argv[])
+{
+    UI16_T port = 0;
+    AIR_VLAN_PORT_ATTR_T attr = AIR_VLAN_PORT_ATTR_USER_PORT;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    attr = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_setPortAttr(0, port, attr);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetIgsPortETagAttr(UI32_T argc, C8_T *argv[])
+{
+    UI16_T port = 0;
+    AIR_IGR_PORT_EG_TAG_ATTR_T attr = AIR_IGR_PORT_EG_TAG_ATTR_DISABLE;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    attr = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_setIgrPortTagAttr(0, port, attr);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetPortETagAttr(UI32_T argc, C8_T *argv[])
+{
+    UI16_T port = 0;
+    AIR_PORT_EGS_TAG_ATTR_T attr = AIR_PORT_EGS_TAG_ATTR_UNTAGGED;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    attr = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_setPortEgsTagAttr(0, port, attr);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetPortOuterTPID(UI32_T argc, C8_T *argv[])
+{
+    UI16_T port = 0, tpid = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    tpid = _strtoul(argv[1], NULL, 16);
+    rc = air_vlan_setPortOuterTPID(0, port, tpid);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSetPvid(UI32_T argc, C8_T *argv[])
+{
+    UI16_T port = 0, pvid = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    pvid = _strtoul(argv[1], NULL, 0);
+    rc = air_vlan_setPortPVID(0, port, pvid);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanSet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(vlanSetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doVlanGetPortActFrame(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    AIR_VLAN_ACCEPT_FRAME_TYPE_T type;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    rc = air_vlan_getPortAcceptFrameType(0, port, &type);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+        return rc;
+    }
+    AIR_PRINT("Port %d Acceptable Frame Type: ", port);
+    switch(type)
+    {
+        case AIR_VLAN_ACCEPT_FRAME_TYPE_ALL:
+            AIR_PRINT("all(%d)\n", type);
+            break;
+        case AIR_VLAN_ACCEPT_FRAME_TYPE_TAG_ONLY:
+            AIR_PRINT("tagged-only(%d)\n", type);
+            break;
+        case AIR_VLAN_ACCEPT_FRAME_TYPE_UNTAG_ONLY:
+            AIR_PRINT("untagged-only(%d)\n", type);
+            break;
+        default:
+            AIR_PRINT("unknown(%d)\n", type);
+            break;
+    };
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanGetLeakyVlanEn(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    BOOL_T uc = FALSE, mc = FALSE, bc = FALSE;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    rc += air_vlan_getPortLeakyVlanEnable(0, port, AIR_LEAKY_PKT_TYPE_UNICAST, &uc);
+    rc += air_vlan_getPortLeakyVlanEnable(0, port, AIR_LEAKY_PKT_TYPE_MULTICAST, &mc);
+    rc += air_vlan_getPortLeakyVlanEnable(0, port, AIR_LEAKY_PKT_TYPE_BROADCAST, &bc);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+        return rc;
+    }
+
+    AIR_PRINT("Port %d Leaky Vlan Enable\n", port);
+    AIR_PRINT("Unicast     : %s\n", uc ? "TRUE" : "FALSE");
+    AIR_PRINT("Multicast   : %s\n", mc ? "TRUE" : "FALSE");
+    AIR_PRINT("Broadcast   : %s\n", bc ? "TRUE" : "FALSE");
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanGetPortVlanAttr(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    AIR_VLAN_PORT_ATTR_T attr;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    rc = air_vlan_getPortAttr(0, port, &attr);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+        return rc;
+    }
+    AIR_PRINT("Port %d Vlan Attr: ", port);
+    switch(attr)
+    {
+        case AIR_VLAN_PORT_ATTR_USER_PORT:
+            AIR_PRINT("user port(%d)\n", attr);
+            break;
+        case AIR_VLAN_PORT_ATTR_STACK_PORT:
+            AIR_PRINT("stack port(%d)\n", attr);
+            break;
+        case AIR_VLAN_PORT_ATTR_TRANSLATION_PORT:
+            AIR_PRINT("translation port(%d)\n", attr);
+            break;
+        case AIR_VLAN_PORT_ATTR_TRANSPARENT_PORT:
+            AIR_PRINT("transparent port(%d)\n", attr);
+            break;
+        default:
+            AIR_PRINT("unknown(%d)\n", attr);
+            break;
+    };
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanGetIgsPortETagAttr(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    AIR_IGR_PORT_EG_TAG_ATTR_T attr;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    rc = air_vlan_getIgrPortTagAttr(0, port, &attr);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+        return rc;
+    }
+    AIR_PRINT("Port %d Incomming Port Egress Tag Attr: ", port);
+    switch(attr)
+    {
+        case AIR_IGR_PORT_EG_TAG_ATTR_DISABLE:
+            AIR_PRINT("disable(%d)\n", attr);
+            break;
+        case AIR_IGR_PORT_EG_TAG_ATTR_CONSISTENT:
+            AIR_PRINT("consistent(%d)\n", attr);
+            break;
+        case AIR_IGR_PORT_EG_TAG_ATTR_UNTAGGED:
+            AIR_PRINT("untagged(%d)\n", attr);
+            break;
+        case AIR_IGR_PORT_EG_TAG_ATTR_SWAP:
+            AIR_PRINT("swap(%d)\n", attr);
+            break;
+        case AIR_IGR_PORT_EG_TAG_ATTR_TAGGED:
+            AIR_PRINT("tagged(%d)\n", attr);
+            break;
+        case AIR_IGR_PORT_EG_TAG_ATTR_STACK:
+            AIR_PRINT("stack(%d)\n", attr);
+            break;
+        default:
+            AIR_PRINT("unknown(%d)\n", attr);
+            break;
+    };
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanGetPortETagAttr(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    AIR_PORT_EGS_TAG_ATTR_T attr;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    rc = air_vlan_getPortEgsTagAttr(0, port, &attr);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+        return rc;
+    }
+    AIR_PRINT("Port %d Egress Tag Attr: ", port);
+    switch(attr)
+    {
+        case AIR_PORT_EGS_TAG_ATTR_UNTAGGED:
+            AIR_PRINT("untagged(%d)\n", attr);
+            break;
+        case AIR_PORT_EGS_TAG_ATTR_SWAP:
+            AIR_PRINT("swap(%d)\n", attr);
+            break;
+        case AIR_PORT_EGS_TAG_ATTR_TAGGED:
+            AIR_PRINT("tagged(%d)\n", attr);
+            break;
+        case AIR_PORT_EGS_TAG_ATTR_STACK:
+            AIR_PRINT("stack(%d)\n", attr);
+            break;
+        default:
+            AIR_PRINT("unknown(%d)\n", attr);
+            break;
+    };
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanGetPortOuterTPID(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    UI16_T tpid = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    rc = air_vlan_getPortOuterTPID(0, port, &tpid);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+        return rc;
+    }
+    AIR_PRINT("Port %d Outer TPID: %4x\n", port, tpid);
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanGetPvid(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    UI16_T pvid = 0;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    rc = air_vlan_getPortPVID(0, port, &pvid);
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("Error: Operation failed!\n");
+        return rc;
+    }
+    AIR_PRINT("Port %d PVID: %d\n", port, pvid);
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doVlanGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(vlanGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doVlan(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(vlanCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doJumbo(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    I32_T pkt_len = 0, frame_len = 0;
+
+    if(0 == argc)
+    {
+        /* get command */
+        ret = air_port_getJumbo(0, &pkt_len, &frame_len);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get ");
+            switch(pkt_len)
+            {
+                case 0:
+                    AIR_PRINT("RX_1518 ");
+                    break;
+                case 1:
+                    AIR_PRINT("RX_1536 ");
+                    break;
+                case 2:
+                    AIR_PRINT("RX_1552 ");
+                    break;
+                case 3:
+                    AIR_PRINT("RX_JUMBO ");
+                    break;
+            }
+            AIR_PRINT("frames lengths %d KBytes\n", frame_len);
+        }
+        else
+        {
+            AIR_PRINT("Get Jumbo Fail.\n");
+        }
+    }
+    else
+    {
+        /* set command */
+        pkt_len = _strtol(argv[0], NULL, 10);
+        frame_len = _strtol(argv[1], NULL, 10);
+
+        ret = air_port_setJumbo(0, pkt_len, frame_len);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set ");
+            switch(pkt_len)
+            {
+                case 0:
+                    AIR_PRINT("RX_1518 ");
+                    break;
+                case 1:
+                    AIR_PRINT("RX_1536 ");
+                    break;
+                case 2:
+                    AIR_PRINT("RX_1552 ");
+                    break;
+                case 3:
+                    AIR_PRINT("RX_JUMBO ");
+                    break;
+            }
+            AIR_PRINT("frames lengths %d KBytes\n", frame_len);
+        }
+        else
+            AIR_PRINT("Set Jumbo Fail.\n");
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doFlowCtrl(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    BOOL_T fc_en = 0, dir = 0;
+    I32_T port = 0;
+
+    port = _strtol(argv[0], NULL, 10);
+    dir = _strtol(argv[1], NULL, 10);
+
+    if(2 == argc)
+    {
+        /* get command */
+        ret = air_port_getFlowCtrl(0, port, dir, &fc_en);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Get Port%02d %s Flow Control %s\n", port, ((dir)?"RX":"TX"), ((fc_en)?"Enable":"Disable"));
+        else
+            AIR_PRINT("Get Flow Control Fail.\n");
+    }
+    else
+    {
+        /* set command */
+        fc_en = _strtol(argv[2], NULL, 10);
+
+        ret = air_port_setFlowCtrl(0, port, dir, fc_en);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Set Port%02d %s Flow Control %s\n", port, ((dir)?"RX":"TX"), ((fc_en)?"Enable":"Disable"));
+        else
+            AIR_PRINT("Set Flow Control Fail.\n");
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doL2Set(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(l2SetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doL2Get(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(l2GetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doL2Clear(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(l2ClearCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doL2Del(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(l2DelCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doL2Add(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(l2AddCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doL2(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(l2Cmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doAnMode(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    BOOL_T en = 0;
+
+    port = _strtol(argv[0], NULL, 10);
+
+    if(1 == argc)
+    {
+        /* port get anCap <port> */
+        ret = air_port_getAnMode(0, port, &en);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Get Port%02d Auto-Negotiation %s\n", port, ((en)?"Enabled":"Disabled"));
+        else
+            AIR_PRINT("Get Port%02d Auto-Negotiation Fail.\n", port);
+    }
+    else if(2 == argc)
+    {
+        /* "port set anMode <port> <en> */
+        en = _strtol(argv[1], NULL, 10);
+        ret = air_port_setAnMode(0, port, en);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Set Port%02d Auto-Negotiation Mode:%s\n", port, ((en)?"Enabled":"Disabled"));
+        else
+            AIR_PRINT("Set Port%02d Auto-Negotiation Fail.\n", port);
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doLocalAdv(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    AIR_AN_ADV_T adv;
+
+    memset(&adv, 0, sizeof(AIR_AN_ADV_T));
+    port = _strtol(argv[0], NULL, 10);
+
+    if(1 == argc)
+    {
+        /* port get localAdv <port> */
+        ret = air_port_getLocalAdvAbility(0, port, &adv);
+        AIR_PRINT("Get Port%02d Local Auto-Negotiation Advertisement: ", port);
+        if(AIR_E_OK != ret)
+        {
+            AIR_PRINT("Fail!\n");
+        }
+    }
+    else if(7 == argc)
+    {
+        /* port set localAdv <port> <10H> <10F> <100H> <100F> <1000F> <pause> */
+        adv.advCap10HDX = _strtol(argv[1], NULL, 0) & BIT(0);
+        adv.advCap10FDX = _strtol(argv[2], NULL, 0) & BIT(0);
+        adv.advCap100HDX = _strtol(argv[3], NULL, 0) & BIT(0);
+        adv.advCap100FDX = _strtol(argv[4], NULL, 0) & BIT(0);
+        adv.advCap1000FDX = _strtol(argv[5], NULL, 0) & BIT(0);
+        adv.advPause = _strtol(argv[6], NULL, 0) & BIT(0);
+        ret = air_port_setLocalAdvAbility(0, port, adv);
+        AIR_PRINT("Set Port%02d Local Auto-Negotiation Advertisement: ", port);
+        if(AIR_E_OK != ret)
+        {
+            AIR_PRINT("Fail!\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        AIR_PRINT("\n");
+        AIR_PRINT("\tAdvertise 10BASE-T Half Duplex: %s\n", (adv.advCap10HDX)?"Effective":"Not Effective" );
+        AIR_PRINT("\tAdvertise 10BASE-T Full Duplex: %s\n", (adv.advCap10FDX)?"Effective":"Not Effective" );
+        AIR_PRINT("\tAdvertise 100BASE-T Half Duplex: %s\n", (adv.advCap100HDX)?"Effective":"Not Effective" );
+        AIR_PRINT("\tAdvertise 100BASE-T Full Duplex: %s\n", (adv.advCap100FDX)?"Effective":"Not Effective" );
+        AIR_PRINT("\tAdvertise 1000BASE-T Full Duplex: %s\n", (adv.advCap1000FDX)?"Effective":"Not Effective" );
+        AIR_PRINT("\tAdvertise Asynchronous Pause: %s\n", (adv.advPause)?"Effective":"Not Effective" );
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doRemoteAdv(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    AIR_AN_ADV_T lp_adv;
+
+    memset(&lp_adv, 0, sizeof(AIR_AN_ADV_T));
+    port = _strtol(argv[0], NULL, 10);
+
+    if(1 == argc)
+    {
+        /* port get remoteAdv <port> */
+        ret = air_port_getRemoteAdvAbility(0, port, &lp_adv);
+        AIR_PRINT("Get Port%02d Remote Auto-Negotiation Advertisement: ", port);
+        if(AIR_E_OK != ret)
+        {
+            AIR_PRINT("Fail!\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        AIR_PRINT("\n");
+        AIR_PRINT("\tAdvertise 10BASE-T Half Duplex: %s\n", lp_adv.advCap10HDX?"Effective":"Not Effective" );
+        AIR_PRINT("\tAdvertise 10BASE-T Full Duplex: %s\n", lp_adv.advCap10FDX?"Effective":"Not Effective" );
+        AIR_PRINT("\tAdvertise 100BASE-T Half Duplex: %s\n", lp_adv.advCap100HDX?"Effective":"Not Effective" );
+        AIR_PRINT("\tAdvertise 100BASE-T Full Duplex: %s\n", lp_adv.advCap100FDX?"Effective":"Not Effective" );
+        AIR_PRINT("\tAdvertise 1000BASE-T Full Duplex: %s\n", (lp_adv.advCap1000FDX)?"Effective":"Not Effective" );
+        AIR_PRINT("\tAdvertise Asynchronous Pause: %s\n", (lp_adv.advPause)?"Effective":"Not Effective" );
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortSpeed(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    UI32_T speed = 0;
+
+    port = _strtol(argv[0], NULL, 10);
+
+    if(1 == argc)
+    {
+        /* port get speed <port> */
+        ret = air_port_getSpeed(0, port, &speed);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get Port%02d Speed:", port);
+        }
+        else
+        {
+            AIR_PRINT("Get Port%02d Speed Fail!\n", port);
+        }
+    }
+    else if(2 == argc)
+    {
+        /* port set speed <port> <speed> */
+        speed = _strtol(argv[1], NULL, 10);
+        ret = air_port_setSpeed(0, port, speed);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set Port%02d Speed:", port);
+        }
+        else
+        {
+            AIR_PRINT("Set Port%02d Speed Fail!\n", port);
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        switch(speed)
+        {
+            case AIR_PORT_SPEED_10M:
+                AIR_PRINT(" 10 Mbps\n");
+                break;
+            case AIR_PORT_SPEED_100M:
+                AIR_PRINT(" 100 Mbps\n");
+                break;
+            case AIR_PORT_SPEED_1000M:
+                AIR_PRINT(" 1 Gbps\n");
+                break;
+            case AIR_PORT_SPEED_2500M:
+                AIR_PRINT(" 2.5 Gbps\n");
+                break;
+            default:
+                AIR_PRINT(" Reserved\n");
+                break;
+        }
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortDuplex(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    UI32_T duplex = 0;
+
+    port = _strtol(argv[0], NULL, 10);
+
+    if(1 == argc)
+    {
+        /* port get duplex <port> */
+        ret = air_port_getDuplex(0, port, &duplex);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get Port%02d Duplex:%s\n", port, duplex?"Full":"Half");
+        }
+        else
+        {
+            AIR_PRINT("Get Port%02d Duplex Fail!\n", port);
+        }
+    }
+    else if(2 == argc)
+    {
+        /* port set duplex <port> <duplex> */
+        duplex = _strtol(argv[1], NULL, 10);
+        ret = air_port_setDuplex(0, port, duplex);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set Port%02d Duplex:%s\n", port, duplex?"Full":"Half");
+        }
+        else
+        {
+            AIR_PRINT("Set Port%02d Duplex Fail!\n", port);
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortStatus(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    AIR_PORT_STATUS_T ps;
+
+    memset(&ps, 0, sizeof(AIR_PORT_STATUS_T));
+    port = _strtol(argv[0], NULL, 10);
+
+    if(1 == argc)
+    {
+        /* port get status <port> */
+        ret = air_port_getLink(0, port, &ps);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get Port%02d Link-Status\n", port);
+            AIR_PRINT("\tLink: %s\n", ps.link?"Up":"Down");
+            AIR_PRINT("\tDuplex: %s\n", ps.duplex?"Full":"Half");
+            AIR_PRINT("\tSpeed: ");
+            switch(ps.speed)
+            {
+                case AIR_PORT_SPEED_10M:
+                    AIR_PRINT("10 Mbps\n");
+                    break;
+                case AIR_PORT_SPEED_100M:
+                    AIR_PRINT("100 Mbps\n");
+                    break;
+                case AIR_PORT_SPEED_1000M:
+                    AIR_PRINT("1 Gbps\n");
+                    break;
+                case AIR_PORT_SPEED_2500M:
+                    AIR_PRINT("2.5 Gbps\n");
+                    break;
+                default:
+                    AIR_PRINT("Reserved\n");
+                    break;
+            }
+        }
+        else
+            AIR_PRINT("Get Port%02d Link-Status Fail!", port);
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortBckPres(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    UI32_T bckPres = 0;
+
+    port = _strtol(argv[0], NULL, 10);
+
+    if(1 == argc)
+    {
+        /* port get bckPres <port> */
+        ret = air_port_getBckPres(0, port, &bckPres);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Get Port%02d BckPres:%s\n", port, bckPres?"Enabled":"Disabled");
+        else
+            AIR_PRINT("Get Port%02d BckPres Fail!\n", port);
+    }
+    else if(2 == argc)
+    {
+        /* port set bckPres <port> <bckPres> */
+        bckPres = _strtol(argv[1], NULL, 10);
+        ret = air_port_setBckPres(0, port, bckPres);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Set Port%02d BckPres:%s\n", port, bckPres?"Enabled":"Disabled");
+        else
+            AIR_PRINT("Set Port%02d BckPres Fail!\n", port);
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortPsMode(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    UI32_T mode = 0;
+    BOOL_T ls_en = 0;
+    BOOL_T eee_en = 0;
+
+    port = _strtol(argv[0], NULL, 10);
+
+    if(1 == argc)
+    {
+        /* port get psMode <port> */
+        ret = air_port_getPsMode(0, port, &mode);
+        AIR_PRINT("Get Port%02d Power-Saving: ", port);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Done\n");
+        }
+        else
+        {
+            AIR_PRINT("Fail!\n");
+        }
+    }
+    else if(3 == argc)
+    {
+        /* port set psMode <port> <ls> <eee> */
+        ls_en = _strtol(argv[1], NULL, 0);
+        eee_en = _strtol(argv[2], NULL, 0);
+        if(TRUE == ls_en)
+        {
+            mode |= AIR_PORT_PS_LINKSTATUS;
+        }
+        if(TRUE == eee_en)
+        {
+            mode |= AIR_PORT_PS_EEE;
+        }
+        ret = air_port_setPsMode(0, port, mode);
+        AIR_PRINT("Set Port%02d Power-Saving: ", port);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Done\n");
+        }
+        else
+        {
+            AIR_PRINT("Fail!\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+    if(ret == AIR_E_OK)
+    {
+        AIR_PRINT("\tLink status:%s\n", (mode & AIR_PORT_PS_LINKSTATUS)?"Enable":"Disable");
+        AIR_PRINT("\tEEE:%s\n", (mode & AIR_PORT_PS_EEE)?"Enable":"Disable");
+    }
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortSmtSpdDwn(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    UI32_T state = 0;
+    UI32_T retry = 0;
+
+    port = _strtol(argv[0], NULL, 10);
+
+    if(1 == argc)
+    {
+        /* port get smtSpdDwn <port> */
+        ret = air_port_getSmtSpdDwn(0, port, &state, &retry);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get Port%02d Smart Speed Down: %s\n", port, state?"Enabled":"Disabled");
+            AIR_PRINT("Get Port%02d Retry Time: %d\n", port, retry + 2);
+        }
+        else
+            AIR_PRINT("Get Port%02d Smart-SpeedDown Fail!\n", port);
+    }
+    else if(3 == argc)
+    {
+        /* port set smtSpdDwn <port> <en> <retry> */
+        state = _strtol(argv[1], NULL, 10);
+        retry = _strtol(argv[2], NULL, 10);
+        if(retry >= 2)
+        {
+            ret = air_port_setSmtSpdDwn(0, port, state, retry - 2);
+            if(ret == AIR_E_OK)
+            {
+                AIR_PRINT("Set Port%02d Smart Speed Down: %s\n", port, state?"Enabled":"Disabled");
+                AIR_PRINT("Set Port%02d Retry Time: %d\n", port, retry);
+            }
+            else
+                AIR_PRINT("Set Port%02d Smart-SpeedDown Fail!\n", port);
+        }
+        else
+        {
+            ret = AIR_E_BAD_PARAMETER;
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortSpTag(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    BOOL_T sptag_en = FALSE;
+
+    port = _strtol(argv[0], NULL, 10);
+
+    if(1 == argc)
+    {
+        /* port get spTag <port> */
+        ret = air_port_getSpTag(0, port, &sptag_en);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Get Port%02d Special Tag %s\n", port, ((sptag_en)?"Enabled":"Disabled"));
+        }
+        else
+        {
+            AIR_PRINT("Get Port%02d Special Tag Fail.\n", port);
+        }
+    }
+    else if(2 == argc)
+    {
+        /* port set spTag <port> <en> */
+        sptag_en = _strtol(argv[1], NULL, 10);
+        ret = air_port_setSpTag(0, port, sptag_en);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Set Port%02d Special Tag:%s\n", port, ((sptag_en)?"Enabled":"Disabled"));
+        }
+        else
+        {
+            AIR_PRINT("Set Port%02d Special Tag Fail.\n", port);
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortEnable(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    UI32_T state = 0;
+
+    port = _strtol(argv[0], NULL, 10);
+
+    if(1 == argc)
+    {
+        /* port get enable <port> */
+        ret = air_port_getEnable(0, port, &state);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Get Port%02d State:%s\n", port, state?"Enable":"Disable");
+        else
+            AIR_PRINT("Get Port%02d State Fail!\n", port);
+    }
+    else if(2 == argc)
+    {
+        /* port set enable <port> <en> */
+        state = _strtol(argv[1], NULL, 10);
+        ret = air_port_setEnable(0, port, state);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Set Port%02d State:%s\n", port, state?"Enable":"Disable");
+        else
+            AIR_PRINT("Set Port%02d State Fail!\n", port);
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPort5GBaseRMode(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+
+    if(0 == argc)
+    {
+        /* port set 5GBaseRMode */
+        ret = air_port_set5GBaseRModeEn(0);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Set Port05 Mode: 5GBase-R\n");
+        else
+            AIR_PRINT("Set Port05 HSGMII Mode Fail.\n");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortHsgmiiMode(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+
+    if(0 == argc)
+    {
+        /* port set hsgmiiMode */
+        ret = air_port_setHsgmiiModeEn(0);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Set Port05 Mode: HSGMII\n");
+        else
+            AIR_PRINT("Set Port05 HSGMII Mode Fail.\n");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortSgmiiMode(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T mode = 0;
+    UI32_T speed = 0;
+
+    if(2 == argc)
+    {
+        /* port set sgmiiMode <mode(0:AN,1:Force)> <speed> */
+        mode = _strtol(argv[0], NULL, 10);
+        speed = _strtol(argv[1], NULL, 10);
+        ret = air_port_setSgmiiMode(0, mode, speed);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Set Port05 SGMII Mode:%s\nIf in Force Mode, speed:", mode?"Force":"AN");
+        else
+            AIR_PRINT("Set Port05 SGMII Mode Fail.\n");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        switch(speed)
+        {
+            case AIR_PORT_SPEED_10M:
+                AIR_PRINT(" 10 Mbps\n");
+                break;
+            case AIR_PORT_SPEED_100M:
+                AIR_PRINT(" 100 Mbps\n");
+                break;
+            case AIR_PORT_SPEED_1000M:
+                AIR_PRINT(" 1 Gbps\n");
+                break;
+            default:
+                AIR_PRINT(" Reserved\n");
+                break;
+        }
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortRmiiMode(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T speed = 0;
+
+    if(1 == argc)
+    {
+        /* port set rmiiMode <speed> */
+        speed = _strtol(argv[0], NULL, 10);
+        ret = air_port_setRmiiMode(0, speed);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set Port05 RMII Mode Speed:");
+        }
+        else
+        {
+            AIR_PRINT("Set Port05 RMII Mode Fail!\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        switch(speed)
+        {
+            case AIR_PORT_SPEED_10M:
+                AIR_PRINT(" 10 Mbps\n");
+                break;
+            case AIR_PORT_SPEED_100M:
+                AIR_PRINT(" 100 Mbps\n");
+                break;
+            default:
+                AIR_PRINT(" Reserved\n");
+                break;
+        }
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doPortRgmiiMode(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T speed = 0;
+
+    if(1 == argc)
+    {
+        /* port set rgmiiMode <speed> */
+        speed = _strtol(argv[0], NULL, 10);
+        ret = air_port_setRgmiiMode(0, speed);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set Port05 RGMII Mode Speed:");
+        }
+        else
+        {
+            AIR_PRINT("Set Port05 RGMII Mode Fail!\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        switch(speed)
+        {
+            case AIR_PORT_SPEED_10M:
+                AIR_PRINT(" 10 Mbps\n");
+                break;
+            case AIR_PORT_SPEED_100M:
+                AIR_PRINT(" 100 Mbps\n");
+                break;
+            case AIR_PORT_SPEED_1000M:
+                AIR_PRINT(" 1 Gbps\n");
+                break;
+            default:
+                AIR_PRINT(" Reserved\n");
+                break;
+        }
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doSptagEn(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    BOOL_T sp_en = FALSE;
+
+    port =  _strtol(argv[0], NULL, 10);
+    if (2 == argc)
+    {
+        sp_en =  _strtol(argv[1], NULL, 10);
+        ret = air_sptag_setState(0,port,sp_en);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("set port %d SpTag state %s sucess\n", port,sp_en?"Enable":"Disable");
+        }
+        else
+        {
+            AIR_PRINT("set port %d SpTag state %s fail\n", port,sp_en?"Enable":"Disable");
+        }
+    }
+    else if(1 == argc)
+    {
+        air_sptag_getState(0,port,&sp_en);
+        AIR_PRINT("get port %d SpTag state: %s \n", port,sp_en?"Enable":"Disable");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doSptagMode(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    BOOL_T sp_mode = FALSE;
+
+
+    port =  _strtol(argv[0], NULL, 10);
+    if (2 == argc)
+    {
+        sp_mode  =  _strtol(argv[1], NULL, 10);
+        ret = air_sptag_setMode(0,port,sp_mode);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("set port %d SpTag Mode  %s sucess\n", port,sp_mode?"replace":"insert");
+        }
+        else
+        {
+            AIR_PRINT("set port %d SpTag state %s fail\n", port,sp_mode?"replace":"insert");
+        }
+    }
+    else if(1 == argc)
+    {
+        air_sptag_getMode(0,port,&sp_mode);
+        AIR_PRINT("get port %d SpTag state: %s \n", port,sp_mode?"replace":"insert");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doSptagDecode(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    AIR_SPTAG_RX_PARA_T sptag_rx = {0};
+    UI8_T buf[AIR_STAG_BUF_LEN] = {0};
+    UI32_T len = AIR_STAG_BUF_LEN, i = 0;
+
+    if (4 == argc)
+    {
+        for(i = 0; i < len; i++)
+        {
+            buf[i] = _strtoul(argv[i], NULL, 16);
+        }
+
+        ret = air_sptag_decodeRx(0, buf, len, &sptag_rx);
+        if (AIR_E_OK != ret)
+        {
+            AIR_PRINT("SpTag decode fail\n");
+            return ret;
+        }
+
+        AIR_PRINT("SpTag decode success:\n");
+        AIR_PRINT("RSN : %s\n", _sptag_pt[sptag_rx.rsn]);
+        AIR_PRINT("VPM : %s\n", _sptag_vpm[sptag_rx.vpm]);
+        AIR_PRINT("SPN : %d\n", sptag_rx.spn);
+        AIR_PRINT("PRI : %d\n", sptag_rx.pri);
+        AIR_PRINT("CFI : %d\n", sptag_rx.cfi);
+        AIR_PRINT("VID : %d\n", sptag_rx.vid);
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doSptagEncode(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    AIR_STAG_TX_PARA_T sptag_tx = {0};
+    UI8_T buf[AIR_STAG_BUF_LEN] = {0};
+    UI32_T len = AIR_STAG_BUF_LEN;
+    char str[128] = {'\0'};
+    UI32_T data = 0;
+    AIR_STAG_MODE_T mode = AIR_STAG_MODE_LAST;
+
+    if (7 == argc)
+    {
+        if(_strcmp(argv[0],"mode=replace") == 0)
+            mode = AIR_STAG_MODE_REPLACE;
+        else if(_strcmp(argv[0],"mode=insert") == 0)
+            mode = AIR_STAG_MODE_INSERT;
+        else
+            printf("mode is wrong!!");
+
+        if(_strcmp(argv[1],"opc=portmap") == 0)
+            sptag_tx.opc = AIR_STAG_OPC_PORTMAP;
+        else if(_strcmp(argv[1],"opc=portid") == 0)
+            sptag_tx.opc = AIR_STAG_OPC_PORTID;
+        else if(_strcmp(argv[1],"opc=lookup") == 0)
+            sptag_tx.opc = AIR_STAG_OPC_LOOKUP;
+        else
+            printf("opc is wrong!!");
+
+        if(sscanf(argv[2],"dp=%x",&data) != -1)
+        {
+            sptag_tx.pbm = data;
+            AIR_PRINT("sptag_tx.pbm %x\n",sptag_tx.pbm);
+        }
+
+        if(_strcmp(argv[3],"vpm=untagged") == 0)
+            sptag_tx.vpm = AIR_STAG_VPM_UNTAG;
+        else if(_strcmp(argv[3],"vpm=8100") == 0)
+            sptag_tx.vpm = AIR_STAG_VPM_TPID_8100;
+        else if(_strcmp(argv[3],"vpm=88a8") == 0)
+            sptag_tx.vpm = AIR_STAG_VPM_TPID_88A8;
+        else
+            printf("vpm is wrong!!");
+
+        if(sscanf(argv[4],"pri=%d",&data) != -1)
+        {
+            sptag_tx.pri = data;
+            AIR_PRINT("sptag_tx.pri %d\n",sptag_tx.pri);
+        }
+
+        if(sscanf(argv[5],"cfi=%d",&data) != -1)
+        {
+            sptag_tx.cfi  = data;
+            AIR_PRINT("sptag_tx.cfi %d\n",sptag_tx.cfi);
+        }
+
+        if(sscanf(argv[6],"vid=%d",&data) != -1)
+        {
+            sptag_tx.vid = data;
+            AIR_PRINT("sptag_tx.vid %d\n",sptag_tx.vid);
+        }
+
+        ret = air_sptag_encodeTx(0,mode, &sptag_tx, (UI8_T *)&buf, &len);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("SpTag encode sucess, returned len=%d\n", len);
+            AIR_PRINT("Encoded SpTag: %02x %02x %02x %02x\n", buf[0], buf[1], buf[2], buf[3]);
+        }
+        else
+        {
+            AIR_PRINT("SpTag encode fail\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doSptag(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(sptagCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doL2Dump(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(l2DumpCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doMacAddr(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    AIR_MAC_ENTRY_T mt;
+    UI32_T fwd = 0;
+
+    memset(&mt, 0, sizeof(AIR_MAC_ENTRY_T));
+
+    if(0 == argc)
+    {
+        /* l2 clear mac */
+        ret = air_l2_clearMacAddr(0);
+        if(ret == AIR_E_OK)
+            AIR_PRINT("Clear MAC Address Table Done.\n");
+        else
+            AIR_PRINT("Clear MAC Address Table Fail.\n");
+    }
+    else if(3 == argc)
+    {
+        /* l2 del mac <mac(12'hex)> { vid <vid(0..4095)> | fid <fid(0..15)> } */
+        ret = _str2mac(argv[0], (C8_T *)mt.mac);
+        if(ret != AIR_E_OK)
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            return ret;
+        }
+
+        /* check argument 1 */
+        if(FALSE == _strcmp(argv[1], "vid"))
+        {
+            /* get mac entry by MAC address & vid */
+            mt.cvid = _strtoul(argv[2], NULL, 0);
+            mt.flags |= AIR_L2_MAC_ENTRY_FLAGS_IVL;
+            AIR_PRINT("Get MAC Address:" MAC_STR " with vid:%u", MAC2STR(mt.mac), mt.cvid);
+        }
+        else if(FALSE == _strcmp(argv[1], "fid"))
+        {
+            /* get mac entry by MAC address & fid */
+            mt.fid = _strtoul(argv[2], NULL, 0);
+            AIR_PRINT("Get MAC Address:" MAC_STR " with fid:%u", MAC2STR(mt.mac), mt.fid);
+        }
+        else
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            return AIR_E_BAD_PARAMETER;
+        }
+        ret = air_l2_delMacAddr(0, &mt);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT(" Done.\n");
+        }
+        else
+            AIR_PRINT("\n Fail!\n");
+    }
+    else if(7 == argc)
+    {
+        /* l2 add mac <static(0:dynamic,1:static)> <unauth(0:auth,1:unauth)> <mac(12'hex)> <portlist(uintlist)> [ vid <vid(0..4095)> | fid <fid(0..15)> ] <src_mac_forward=(0:default,1:cpu-include,2:cpu-exclude,3:cpu-only,4:drop)> */
+        if(argv[0])
+            mt.flags |= AIR_L2_MAC_ENTRY_FLAGS_STATIC;
+
+        if(argv[1])
+            mt.flags |= AIR_L2_MAC_ENTRY_FLAGS_UNAUTH;
+
+        ret = _str2mac(argv[2], (C8_T *)mt.mac);
+        if(ret != AIR_E_OK)
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            return ret;
+        }
+
+        ret = _portListStr2Ary(argv[3], mt.port_bitmap, 1);
+        if(ret != AIR_E_OK)
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            return ret;
+        }
+
+        /* check argument fid or vid */
+        if(FALSE == _strcmp(argv[4], "vid"))
+        {
+            /* get mac entry by MAC address & vid */
+            mt.cvid = _strtoul(argv[5], NULL, 0);
+            mt.flags |= AIR_L2_MAC_ENTRY_FLAGS_IVL;
+        }
+        else if(FALSE == _strcmp(argv[4], "fid"))
+        {
+            /* get mac entry by MAC address & fid */
+            mt.fid = _strtoul(argv[5], NULL, 0);
+        }
+        else
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            return AIR_E_BAD_PARAMETER;
+        }
+        fwd = _strtoul(argv[6], NULL, 0);
+        if(0 == fwd)
+            mt.sa_fwd = AIR_L2_FWD_CTRL_DEFAULT;
+        else if(1 == fwd)
+            mt.sa_fwd = AIR_L2_FWD_CTRL_CPU_INCLUDE;
+        else if(2 == fwd)
+            mt.sa_fwd = AIR_L2_FWD_CTRL_CPU_EXCLUDE;
+        else if(3 == fwd)
+            mt.sa_fwd = AIR_L2_FWD_CTRL_CPU_ONLY;
+        else if(4 == fwd)
+            mt.sa_fwd = AIR_L2_FWD_CTRL_DROP;
+        else
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            return AIR_E_BAD_PARAMETER;
+        }
+        ret = air_l2_addMacAddr(0, &mt);
+        AIR_PRINT("Add MAC Address:" MAC_STR, MAC2STR(mt.mac));
+        if(ret == AIR_E_OK)
+            AIR_PRINT(" Done.\n");
+        else
+            AIR_PRINT(" Fail.\n");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+_printMacEntry(
+        AIR_MAC_ENTRY_T *mt,
+        UI32_T age_unit,
+        UI8_T count,
+        UI8_T title)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    I32_T i = 0, j = 0;
+    UI8_T first = 0;
+    UI8_T find = 0;
+    if(title)
+    {
+        AIR_PRINT("%-6s%-15s%-5s%-5s%-5s%-10s%-10s%-6s\n",
+                "unit",
+                "mac",
+                "ivl",
+                "vid",
+                "fid",
+                "age-time",
+                "forward",
+                "port");
+        return ret;
+    }
+    for(i = 0; i < count; i++)
+    {
+        AIR_PRINT("%-6d", age_unit);
+        AIR_PRINT(MAC_STR, MAC2STR(mt[i].mac));
+        AIR_PRINT("...");
+        if(mt[i].flags & AIR_L2_MAC_ENTRY_FLAGS_IVL)
+        {
+            AIR_PRINT("%-3s..", "ivl");
+            AIR_PRINT("%-5d", mt[i].cvid);
+            AIR_PRINT("%-5s", ".....");
+        }
+        else
+        {
+            AIR_PRINT("%-3s..", "svl");
+            AIR_PRINT("%-5s", ".....");
+            AIR_PRINT("%-5d", mt[i].fid);
+        }
+        if(mt[i].flags & AIR_L2_MAC_ENTRY_FLAGS_STATIC)
+        {
+            AIR_PRINT("%-10s.", "static");
+        }
+        else
+        {
+            AIR_PRINT("%d sec..", mt[i].timer);
+        }
+        AIR_PRINT("%-10s", _air_mac_address_forward_control_string[mt[i].sa_fwd]);
+        first = 0;
+        find = 0;
+        for (j = (AIR_MAX_NUM_OF_PORTS - 1); j >= 0; j--)
+        {
+            if((mt[i].port_bitmap[0]) & (1 << j))
+            {
+                first = j;
+                find = 1;
+                break;
+            }
+        }
+        if(find)
+        {
+            for (j = 0; j < AIR_MAX_NUM_OF_PORTS; j++)
+            {
+                if((mt[i].port_bitmap[0]) & (1 << j))
+                {
+                    if(j == first)
+                        AIR_PRINT("%-2d", j);
+                    else
+                        AIR_PRINT("%-2d,", j);
+                }
+            }
+        }
+        else
+            AIR_PRINT("no dst port");
+        AIR_PRINT("\n");
+    }
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doGetMacAddr(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI8_T count = 0;
+    AIR_MAC_ENTRY_T * ptr_mt;
+
+    if(3 == argc)
+    {
+        ptr_mt = AIR_MALLOC(sizeof(AIR_MAC_ENTRY_T));
+        if (NULL == ptr_mt)
+        {
+            AIR_PRINT("***Error***, allocate memory fail\n");
+            return AIR_E_OTHERS;
+        }
+        memset(ptr_mt, 0, sizeof(AIR_MAC_ENTRY_T));
+        /* l2 get mac <mac(12'hex)> { vid <vid(0..4095)> | fid <fid(0..15)> } */
+        ret = _str2mac(argv[0], (C8_T *)ptr_mt->mac);
+        if(ret != AIR_E_OK)
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            AIR_FREE(ptr_mt);
+            return ret;
+        }
+
+        /* check argument 1 */
+        if(FALSE == _strcmp(argv[1], "vid"))
+        {
+            /* get mac entry by MAC address & vid */
+            ptr_mt->cvid = _strtoul(argv[2], NULL, 0);
+            ptr_mt->flags |= AIR_L2_MAC_ENTRY_FLAGS_IVL;
+            AIR_PRINT("Get MAC Address:" MAC_STR " with vid:%u", MAC2STR(ptr_mt->mac), ptr_mt->cvid);
+        }
+        else if(FALSE == _strcmp(argv[1], "fid"))
+        {
+            /* get mac entry by MAC address & fid */
+            ptr_mt->fid = _strtoul(argv[2], NULL, 0);
+            AIR_PRINT("Get MAC Address:" MAC_STR " with fid:%u", MAC2STR(ptr_mt->mac), ptr_mt->fid);
+        }
+        else
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            AIR_FREE(ptr_mt);
+            return AIR_E_BAD_PARAMETER;
+        }
+        ret = air_l2_getMacAddr(0, &count, ptr_mt);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT(" Done.\n");
+            _printMacEntry(ptr_mt, 0, 1, TRUE);
+            _printMacEntry(ptr_mt, 0, 1, FALSE);
+        }
+        else
+            AIR_PRINT("\n Not found!\n");
+        AIR_FREE(ptr_mt);
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doMacAddrAgeOut(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T time = 0;
+    if(0 == argc)
+    {
+        /* l2 get macAddrAgeOut */
+        ret = air_l2_getMacAddrAgeOut(0, &time);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get MAC Address Age Out Time Done.\n");
+        }
+        else
+        {
+            AIR_PRINT("Get MAC Address Age Out Time Fail.\n");
+        }
+    }
+    else if(1 == argc)
+    {
+        /* l2 set macAddrAgeOut <time(1, 1000000)> */
+        time = _strtoul(argv[0], NULL, 0);
+        if(time < 1 || time > 1000000)
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            return AIR_E_BAD_PARAMETER;
+        }
+        ret = air_l2_setMacAddrAgeOut(0, time);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set MAC Address Age Out Time Done.\n");
+        }
+        else
+        {
+            AIR_PRINT("Set MAC Address Age Out Time Fail.\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        AIR_PRINT("MAC Address Age Out Time: %u seconds.\n", time);
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doDumpMacAddr(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    AIR_MAC_ENTRY_T *ptr_mt;
+    UI8_T count = 0;
+    UI32_T bucket_size = 0;
+    UI32_T total_count = 0;
+
+    if(0 != argc)
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+    /* get unit of aging time */
+    ret = air_l2_getMacBucketSize(0, &bucket_size);
+    if(ret != AIR_E_OK)
+    {
+        AIR_PRINT("Get MAC Age Time Fail!\n");
+        return ret;
+    }
+    ptr_mt = AIR_MALLOC(sizeof(AIR_MAC_ENTRY_T) * bucket_size);
+    if (NULL == ptr_mt)
+    {
+        AIR_PRINT("***Error***, allocate memory fail\n");
+        return AIR_E_OTHERS;
+    }
+    memset(ptr_mt, 0, sizeof(AIR_MAC_ENTRY_T) * bucket_size);
+    _printMacEntry(ptr_mt, 0, count, TRUE);
+    /* get 1st entry of MAC table */
+    ret = air_l2_getMacAddr(0, &count, ptr_mt);
+    switch(ret)
+    {
+        case AIR_E_ENTRY_NOT_FOUND:
+            AIR_FREE(ptr_mt);
+            AIR_PRINT("Not Found!\n");
+            return ret;
+        case AIR_E_TIMEOUT:
+            AIR_FREE(ptr_mt);
+            AIR_PRINT("Time Out!\n");
+            return ret;
+        case AIR_E_BAD_PARAMETER:
+            AIR_FREE(ptr_mt);
+            AIR_PRINT("Bad Parameter!\n");
+            return ret;
+        default:
+            break;
+    }
+    total_count += count;
+    _printMacEntry(ptr_mt, 0, count, FALSE);
+
+    /* get other entries of MAC table */
+    while(1)
+    {
+        memset(ptr_mt, 0, sizeof(AIR_MAC_ENTRY_T) * bucket_size);
+        ret = air_l2_getNextMacAddr(0, &count, ptr_mt);
+        if(AIR_E_OK != ret)
+        {
+            break;
+        }
+        total_count += count;
+        _printMacEntry(ptr_mt, 0, count, FALSE);
+    }
+    switch(ret)
+    {
+        case AIR_E_TIMEOUT:
+            AIR_PRINT("Time Out!\n");
+            break;
+        case AIR_E_BAD_PARAMETER:
+            AIR_PRINT("Bad Parameter!\n");
+            break;
+        default:
+            AIR_PRINT("Found %u %s\n", total_count, (total_count>1)?"entries":"entry");
+            break;
+    }
+    AIR_FREE(ptr_mt);
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doLagMember(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T portrunk_index = 0, member_index = 0, member_enable = 0, port_index = 0, i = 0;
+    AIR_LAG_PTGINFO_T  member;
+    memset(&member,0,sizeof(AIR_LAG_PTGINFO_T));
+
+    if(4 == argc)
+    {
+        /* lag set member <port trunk index> <member index> <member enable> <port_index>*/
+        portrunk_index  = _strtol(argv[0], NULL, 10);
+        member_index    = _strtol(argv[1], NULL, 10);
+        member_enable   = _strtol(argv[2], NULL, 10);
+        port_index      = _strtol(argv[3], NULL, 10);
+        ret = air_lag_setMember(0, portrunk_index, member_index, member_enable,port_index);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set port trunk index %d member_index:%d member_enable:%d, port_index:%d ok.\n", portrunk_index, member_index, member_enable,port_index);
+        }
+        else
+        {
+            AIR_PRINT("Set port trunk index %d member_index:%d member_enable:%d, port_index:%d fail.\n", portrunk_index, member_index, member_enable,port_index);
+        }
+        memset(&member,0,sizeof(member));
+        air_lag_getMember(0, portrunk_index, &member);
+        if(! member.csr_gp_enable[0])
+        {
+            AIR_PRINT("\r\n!!!!!!!!!Port trunk index %d member_index:0 must be set,or else have taffic issues.\n", portrunk_index);
+        }
+    }
+    else if(1 == argc)
+    {
+        portrunk_index = _strtol(argv[0], NULL, 10);
+
+        /* lag get member <port> */
+        memset(&member,0,sizeof(member));
+        ret = air_lag_getMember(0, portrunk_index, &member);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get port trunk %u member:\n", portrunk_index);
+            for(i = 0; i < AIR_LAG_MAX_MEM_NUM; i++)
+            {
+                if(member.csr_gp_enable[i])
+                    AIR_PRINT("port %d \r\n", member.csr_gp_port[i]);
+            }
+            AIR_PRINT("\r\n");
+        }
+        else
+        {
+            AIR_PRINT("Get port trunk:%u Member Fail.\n", portrunk_index);
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+
+static AIR_ERROR_NO_T
+doLagDstInfo(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    AIR_LAG_DISTINFO_T dstInfo;
+
+    memset(&dstInfo, 0, sizeof(AIR_LAG_DISTINFO_T));
+    if(7 == argc)
+    {
+        /* lag set dstInfo <sp> <sa> <da> <sip> <dip> <sport> <dport> */
+        dstInfo.sp = _strtol(argv[0], NULL, 10) & BIT(0);
+        dstInfo.sa = _strtol(argv[1], NULL, 10) & BIT(0);
+        dstInfo.da = _strtol(argv[2], NULL, 10) & BIT(0);
+        dstInfo.sip = _strtol(argv[3], NULL, 10) & BIT(0);
+        dstInfo.dip = _strtol(argv[4], NULL, 10) & BIT(0);
+        dstInfo.sport = _strtol(argv[5], NULL, 10) & BIT(0);
+        dstInfo.dport = _strtol(argv[6], NULL, 10) & BIT(0);
+        ret = air_lag_setDstInfo(0, dstInfo);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set LAG packet distrubution.\n");
+        }
+        else
+        {
+            AIR_PRINT("Set LAG packet distrubution Fail.\n");
+        }
+    }
+    else if(0 == argc)
+    {
+        /* lag get dstInfo */
+        ret = air_lag_getDstInfo(0, &dstInfo);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get LAG packet distrubution:\n");
+        }
+        else
+        {
+            AIR_PRINT("Get LAG packet distrubution Fail.\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+    if(ret == AIR_E_OK)
+    {
+        AIR_PRINT("%-5s|%-5s|%-5s|%-5s|%-5s|%-5s|%-5s\n",
+                "SP", "SA", "DA", "SIP", "DIP", "SPORT", "DPORT");
+        AIR_PRINT("%-5s|%-5s|%-5s|%-5s|%-5s|%-5s|%-5s\n",
+                (dstInfo.sp)?"En":"Dis",
+                (dstInfo.sa)?"En":"Dis",
+                (dstInfo.da)?"En":"Dis",
+                (dstInfo.sip)?"En":"Dis",
+                (dstInfo.dip)?"En":"Dis",
+                (dstInfo.sport)?"En":"Dis",
+                (dstInfo.dport)?"En":"Dis");
+    }
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doLagHashtype(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T hashtype = 0;
+
+    if(1 == argc)
+    {
+        hashtype = _strtol(argv[0], NULL, 10);
+        ret = air_lag_sethashtype(0, hashtype);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set LAG hashtype Ok.\n");
+        }
+        else
+        {
+            AIR_PRINT("Set LAG hashtype Fail.\n");
+        }
+    }
+    else if(0 == argc)
+    {
+        /* lag get dstInfo */
+        ret = air_lag_gethashtype(0, &hashtype);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get LAG hashtype:\n");
+        }
+        else
+        {
+            AIR_PRINT("Get LLAG hashtype Fail.\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+    if(ret == AIR_E_OK)
+    {
+        switch (hashtype)
+        {
+            case 0:
+                AIR_PRINT("hashtype:crc32lsb.\n");
+                break;
+            case 1:
+                AIR_PRINT("hashtype:crc32msb.\n");
+                break;
+            case 2:
+                AIR_PRINT("hashtype:crc16.\n");
+                break;
+            case 3:
+                AIR_PRINT("hashtype:xor4.\n");
+                break;
+            default:
+                AIR_PRINT("wrong hashtype:%d.\n",hashtype);
+        }
+
+    }
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doLagPtseed(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T ptseed = 0;
+
+    if(1 == argc)
+    {
+        ptseed = _strtol(argv[0], NULL, 16);
+        ret = air_lag_setPTSeed(0, ptseed);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set LAG Port Seed:%x(hex) ok\n",ptseed);
+        }
+        else
+        {
+            AIR_PRINT("Set LAG Port Seed:%x(hex) fail\n",ptseed);
+        }
+    }
+    else if(0 == argc)
+    {
+        /* lag get seed */
+        ret = air_lag_getPTSeed(0, &ptseed);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get port trunk seed: %x(hex)\n",ptseed);
+        }
+        else
+        {
+            AIR_PRINT("Get port trunk seed Fail.\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doLagSpsel(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    UI32_T state = 0;
+
+    if(1 == argc)
+    {
+        /* lag set spsel <state> */
+        state = _strtol(argv[0], NULL, 10);
+        ret = air_lag_setSpSel(0,state);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set source port compare function:%s.\n", (state)?"Enabled":"Disabled");
+        }
+        else
+        {
+            AIR_PRINT("Set source port compare function Fail.\n");
+        }
+    }
+    else if(0 == argc)
+    {
+        /* lag get spsel*/
+        ret = air_lag_getSpSel(0, &state);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get source port compare function:%s.\n", (state)?"Enabled":"Disabled");
+        }
+        else
+        {
+            AIR_PRINT("Get source port compare function Fail.\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+
+static AIR_ERROR_NO_T
+doLagState(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    UI32_T state = 0;
+
+    if(1 == argc)
+    {
+        /* lag set state <state> */
+        state = _strtol(argv[0], NULL, 10);
+        ret = air_lag_set_ptgc_state(0,state);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set LAG Port Trunk State:%s.\n", (state)?"Enabled":"Disabled");
+        }
+        else
+        {
+            AIR_PRINT("Set LAG Port Trunk State Fail.\n");
+        }
+    }
+    else if(0 == argc)
+    {
+        /* lag get state*/
+        ret = air_lag_get_ptgc_state(0, &state);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get LAG Port Trunk State:%s.\n", (state)?"Enabled":"Disabled");
+        }
+        else
+        {
+            AIR_PRINT("Get LAG Port Trunk State Fail.\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doLagGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(lagGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doLagSet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(lagSetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doLag(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(lagCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doStpPortstate(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    UI32_T fid = 0;
+    UI32_T state = 0;
+
+    port = _strtol(argv[0], NULL, 10);
+    fid = _strtol(argv[1], NULL, 10);
+    if(3 == argc)
+    {
+        /* stp set portstate <port> <fid(0..15)> <state> */
+        state = _strtol(argv[2], NULL, 10);
+        ret = air_stp_setPortstate(0, port, fid, state);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Set STP Port:%u FID:%u State:", port, fid);
+            switch(state)
+            {
+                case AIR_STP_STATE_DISABLE:
+                    AIR_PRINT("Disable(STP) / Discard(RSTP).\n");
+                    break;
+                case AIR_STP_STATE_LISTEN:
+                    AIR_PRINT("Listening(STP) / Discard(RSTP).\n");
+                    break;
+                case AIR_STP_STATE_LEARN:
+                    AIR_PRINT("Learning(STP) / Learning(RSTP).\n");
+                    break;
+                case AIR_STP_STATE_FORWARD:
+                    AIR_PRINT("Forwarding(STP) / Forwarding(RSTP).\n");
+                    break;
+                default:
+                    break;
+            }
+        }
+        else
+        {
+            AIR_PRINT("Set STP Port:%u FID:%u State Fail.", port, fid);
+        }
+    }
+    else if(2 == argc)
+    {
+        /* stp get portstate <port> <fid(0..15)> */
+        ret = air_stp_getPortstate(0, port, fid, &state);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Get STP Port:%u FID:%u State:", port, fid);
+            switch(state)
+            {
+                case AIR_STP_STATE_DISABLE:
+                    AIR_PRINT("Disable(STP) / Discard(RSTP).\n");
+                    break;
+                case AIR_STP_STATE_LISTEN:
+                    AIR_PRINT("Listening(STP) / Discard(RSTP).\n");
+                    break;
+                case AIR_STP_STATE_LEARN:
+                    AIR_PRINT("Learning(STP) / Learning(RSTP).\n");
+                    break;
+                case AIR_STP_STATE_FORWARD:
+                    AIR_PRINT("Forwarding(STP) / Forwarding(RSTP).\n");
+                    break;
+                default:
+                    break;
+            }
+        }
+        else
+        {
+            AIR_PRINT("Get STP Port:%u FID:%u State Fail.", port, fid);
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doStpGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(stpGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doStpSet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(stpSetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doStp(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(stpCmds, argc, argv);
+}
+
+static void
+_mir_printPortList(UI32_T * mt)
+{
+    I8_T j = 0;
+    UI8_T first = 0;
+    UI8_T find = 0;
+    for(j = (AIR_MAX_NUM_OF_PORTS - 1); j >= 0; j--)
+    {
+        if((*mt) & (1 << j))
+        {
+            first = j;
+            find = 1;
+            break;
+        }
+    }
+    if(find)
+    {
+        for(j = 0; j < AIR_MAX_NUM_OF_PORTS; j++)
+        {
+            if((*mt) & (1 << j))
+            {
+                if(j == first)
+                    AIR_PRINT("%-2d", j);
+                else
+                    AIR_PRINT("%-2d,", j);
+            }
+        }
+    }
+    else
+        AIR_PRINT("NULL");
+    AIR_PRINT("\n");
+}
+
+static void
+_mir_printSrcPortList(
+    const UI32_T         unit,
+    const UI32_T         sessionid)
+{
+
+    I8_T i = 0;
+    AIR_MIR_SESSION_T   session;
+    AIR_PORT_BITMAP_T txPbm = {0}, rxPbm = {0};
+
+    for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+    {
+         memset(&session, 0, sizeof(session));
+         session.src_port = i;
+         air_mir_getMirrorPort(unit, sessionid, &session);
+
+         if(session.flags & AIR_MIR_SESSION_FLAGS_DIR_TX)
+         {
+            txPbm[0] |= (1 << i);
+         }
+         if(session.flags & AIR_MIR_SESSION_FLAGS_DIR_RX)
+         {
+            rxPbm[0] |= (1 << i);
+         }
+    }
+    AIR_PRINT("Src PortList\n");
+    AIR_PRINT(" - Rx portlist = ");
+    _mir_printPortList(rxPbm);
+    AIR_PRINT(" - Tx portlist = ");
+    _mir_printPortList(txPbm);
+}
+
+static void
+_mir_printSession(
+    const UI32_T            unit,
+    const UI32_T            session_id,
+    const AIR_MIR_SESSION_T *ptr_session)
+{
+
+    AIR_PRINT("Session id: %d\n", session_id);
+    AIR_PRINT("State: %s \n", (ptr_session->flags & AIR_MIR_SESSION_FLAGS_ENABLE)? "enable": "disable");
+    AIR_PRINT("Tx tag: %s \n", (ptr_session->flags & AIR_MIR_SESSION_FLAGS_TX_TAG_OBEY_CFG)? "On": "Off");
+    AIR_PRINT("Dst port: %d \n", ptr_session->dst_port);
+    _mir_printSrcPortList(unit,session_id);
+}
+
+static AIR_ERROR_NO_T
+doMirrorGetSid(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T      rc = AIR_E_OK;
+    UI32_T              session_id = 0;
+    AIR_MIR_SESSION_T   session = {0};
+    I8_T i = 0;
+
+    session_id = _strtoul(argv[0], NULL, 0);
+    rc = air_mir_getSession(0, session_id, &session);
+    if (AIR_E_OK != rc)
+    {
+        AIR_PRINT("***Error***, get mirror session fail\n");
+        return rc;
+    }
+    /* print session information */
+    if(session.dst_port == AIR_PORT_INVALID)
+    {
+        AIR_PRINT("Session id %d not found\n", session_id);
+    }
+    else
+    {
+        _mir_printSession(0, session_id, &session);
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doMirrorDelSid(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T      rc = AIR_E_OK;
+    UI32_T              session_id = 0;
+    AIR_MIR_SESSION_T   session = {0};
+    UI8_T i = 0;
+
+    session_id = _strtoul(argv[0], NULL, 0);
+    rc = air_mir_delSession(0, session_id);
+    if (AIR_E_OK != rc)
+    {
+        AIR_PRINT("***Error***, del mirror session fail\n");
+        return rc;
+    }
+    for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+    {
+        session.src_port = i;
+        rc = air_mir_setMirrorPort(0, session_id, &session);
+        if (AIR_E_OK != rc)
+        {
+            AIR_PRINT("***Error***,port=%u error\n", i);
+            return rc;
+        }
+    }
+    if (rc != AIR_E_OK)
+    {
+        AIR_PRINT("***Error***, delete mirror session fail\n");
+    }
+    else
+        AIR_PRINT("***OK***, delete mirror session success\n");
+
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doMirrorAddRlist(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T      rc = AIR_E_OK;
+    UI32_T              session_id = 0;
+    AIR_MIR_SESSION_T   session = {0};
+    AIR_PORT_BITMAP_T rxPbm = {0};
+    UI8_T i = 0;
+
+    /*mirror add session-rlist <sid(0..3)> <list(UINTLIST)>*/
+    session_id = _strtoul(argv[0], NULL, 0);
+    rc = _portListStr2Ary(argv[1], rxPbm, 1);
+    if(rc != AIR_E_OK)
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return rc;
+    }
+    if(!rxPbm[0])
+    {
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            memset(&session, 0, sizeof(AIR_MIR_SESSION_T));
+            session.src_port = i;
+            rc = air_mir_getMirrorPort(0, session_id, &session);
+            if (AIR_E_OK != rc)
+            {
+                AIR_PRINT("***Error***,get port=%u error\n", i);
+                return rc;
+            }
+
+            session.flags &= ~AIR_MIR_SESSION_FLAGS_DIR_RX;
+            session.src_port = i;
+            rc = air_mir_setMirrorPort(0, session_id, &session);
+            if (AIR_E_OK != rc)
+            {
+                AIR_PRINT("***Error***,set rx port=%u error\n", i);
+                return rc;
+            }
+        }
+    }
+    else
+    {
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(rxPbm[0] & (1 << i))
+            {
+                memset(&session, 0, sizeof(AIR_MIR_SESSION_T));
+                session.src_port = i;
+                rc = air_mir_getMirrorPort(0, session_id, &session);
+                if (AIR_E_OK != rc)
+                {
+                    AIR_PRINT("***Error***,get port=%u error\n", i);
+                    return rc;
+                }
+
+                session.flags |= AIR_MIR_SESSION_FLAGS_DIR_RX;
+                session.src_port = i;
+                rc = air_mir_setMirrorPort(0, session_id, &session);
+                if (AIR_E_OK != rc)
+                {
+                    AIR_PRINT("***Error***,port=%u error\n", i);
+                    return rc;
+                }
+            }
+        }
+    }
+
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doMirrorAddTlist(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T      rc = AIR_E_OK;
+    UI32_T              session_id = 0;
+    AIR_MIR_SESSION_T   session = {0};
+    AIR_PORT_BITMAP_T txPbm = {0};
+    UI8_T i = 0;
+
+    /*mirror add session-tlist <sid(0..3)> <list(UINTLIST)>*/
+    session_id = _strtoul(argv[0], NULL, 0);
+    rc = _portListStr2Ary(argv[1], txPbm, 1);
+    if(rc != AIR_E_OK)
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return rc;
+    }
+    if(!txPbm[0])
+    {
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            memset(&session, 0, sizeof(AIR_MIR_SESSION_T));
+            session.src_port = i;
+            rc = air_mir_getMirrorPort(0, session_id, &session);
+            if (AIR_E_OK != rc)
+            {
+                AIR_PRINT("***Error***,get port=%u error\n", i);
+                return rc;
+            }
+
+            session.flags &= ~AIR_MIR_SESSION_FLAGS_DIR_TX;
+            session.src_port = i;
+            rc = air_mir_setMirrorPort(0, session_id, &session);
+            if (AIR_E_OK != rc)
+            {
+                AIR_PRINT("***Error***,set rx port=%u error\n", i);
+                return rc;
+            }
+        }
+    }
+    else
+    {
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(txPbm[0] & (1 << i))
+            {
+                memset(&session, 0, sizeof(AIR_MIR_SESSION_T));
+                session.src_port = i;
+                rc = air_mir_getMirrorPort(0, session_id, &session);
+                if (AIR_E_OK != rc)
+                {
+                    AIR_PRINT("***Error***,get port=%u error\n", i);
+                    return rc;
+                }
+
+                session.flags |= AIR_MIR_SESSION_FLAGS_DIR_TX;
+                session.src_port = i;
+                rc = air_mir_setMirrorPort(0, session_id, &session);
+                if (AIR_E_OK != rc)
+                {
+                    AIR_PRINT("***Error***,port=%u error\n", i);
+                    return rc;
+                }
+            }
+        }
+    }
+
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doMirrorSetSessionEnable(
+    UI32_T argc,
+    C8_T *argv[])
+
+{
+    AIR_ERROR_NO_T      rc = AIR_E_OK;
+    UI32_T              session_id = 0;
+    UI32_T              enable = 0;
+    BOOL_T              tmp_en = FALSE;
+
+    /*mirror set session-enable <sid(0..3)> <state(1:En,0:Dis)>*/
+    session_id = _strtoul(argv[0], NULL, 0);
+    enable = _strtoul(argv[1], NULL, 0);
+    if(enable)
+        tmp_en = TRUE;
+    /* set port mirror state */
+    rc = air_mir_setSessionAdminMode(0, session_id, tmp_en);
+    if(AIR_E_OK!=rc)
+    {
+        AIR_PRINT("***Error***\n");
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doMirrorSetSession(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T      rc = AIR_E_OK;
+    UI32_T              session_id = 0;
+    UI32_T              dst_port = 0;
+    UI8_T               enable = 0;
+    UI8_T               tag_en = 0;
+    UI8_T               dir = 0;
+    AIR_MIR_SESSION_T  session = {0};
+    AIR_PORT_BITMAP_T   rxPbm = {0};
+    I8_T               i = 0;
+
+    /*mirror set session <sid(0..3)> <dst_port(UINT)> <state(1:En,0:Dis)> <tag(1:on, 0:off)> <list(UINTLIST)> <dir(0:none,1:tx,2:rx,3:both)>*/
+    session_id = _strtoul(argv[0], NULL, 0);
+    dst_port = _strtoul(argv[1], NULL, 0);
+    AIR_PRINT("session id %d dst port %d.\n", session_id, dst_port);
+    session.dst_port = dst_port;
+    enable = _strtoul(argv[2], NULL, 0);
+    if(enable)
+    {
+        session.flags |= AIR_MIR_SESSION_FLAGS_ENABLE;
+    }
+    else
+    {
+        session.flags &= ~AIR_MIR_SESSION_FLAGS_ENABLE;
+    }
+    tag_en = _strtoul(argv[3], NULL, 0);
+    if(tag_en)
+    {
+        session.flags |= AIR_MIR_SESSION_FLAGS_TX_TAG_OBEY_CFG;
+    }
+    else
+    {
+        session.flags &= ~AIR_MIR_SESSION_FLAGS_TX_TAG_OBEY_CFG;
+    }
+    rc = _portListStr2Ary(argv[4], rxPbm, 1);
+    if(rc != AIR_E_OK)
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return rc;
+    }
+    AIR_PRINT("pbm %x.\n", rxPbm);
+    dir = _strtoul(argv[5], NULL, 0);
+    if(dir == 1)
+    {
+        session.flags |= AIR_MIR_SESSION_FLAGS_DIR_TX;
+    }
+    else if(dir == 2)
+    {
+        session.flags |= AIR_MIR_SESSION_FLAGS_DIR_RX;
+    }
+    else if(dir == 3)
+    {
+        session.flags |= AIR_MIR_SESSION_FLAGS_DIR_TX;
+        session.flags |= AIR_MIR_SESSION_FLAGS_DIR_RX;
+    }
+    else if (!dir)
+    {
+        session.flags &= ~AIR_MIR_SESSION_FLAGS_DIR_TX;
+        session.flags &= ~AIR_MIR_SESSION_FLAGS_DIR_RX;
+    }
+    else
+    {
+        return AIR_E_BAD_PARAMETER;
+    }
+    for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+    {
+        if(rxPbm[0] & (1 << i))
+        {
+            session.src_port = i;
+            /* set port mirror session */
+            rc = air_mir_addSession(0, session_id, &session);
+
+            if(AIR_E_OK!=rc)
+            {
+                AIR_PRINT("***Error***,dst-port=%u, src-port=%u error\n", session.dst_port, session.src_port);
+                return rc;
+            }
+            else
+                AIR_PRINT("add session %d,dst-port=%u, src-port=%u\n", session_id, session.dst_port, session.src_port);
+        }
+    }
+
+    return rc;
+}
+
+
+
+static AIR_ERROR_NO_T
+doMirrorSet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(mirrorSetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doMirrorAdd(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(mirrorAddCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doMirrorGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(mirrorGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doMirrorDel(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(mirrorDelCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doMirror(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(mirrorCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doMibClearPort(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+
+    if(1 == argc)
+    {
+        /* mib clear port */
+        port = _strtoul(argv[0], NULL, 0);
+        ret = air_mib_clear_by_port(0,port);
+        AIR_PRINT("Clear port %d mib stats",port);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Done.\n");
+        }
+        else
+        {
+            AIR_PRINT("Fail.\n");
+        }
+    }
+    else if(0 == argc)
+    {
+        /*restart mib counter*/
+        air_mib_clear(0);
+        AIR_PRINT("Clear all mib stats",port);
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doMibClearAcl(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+
+    if(0 == argc)
+    {
+        /* mib clear acl */
+        ret = air_mib_clearAclEvent(0);
+        AIR_PRINT("Clear ACL Event Counter ");
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Done.\n");
+        }
+        else
+        {
+            AIR_PRINT("Fail.\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doMibGetPort(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0;
+    UI32_T tmp32 = 0xffffffff;
+    AIR_MIB_CNT_RX_T rx_mib = {0};
+    AIR_MIB_CNT_TX_T tx_mib = {0};
+
+    port = _strtoul(argv[0], NULL, 0);
+    if(1 == argc)
+    {
+        /* mib get <port(0..6)> */
+        ret = air_mib_get(0, port, &rx_mib, &tx_mib);
+        AIR_PRINT("Get MIB Counter of Port %u ", port);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Done.\n");
+            AIR_PRINT("RX Drop Packet                    : %u\n", rx_mib.RDPC);
+            AIR_PRINT("RX filtering Packet               : %u\n", rx_mib.RFPC);
+            AIR_PRINT("RX Unicast Packet                 : %u\n", rx_mib.RUPC);
+            AIR_PRINT("RX Multicast Packet               : %u\n", rx_mib.RMPC);
+            AIR_PRINT("RX Broadcast Packet               : %u\n", rx_mib.RBPC);
+            AIR_PRINT("RX Alignment Error Packet         : %u\n", rx_mib.RAEPC);
+            AIR_PRINT("RX CRC Packet                     : %u\n", rx_mib.RCEPC);
+            AIR_PRINT("RX Undersize Packet               : %u\n", rx_mib.RUSPC);
+            AIR_PRINT("RX Fragment Error Packet          : %u\n", rx_mib.RFEPC);
+            AIR_PRINT("RX Oversize Packet                : %u\n", rx_mib.ROSPC);
+            AIR_PRINT("RX Jabber Error Packet            : %u\n", rx_mib.RJEPC);
+            AIR_PRINT("RX Pause Packet                   : %u\n", rx_mib.RPPC);
+            AIR_PRINT("RX Packet Length 64 bytes         : %u\n", rx_mib.RL64PC);
+            AIR_PRINT("RX Packet Length 65 ~ 127 bytes   : %u\n", rx_mib.RL65PC);
+            AIR_PRINT("RX Packet Length 128 ~ 255 bytes  : %u\n", rx_mib.RL128PC);
+            AIR_PRINT("RX Packet Length 256 ~ 511 bytes  : %u\n", rx_mib.RL256PC);
+            AIR_PRINT("RX Packet Length 512 ~ 1023 bytes : %u\n", rx_mib.RL512PC);
+            AIR_PRINT("RX Packet Length 1024 ~ 1518 bytes: %u\n", rx_mib.RL1024PC);
+            AIR_PRINT("RX Packet Length 1519 ~ max bytes : %u\n", rx_mib.RL1519PC);
+            AIR_PRINT("RX_CTRL Drop Packet               : %u\n", rx_mib.RCDPC);
+            AIR_PRINT("RX Ingress Drop Packet            : %u\n", rx_mib.RIDPC);
+            AIR_PRINT("RX ARL Drop Packet                : %u\n", rx_mib.RADPC);
+            AIR_PRINT("FLow Control Drop Packet          : %u\n", rx_mib.FCDPC);
+            AIR_PRINT("WRED Drop Packtet                 : %u\n", rx_mib.WRDPC);
+            AIR_PRINT("Mirror Drop Packet                : %u\n", rx_mib.MRDPC);
+            AIR_PRINT("RX  sFlow Sampling Packet         : %u\n", rx_mib.SFSPC);
+            AIR_PRINT("Rx sFlow Total Packet             : %u\n", rx_mib.SFTPC);
+            AIR_PRINT("Port Control Drop Packet          : %u\n", rx_mib.RXC_DPC);
+            AIR_PRINT("RX Octets good or bad packtes l32 : %u\n", (UI32_T)(rx_mib.ROC & tmp32));
+            AIR_PRINT("RX Octets good or bad packtes h32 : %u\n", (UI32_T)((rx_mib.ROC >> 32) & tmp32));
+            AIR_PRINT("RX Octets bad packets l32         : %u\n", (UI32_T)(rx_mib.ROC2 & tmp32));
+            AIR_PRINT("RX Octets bad packets h32         : %u\n", (UI32_T)((rx_mib.ROC2 >> 32) & tmp32));
+            AIR_PRINT("\n");
+            AIR_PRINT("TX Drop Packet                    : %u\n", tx_mib.TDPC);
+            AIR_PRINT("TX CRC Packet                     : %u\n", tx_mib.TCRC);
+            AIR_PRINT("TX Unicast Packet                 : %u\n", tx_mib.TUPC);
+            AIR_PRINT("TX Multicast Packet               : %u\n", tx_mib.TMPC);
+            AIR_PRINT("TX Broadcast Packet               : %u\n", tx_mib.TBPC);
+            AIR_PRINT("TX Collision Event Count          : %u\n", tx_mib.TCEC);
+            AIR_PRINT("TX Single Collision Event Count   : %u\n", tx_mib.TSCEC);
+            AIR_PRINT("TX Multiple Conllision Event Count: %u\n", tx_mib.TMCEC);
+            AIR_PRINT("TX Deferred Event Count           : %u\n", tx_mib.TDEC);
+            AIR_PRINT("TX Late Collision Event Count     : %u\n", tx_mib.TLCEC);
+            AIR_PRINT("TX Excessive Collision Event Count: %u\n", tx_mib.TXCEC);
+            AIR_PRINT("TX Pause Packet                   : %u\n", tx_mib.TPPC);
+            AIR_PRINT("TX Packet Length 64 bytes         : %u\n", tx_mib.TL64PC);
+            AIR_PRINT("TX Packet Length 65 ~ 127 bytes   : %u\n", tx_mib.TL65PC);
+            AIR_PRINT("TX Packet Length 128 ~ 255 bytes  : %u\n", tx_mib.TL128PC);
+            AIR_PRINT("TX Packet Length 256 ~ 511 bytes  : %u\n", tx_mib.TL256PC);
+            AIR_PRINT("TX Packet Length 512 ~ 1023 bytes : %u\n", tx_mib.TL512PC);
+            AIR_PRINT("TX Packet Length 1024 ~ 1518 bytes: %u\n", tx_mib.TL1024PC);
+            AIR_PRINT("TX Packet Length 1519 ~ max bytes : %u\n", tx_mib.TL1519PC);
+            AIR_PRINT("TX Oversize Drop Packet           : %u\n", tx_mib.TODPC);
+            AIR_PRINT("TX Octets good or bad packtes l32 : %u\n", (UI32_T)(tx_mib.TOC & tmp32));
+            AIR_PRINT("TX Octets good or bad packtes h32 : %u\n", (UI32_T)((tx_mib.TOC >> 32) & tmp32));
+            AIR_PRINT("TX Octets bad packets l32         : %u\n", (UI32_T)(tx_mib.TOC2 & tmp32));
+            AIR_PRINT("TX Octets bad packets h32         : %u\n", (UI32_T)((tx_mib.TOC2 >> 32) & tmp32));
+        }
+        else
+        {
+            AIR_PRINT("Fail.\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doMibGetAcl(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T event = 0;
+    UI32_T cnt = 0;
+
+    if(1 == argc)
+    {
+        /* mib get acl <event(0..7)> */
+        event = _strtoul(argv[0], NULL, 0);
+        ret = air_mib_getAclEvent(0, event, &cnt);
+        AIR_PRINT("Get counter of ACL event %u ", event);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Done.\n");
+            AIR_PRINT("ACL Event Counter:%u\n", cnt);
+        }
+        else
+        {
+            AIR_PRINT("Fail.\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doMibClear(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(mibClearCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doMibGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(mibGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doMib(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(mibCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doQosRateLimitExMngFrm(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T dir = 0;
+    BOOL_T enable = FALSE;
+
+    dir = _strtoul(argv[0], NULL, 0);
+    if(2 == argc)
+    {
+        if(dir == 0)
+            dir = AIR_QOS_RATE_DIR_EGRESS;
+        else if(dir == 1)
+            dir = AIR_QOS_RATE_DIR_INGRESS;
+        else
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            ret = AIR_E_BAD_PARAMETER;
+            return ret;
+        }
+        enable = _strtoul(argv[1], NULL, 0);
+        ret = air_qos_setRateLimitExMngFrm(0, dir, enable);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Success.\n");
+            AIR_PRINT("Set %s Rate Limit Control %s management frame.\n",
+                    (AIR_QOS_RATE_DIR_INGRESS == dir)?"Ingress":"Egress",
+                    (TRUE == enable)?"exclude":"include");
+        }
+        else
+        {
+            AIR_PRINT("Fail.\n");
+            return ret;
+        }
+    }
+    else if(0 == argc)
+    {
+        dir = AIR_QOS_RATE_DIR_EGRESS;
+        ret = air_qos_getRateLimitExMngFrm(0, dir, &enable);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Success.\n");
+            AIR_PRINT("Get %s Rate Limit Control %s management frame.\n",
+                    (AIR_QOS_RATE_DIR_INGRESS == dir)?"Ingress":"Egress",
+                    (TRUE == enable)?"exclude":"include");
+        }
+        else
+        {
+            AIR_PRINT("Fail.\n");
+            return ret;
+        }
+        dir = AIR_QOS_RATE_DIR_INGRESS;
+        ret = air_qos_getRateLimitExMngFrm(0, dir, &enable);
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT("Success.\n");
+            AIR_PRINT("Get %s Rate Limit Control %s management frame.\n",
+                    (AIR_QOS_RATE_DIR_INGRESS == dir)?"Ingress":"Egress",
+                    (TRUE == enable)?"exclude":"include");
+        }
+        else
+        {
+            AIR_PRINT("Fail.\n");
+            return ret;
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+
+}
+
+static AIR_ERROR_NO_T
+doQosPortPriority(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    AIR_PORT_BITMAP_T portlist = {0};
+    UI32_T priority = 0;
+    UI8_T i = 0;
+
+    ret = _portListStr2Ary(argv[0], portlist, 1);
+    if(ret != AIR_E_OK)
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return ret;
+    }
+    if(2 == argc)
+    {
+        priority = _strtoul(argv[1], NULL, 0);
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(portlist[0] & (1 << i))
+            {
+                ret = air_qos_setPortPriority(0, i, priority);
+                if(ret == AIR_E_OK)
+                {
+                    AIR_PRINT("Set Port%02d port based priority %d Success.\n", i, priority);
+                }
+                else
+                {
+                    AIR_PRINT("Set Port%02d port based priority %d Fail.\n", i, priority);
+                }
+            }
+        }
+    }
+    else if(1 == argc)
+    {
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(portlist[0] & (1 << i))
+            {
+                ret = air_qos_getPortPriority(0, i, &priority);
+                if(ret == AIR_E_OK)
+                {
+                    AIR_PRINT("Get Port%d port based priority %d.\n", i, priority);
+                }
+                else
+                {
+                    AIR_PRINT("Get Port%d port based priority Fail.\n", i);
+                }
+            }
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doQosRateLimit(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    AIR_PORT_BITMAP_T portlist = {0};
+    AIR_QOS_RATE_LIMIT_CFG_T rl = {0};
+    UI8_T i = 0;
+
+    ret = _portListStr2Ary(argv[0], portlist, 1);
+    if(ret != AIR_E_OK)
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return ret;
+    }
+    if(5 == argc)
+    {
+        rl.ingress_cir = _strtoul(argv[1], NULL, 0);
+        rl.ingress_cbs = _strtoul(argv[2], NULL, 0);
+        rl.egress_cir = _strtoul(argv[3], NULL, 0);
+        rl.egress_cbs = _strtoul(argv[4], NULL, 0);
+        rl.flags |= AIR_QOS_RATE_LIMIT_CFG_FLAGS_ENABLE_INGRESS;
+        rl.flags |= AIR_QOS_RATE_LIMIT_CFG_FLAGS_ENABLE_EGRESS;
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(portlist[0] & (1 << i))
+            {
+                ret = air_qos_setRateLimit(0, i, &rl);
+                if(ret == AIR_E_OK)
+                {
+                    AIR_PRINT("Set Port%02d Ingress CIR %d CBS %d Egress CIR %d CBS %d Success.\n", i, rl.ingress_cir, rl.ingress_cbs, rl.egress_cir, rl.egress_cbs);
+                }
+                else
+                {
+                    AIR_PRINT("Set Port%02d Ingress CIR %d CBS %d Egress CIR %d CBS %d Fail.\n", i, rl.ingress_cir, rl.ingress_cbs, rl.egress_cir, rl.egress_cbs);
+                }
+            }
+        }
+    }
+    else if(1 == argc)
+    {
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(portlist[0] & (1 << i))
+            {
+                ret = air_qos_getRateLimit(0, i, &rl);
+                if(ret == AIR_E_OK)
+                {
+                    AIR_PRINT("Get Port%02d Ingress CIR %d CBS %d Egress CIR %d CBS %d\n", i, rl.ingress_cir, rl.ingress_cbs, rl.egress_cir, rl.egress_cbs);
+                }
+                else
+                {
+                    AIR_PRINT("Get Port%02d Rate Info Fail.\n", i);
+                }
+            }
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doQosRateLimitEnable(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    AIR_PORT_BITMAP_T portlist = {0};
+    C8_T sten[2][10] = {"Disable", "Enable"};
+    C8_T stdir[2][10] = {"Egress", "Ingress"};
+    UI32_T dir = 0, en = 0;
+    AIR_QOS_RATE_DIR_T tmp_dir = AIR_QOS_RATE_DIR_LAST;
+    BOOL_T state = FALSE;
+    UI8_T i = 0;
+
+    ret = _portListStr2Ary(argv[0], portlist, 1);
+    if(ret != AIR_E_OK)
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return ret;
+    }
+    if(3 == argc)
+    {
+        dir = _strtoul(argv[1], NULL, 0);
+        en = _strtoul(argv[2], NULL, 0);
+        if(dir == 0)
+            tmp_dir = AIR_QOS_RATE_DIR_EGRESS;
+        else if(dir == 1)
+            tmp_dir = AIR_QOS_RATE_DIR_INGRESS;
+        else
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            return AIR_E_BAD_PARAMETER;
+        }
+        if(en)
+            state= TRUE;
+        else
+            state = FALSE;
+
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(portlist[0] & (1 << i))
+            {
+                ret = air_qos_setRateLimitEnable(0, i, tmp_dir, state);
+                if(AIR_E_OK == ret)
+                {
+                    AIR_PRINT("Set Port%02d %s rate %s Success.\n", i, stdir[dir], sten[en]);
+                }
+                else
+                {
+                    AIR_PRINT("Set Port%02d %s rate %s Fail.\n", i, stdir[dir], sten[en]);
+                }
+            }
+        }
+    }
+    else if(1 == argc)
+    {
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(portlist[0] & (1 << i))
+            {
+                tmp_dir = AIR_QOS_RATE_DIR_EGRESS;
+                dir = 0;
+                ret = air_qos_getRateLimitEnable(0, i, tmp_dir, &state);
+                if(AIR_E_OK == ret)
+                {
+                    AIR_PRINT("Get Port%02d %s rate %s Success.\n", i, stdir[dir], sten[state]);
+                }
+                else
+                {
+                    AIR_PRINT("Get Port%02d %s rate state Fail.\n", i, stdir[dir]);
+                }
+                tmp_dir = AIR_QOS_RATE_DIR_INGRESS;
+                dir = 1;
+                ret = air_qos_getRateLimitEnable(0, i, tmp_dir, &state);
+                if(AIR_E_OK == ret)
+                {
+                    AIR_PRINT("Get Port%02d %s rate %s Success.\n", i, stdir[dir], sten[state]);
+                }
+                else
+                {
+                    AIR_PRINT("Get Port%02d %s rate state Fail.\n", i, stdir[dir]);
+                }
+            }
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+
+}
+
+static AIR_ERROR_NO_T
+doQosDscp2Pri(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T dscp = 0, priority = 0;
+
+    dscp = _strtoul(argv[0], NULL, 0);
+    if(2 == argc)
+    {
+        priority = _strtoul(argv[1], NULL, 0);
+        ret = air_qos_setDscp2Pri(0, dscp, priority);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Set DSCP %d to priority %d Success.\n", dscp, priority);
+        }
+        else
+        {
+            AIR_PRINT("Set DSCP %d to priority %d Fail.\n", dscp, priority);
+        }
+    }
+    else if(1 == argc)
+    {
+        ret = air_qos_getDscp2Pri(0, dscp, &priority);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Get DSCP %d to priority %d\n", dscp, priority);
+        }
+        else
+        {
+            AIR_PRINT("Get DSCP %d to priority Fail.\n", dscp);
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doQosPri2Queue(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T priority = 0, queue = 0;
+
+    priority = _strtoul(argv[1], NULL, 0);
+
+    if(2 == argc)
+    {
+        priority = _strtoul(argv[0], NULL, 0);
+        queue = _strtoul(argv[1], NULL, 0);
+        ret = air_qos_setPri2Queue(0, priority, queue);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Set priority %d to queue %d Success.\n", priority, queue);
+        }
+        else
+        {
+            AIR_PRINT("Set priority %d to queue %d Fail.\n", priority, queue);
+        }
+    }
+    else
+    {
+        for(; priority < AIR_QOS_QUEUE_MAX_NUM; priority++)
+        {
+            ret = air_qos_getPri2Queue(0, priority, &queue);
+            if(AIR_E_OK == ret)
+            {
+                AIR_PRINT("Get priority %d to queue %d\n", priority, queue);
+            }
+            else
+            {
+                AIR_PRINT("Get priority %d to queue Fail.\n", priority);
+            }
+        }
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doQosTrustMode(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T mode = 0;
+    C8_T bs[4][13] = {"port", "1p_port", "dscp_port", "dscp_1p_port"};
+    AIR_QOS_TRUST_MODE_T mode_t = AIR_QOS_TRUST_MODE_LAST;
+    AIR_PORT_BITMAP_T portlist = {0};
+    UI8_T i = 0;
+
+    ret = _portListStr2Ary(argv[0], portlist, 1);
+    if(ret != AIR_E_OK)
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return ret;
+    }
+    if(2 == argc)
+    {
+        mode = _strtoul(argv[1], NULL, 0);
+        if(mode == 0)
+            mode_t = AIR_QOS_TRUST_MODE_PORT;
+        else if(mode == 1)
+            mode_t = AIR_QOS_TRUST_MODE_1P_PORT;
+        else if(mode == 2)
+            mode_t = AIR_QOS_TRUST_MODE_DSCP_PORT;
+        else if(mode == 3)
+            mode_t = AIR_QOS_TRUST_MODE_DSCP_1P_PORT;
+        else
+        {
+            AIR_PRINT("Unrecognized command.\n");
+            return AIR_E_BAD_PARAMETER;
+        }
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(portlist[0] & (1 << i))
+            {
+                ret = air_qos_setTrustMode(0, i, mode_t);
+                if(AIR_E_OK == ret)
+                {
+                    AIR_PRINT("port %d Set Trust mode %s Success.\n", i, bs[mode]);
+                }
+                else
+                {
+                    AIR_PRINT("port %d Set Trust mode %s Fail.\n", i, bs[mode]);
+                }
+            }
+        }
+    }
+    else if(1 == argc)
+    {
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(portlist[0] & (1 << i))
+            {
+                mode_t = AIR_QOS_TRUST_MODE_LAST;
+                ret = air_qos_getTrustMode(0, i, &mode_t);
+                if(AIR_E_OK == ret)
+                {
+                    if(mode_t == AIR_QOS_TRUST_MODE_PORT)
+                        mode = 0;
+                    else if(mode_t == AIR_QOS_TRUST_MODE_1P_PORT)
+                        mode = 1;
+                    else if(mode_t == AIR_QOS_TRUST_MODE_DSCP_PORT)
+                        mode = 2;
+                    else if(mode_t == AIR_QOS_TRUST_MODE_DSCP_1P_PORT)
+                        mode = 3;
+                    else
+                    {
+                        AIR_PRINT("port %d Get Trust mode Fail.\n", i);
+                        return AIR_E_OTHERS;
+                    }
+                    AIR_PRINT("port %d Get Trust mode %s\n", i, bs[mode]);
+                }
+                else
+                {
+                    AIR_PRINT("port %d Get Trust mode Fail.\n", i);
+                }
+            }
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doQosScheduleAlgo(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    AIR_PORT_BITMAP_T portlist = {0};
+    AIR_QOS_SCH_MODE_T sch_mode = AIR_QOS_SCH_MODE_LAST;
+    UI32_T scheduler = 0;
+    UI8_T queue = 0;
+    C8_T sche[3][5] = {"SP", "WRR", "WFQ"};
+    UI32_T weight = AIR_QOS_SHAPER_NOSETTING;
+    UI8_T i = 0;
+
+    ret = _portListStr2Ary(argv[0], portlist, 1);
+    if(ret != AIR_E_OK)
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return ret;
+    }
+    AIR_PRINT("port list is %d\n", portlist[0]);
+    if(4 == argc)
+    {
+        queue = _strtoul(argv[1], NULL, 0);
+        AIR_PRINT("queue is %d\n", queue);
+        scheduler = _strtoul(argv[2], NULL, 0);
+        AIR_PRINT("scheduler is %d\n", scheduler);
+        weight = _strtoul(argv[3], NULL, 0);
+        AIR_PRINT("weight is %d\n", weight);
+        if(scheduler == 0)
+        {
+            sch_mode = AIR_QOS_SCH_MODE_SP;
+            weight = AIR_QOS_SHAPER_NOSETTING;
+            if(weight != AIR_QOS_SHAPER_NOSETTING)
+                AIR_PRINT("[Warning] SP schedule mode no need weight\n");
+        }
+        else if(scheduler == 1)
+        {
+            sch_mode = AIR_QOS_SCH_MODE_WRR;
+            if(weight == AIR_QOS_SHAPER_NOSETTING)
+            {
+                AIR_PRINT("[Warning] No weight value input , plz check\n");
+                return AIR_E_BAD_PARAMETER;
+            }
+            AIR_PRINT("sch_mode is 1\n");
+        }
+        else if(scheduler == 2)
+        {
+            sch_mode = AIR_QOS_SCH_MODE_WFQ;
+            if(weight == AIR_QOS_SHAPER_NOSETTING)
+            {
+                AIR_PRINT("[Warning] No weight value input , plz check\n");
+                return AIR_E_BAD_PARAMETER;
+            }
+        }
+        else
+        {
+            AIR_PRINT("Unknown schedule mode, plz check again\n");
+            return AIR_E_BAD_PARAMETER;
+        }
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(portlist[0] & (1 << i))
+            {
+                AIR_PRINT("port %d\n", i);
+                ret = air_qos_setScheduleAlgo(0, i, queue, sch_mode, weight);
+                if(AIR_E_OK == ret)
+                {
+                    AIR_PRINT("Set Port%02d Scheduler %s Success.\n", i, sche[scheduler]);
+                }
+                else
+                {
+                    AIR_PRINT("Set Port%02d Scheduler %s Fail.\n", i, sche[scheduler]);
+                }
+            }
+        }
+    }
+    else if(2 == argc)
+    {
+        queue = _strtoul(argv[1], NULL, 0);
+        for(i = 0; i < AIR_MAX_NUM_OF_PORTS; i++)
+        {
+            if(portlist[0] & (1 << i))
+            {
+                ret = air_qos_getScheduleAlgo(0, i, queue, &sch_mode, &weight);
+                if(AIR_E_OK == ret)
+                {
+                    if(sch_mode == AIR_QOS_SCH_MODE_SP)
+                        AIR_PRINT("Get Port%02d queue %d Scheduler %s\n", i, queue, sche[sch_mode]);
+                    else if((sch_mode == AIR_QOS_SCH_MODE_WRR) || (sch_mode == AIR_QOS_SCH_MODE_WFQ))
+                        AIR_PRINT("Get Port%02d queue %d Scheduler %s weight %d\n", i, queue, sche[sch_mode], weight);
+                    else
+                        AIR_PRINT("Get Port%02d queue %d Scheduler unknown\n", i, queue);
+                }
+                else
+                {
+                    AIR_PRINT("Get Port%02d queue %d Scheduler Fail.\n", i, queue);
+                }
+            }
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doQosGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(qosGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doQosSet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(qosSetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doQos(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(qosCmds, argc, argv);
+}
+static AIR_ERROR_NO_T
+doDiagTxComply(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T phy = 0;
+    UI32_T mode = 0;
+
+    phy = _strtoul(argv[0], NULL, 0);
+    if(2 == argc)
+    {
+        /* diag set txComply <phy(0~5)> <mode(0~8)> */
+        mode = _strtoul(argv[1], NULL, 0);
+        ret = air_diag_setTxComplyMode(0, phy, mode);
+        AIR_PRINT("Set diagnostic function: PHY %u Tx Compliance mode = %u ", phy, mode);
+    }
+    else if(1 == argc)
+    {
+        /* diag get txComply <phy(0~5)> */
+        ret = air_diag_getTxComplyMode(0, phy, &mode);
+        AIR_PRINT("Get diagnostic function: PHY %u Tx Compliance mode ", phy);
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK == ret)
+    {
+        AIR_PRINT("Done.\n\tMode=");
+        switch(mode)
+        {
+            case AIR_DIAG_TXCOMPLY_MODE_10M_NLP:
+                AIR_PRINT("%s\n", "10M_NLP");
+                break;
+            case AIR_DIAG_TXCOMPLY_MODE_10M_RANDOM:
+                AIR_PRINT("%s\n", "10M_Random");
+                break;
+            case AIR_DIAG_TXCOMPLY_MODE_10M_SINE:
+                AIR_PRINT("%s\n", "10M_Sine");
+                break;
+            case AIR_DIAG_TXCOMPLY_MODE_100M_PAIR_A:
+                AIR_PRINT("%s\n", "100M_Pair_a");
+                break;
+            case AIR_DIAG_TXCOMPLY_MODE_100M_PAIR_B:
+                AIR_PRINT("%s\n", "100M_Pair_b");
+                break;
+            case AIR_DIAG_TXCOMPLY_MODE_1000M_TM1:
+                AIR_PRINT("%s\n", "1000M_TM1");
+                break;
+            case AIR_DIAG_TXCOMPLY_MODE_1000M_TM2:
+                AIR_PRINT("%s\n", "1000M_TM2");
+                break;
+            case AIR_DIAG_TXCOMPLY_MODE_1000M_TM3:
+                AIR_PRINT("%s\n", "1000M_TM3");
+                break;
+            case AIR_DIAG_TXCOMPLY_MODE_1000M_TM4:
+                AIR_PRINT("%s\n", "1000M_TM4");
+                break;
+            default:
+                break;
+        }
+    }
+    else
+    if(AIR_E_OTHERS == ret)
+    {
+        AIR_PRINT("isn't setting.\n");
+    }
+    else
+    {
+        AIR_PRINT("Fail.\n");
+    }
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doDiagSet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(diagSetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doDiagGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(diagGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doDiag(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(diagCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doLedMode(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T mode = 0;
+
+    if(1 == argc)
+    {
+        /* led set mode <mode(0:disable, 1~3:2 LED, 4:User-Define)> */
+        mode = _strtoul(argv[0], NULL, 0);
+        ret = air_led_setMode(0, 0, mode);
+        AIR_PRINT("Set LED mode ");
+    }
+    else if(0 == argc)
+    {
+        /* led get mode */
+        ret = air_led_getMode(0, 0, &mode);
+        AIR_PRINT("Get LED mode ");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK == ret)
+    {
+        switch(mode)
+        {
+            case AIR_LED_MODE_DISABLE:
+                AIR_PRINT(": Disabled.\n");
+                break;
+            case AIR_LED_MODE_2LED_MODE0:
+                AIR_PRINT(": LED 0:Link / LED 1:Activity.\n");
+                break;
+            case AIR_LED_MODE_2LED_MODE1:
+                AIR_PRINT(": LED 0:1000M Activity / LED 1:100M Activity.\n");
+                break;
+            case AIR_LED_MODE_2LED_MODE2:
+                AIR_PRINT(": LED 0:1000M Activity / LED 1:10&100M Activity.\n");
+                break;
+            case AIR_LED_MODE_USER_DEFINE:
+                AIR_PRINT(": User-Defined.\n");
+                break;
+            default:
+                AIR_PRINT(": Fail.\n");
+                break;
+        }
+    }
+    else
+    if(AIR_E_OTHERS == ret)
+    {
+        AIR_PRINT(": Unrecognized.\n");
+    }
+    else
+    {
+        AIR_PRINT("Fail.\n");
+    }
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doLedState(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI8_T entity = 0;
+    BOOL_T state = FALSE;
+
+    entity = _strtoul(argv[0], NULL, 0);
+    if(2 == argc)
+    {
+        /* led set state <led(0..1)> <state(1:En 0:Dis)> */
+        state = _strtoul(argv[1], NULL, 0);
+        ret = air_led_setState(0, 0, entity, state);
+        AIR_PRINT("Set LED %u state ", entity);
+    }
+    else if(1 == argc)
+    {
+        /* led get state <led(0..1)> */
+        ret = air_led_getState(0, 0, entity, &state);
+        AIR_PRINT("Get LED %u state ", entity );
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK == ret)
+    {
+        AIR_PRINT(": %s.\n", (state)?"Enable":"Disabled");
+    }
+    else
+    if(AIR_E_OTHERS == ret)
+    {
+        AIR_PRINT(": Unrecognized.\n");
+    }
+    else
+    {
+        AIR_PRINT("Fail.\n");
+    }
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doLedUsrDef(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T i = 0;
+    UI8_T entity = 0;
+    BOOL_T polarity = LOW;
+    UI32_T on_evt_map = 0;
+    UI32_T blk_evt_map = 0;
+    AIR_LED_ON_EVT_T on_evt;
+    AIR_LED_BLK_EVT_T blk_evt;
+
+    entity = _strtoul(argv[0], NULL, 0);
+    if(4 == argc)
+    {
+        /* led set usr <led(0..1)> <polarity(0:low, 1:high)> <on_evt(7'bin)> <blink_evt(10'bin)> */
+        polarity = _strtoul(argv[1], NULL, 0);
+        on_evt_map = _strtoul(argv[2], NULL, 2);
+        blk_evt_map = _strtoul(argv[3], NULL, 2);
+
+        memset(&on_evt, 0, sizeof(AIR_LED_ON_EVT_T));
+        if(on_evt_map & BIT(0))
+        {
+            on_evt.link_1000m = TRUE;
+        }
+        if(on_evt_map & BIT(1))
+        {
+            on_evt.link_100m = TRUE;
+        }
+        if(on_evt_map & BIT(2))
+        {
+            on_evt.link_10m = TRUE;
+        }
+        if(on_evt_map & BIT(3))
+        {
+            on_evt.link_dn = TRUE;
+        }
+        if(on_evt_map & BIT(4))
+        {
+            on_evt.fdx = TRUE;
+        }
+        if(on_evt_map & BIT(5))
+        {
+            on_evt.hdx = TRUE;
+        }
+        if(on_evt_map & BIT(6))
+        {
+            on_evt.force = TRUE;
+        }
+
+        memset(&blk_evt, 0, sizeof(AIR_LED_BLK_EVT_T));
+        if(blk_evt_map & BIT(0))
+        {
+            blk_evt.tx_act_1000m = TRUE;
+        }
+        if(blk_evt_map & BIT(1))
+        {
+            blk_evt.rx_act_1000m = TRUE;
+        }
+        if(blk_evt_map & BIT(2))
+        {
+            blk_evt.tx_act_100m = TRUE;
+        }
+        if(blk_evt_map & BIT(3))
+        {
+            blk_evt.rx_act_100m = TRUE;
+        }
+        if(blk_evt_map & BIT(4))
+        {
+            blk_evt.tx_act_10m = TRUE;
+        }
+        if(blk_evt_map & BIT(5))
+        {
+            blk_evt.rx_act_10m = TRUE;
+        }
+        if(blk_evt_map & BIT(6))
+        {
+            blk_evt.cls = TRUE;
+        }
+        if(blk_evt_map & BIT(7))
+        {
+            blk_evt.rx_crc = TRUE;
+        }
+        if(blk_evt_map & BIT(8))
+        {
+            blk_evt.rx_idle = TRUE;
+        }
+        if(blk_evt_map & BIT(9))
+        {
+            blk_evt.force = TRUE;
+        }
+        ret = air_led_setUsrDef(0, 0, entity, polarity, on_evt, blk_evt);
+        AIR_PRINT("Set LED %u User-define ", entity);
+    }
+    else if(1 == argc)
+    {
+        /* led get usr <led(0..1)> */
+        ret = air_led_getUsrDef(0, 0, entity, &polarity, &on_evt, &blk_evt);
+        AIR_PRINT("Get LED %u User-define ", entity );
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK == ret)
+    {
+        AIR_PRINT("Done.\n");
+        AIR_PRINT("Polarity:%u.\n", polarity);
+        AIR_PRINT("On Event:\n");
+        i = 6;
+        AIR_PRINT("\t(%u)Force on :%s\n", i--, (on_evt.force)?"On":"Off");
+        AIR_PRINT("\t(%u)Half Duplex :%s\n", i--, (on_evt.hdx)?"On":"Off");
+        AIR_PRINT("\t(%u)Full Duplex :%s\n", i--, (on_evt.fdx)?"On":"Off");
+        AIR_PRINT("\t(%u)Link Down :%s\n", i--, (on_evt.link_dn)?"On":"Off");
+        AIR_PRINT("\t(%u)Link 10M :%s\n", i--, (on_evt.link_10m)?"On":"Off");
+        AIR_PRINT("\t(%u)Link 100M :%s\n", i--, (on_evt.link_100m)?"On":"Off");
+        AIR_PRINT("\t(%u)Link 1000M :%s\n", i--, (on_evt.link_1000m)?"On":"Off");
+
+        AIR_PRINT("Blinking Event:\n");
+        i = 9;
+        AIR_PRINT("\t(%u)Force blinks :%s\n", i--, (blk_evt.force)?"On":"Off");
+        AIR_PRINT("\t(%u)Rx Idle Error :%s\n", i--, (blk_evt.rx_idle)?"On":"Off");
+        AIR_PRINT("\t(%u)Rx CRC Error :%s\n", i--, (blk_evt.rx_crc)?"On":"Off");
+        AIR_PRINT("\t(%u)Collision :%s\n", i--, (blk_evt.cls)?"On":"Off");
+        AIR_PRINT("\t(%u)10Mbps RX Activity :%s\n", i--, (blk_evt.rx_act_10m)?"On":"Off");
+        AIR_PRINT("\t(%u)10Mbps TX Activity :%s\n", i--, (blk_evt.tx_act_10m)?"On":"Off");
+        AIR_PRINT("\t(%u)100Mbps RX Activity :%s\n", i--, (blk_evt.rx_act_100m)?"On":"Off");
+        AIR_PRINT("\t(%u)100Mbps TX Activity :%s\n", i--, (blk_evt.tx_act_100m)?"On":"Off");
+        AIR_PRINT("\t(%u)1000Mbps RX Activity :%s\n", i--, (blk_evt.rx_act_1000m)?"On":"Off");
+        AIR_PRINT("\t(%u)1000Mbps TX Activity :%s\n", i--, (blk_evt.tx_act_1000m)?"On":"Off");
+    }
+    else
+    {
+        AIR_PRINT("Fail.\n");
+    }
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doLedBlkTime(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    AIR_LED_BLK_DUR_T time = 0;
+
+    if(1 == argc)
+    {
+        /* led set time <time(0~5)> */
+        time = _strtoul(argv[0], NULL, 0);
+        ret = air_led_setBlkTime(0, 0, time);
+        AIR_PRINT("Set Blinking Duration ");
+    }
+    else if(0 == argc)
+    {
+        /* led get time */
+        ret = air_led_getBlkTime(0, 0, &time);
+        AIR_PRINT("Get Blinking Duration ");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK == ret)
+    {
+        AIR_PRINT("Done.\n");
+        AIR_PRINT("\tBlinking duration : %u (ms)\n", (32 << time) );
+    }
+    else
+    {
+        AIR_PRINT("Fail.\n");
+    }
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doLedSet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(ledSetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doLedGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(ledGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doLed(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(ledCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doShowVersion(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_PRINT("VERSION: %s\n", AIR_VER_SDK);
+
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T
+doShow(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(showCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doStormRate(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0, type = 0;
+    UI32_T unit = 0, count = 0;
+    C8_T stype[3][5] = {"Bcst", "Mcst", "Ucst"};
+    UI32_T kb = 0;
+
+    port = _strtol(argv[0], NULL, 10);
+    type = _strtol(argv[1], NULL, 10);
+    if(4 == argc)
+    {
+        count = _strtol(argv[2], NULL, 10);
+        unit = _strtol(argv[3], NULL, 10);
+
+        if(0 == unit)
+            kb = 64;
+        else if(1 == unit)
+            kb = 256;
+        else if(2 == unit)
+            kb = 1024;
+        else if(3 == unit)
+            kb = 4096;
+        else
+            kb = 16384;
+        ret = air_sec_setStormRate(0, port, type, count, unit);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Set Port%02d %s storm rate (%d * %d) = %d Kbps\n", port, stype[type], count, kb, (count*kb));
+        }
+        else
+        {
+            AIR_PRINT("Set Port%02d %s storm rate Fail.\n", port, stype[type]);
+            AIR_PRINT("Note: Port(0..4) can only select unit(0..3), port(5..6) can only select unit(4)\n");
+        }
+    }
+    else if(2 == argc)
+    {
+        ret = air_sec_getStormRate(0, port, type, &count, &unit);
+        if(AIR_E_OK == ret)
+        {
+            if(0 == unit)
+                kb = 64;
+            else if(1 == unit)
+                kb = 256;
+            else if(2 == unit)
+                kb = 1024;
+            else if(3 == unit)
+                kb = 4096;
+            else
+                kb = 16384;
+            AIR_PRINT("Port%02d %s storm rate (%d * %d) = %d Kbps\n", port, stype[type], count, kb, (count*kb));
+        }
+        else
+        {
+            AIR_PRINT("Get Port%02d %s storm rate Fail\n", port, stype[type]);
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doFldMode(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0, type = 0;
+    BOOL_T fld_en = 0;
+    C8_T stype[4][5] = {"Bcst", "Mcst", "Ucst", "Qury"};
+    C8_T sen[2][10] = {"Disable", "Enable"};
+
+    port = _strtol(argv[0], NULL, 10);
+    type = _strtol(argv[1], NULL, 10);
+
+    if(2 == argc)
+    {
+        ret = air_sec_getFldMode(0, port, type, &fld_en);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Get Port%02d flooding %s frame %s\n", port, stype[type], sen[fld_en]);
+        }
+        else
+        {
+            AIR_PRINT("Get Port%02d flooding %s frame Fail\n", port, stype[type]);
+        }
+    }
+    else if(3 == argc)
+    {
+        fld_en = _strtol(argv[2], NULL, 10);
+        ret = air_sec_setFldMode(0, port, type, fld_en);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Set Port%02d flooding %s frame %s Success\n", port, stype[type], sen[fld_en]);
+        }
+        else
+        {
+            AIR_PRINT("Set Port%02d flooding %s frame %s Fail\n", port, stype[type], sen[fld_en]);
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doStormEnable(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T port = 0, type = 0;
+    BOOL_T en = 0;
+    C8_T sen[2][10] = {"Disable", "Enable"};
+    C8_T stype[3][5] = {"Bcst", "Mcst", "Ucst"};
+
+    port = _strtol(argv[0], NULL, 10);
+    type = _strtol(argv[1], NULL, 10);
+    if(3 == argc)
+    {
+        en = _strtol(argv[2], NULL, 10);
+        ret = air_sec_setStormEnable(0, port, type, en);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Set Port%02d %s storm %s Success.\n", port, stype[type], sen[en]);
+        }
+        else
+        {
+            AIR_PRINT("Set Port%02d %s storm %s Fail.\n", port, stype[type], sen[en]);
+        }
+    }
+    else if(2 == argc)
+    {
+        ret = air_sec_getStormEnable(0, port, type, &en);
+        if(AIR_E_OK == ret)
+        {
+            AIR_PRINT("Port%02d %s storm %s\n", port, stype[type], sen[en]);
+        }
+        else
+        {
+            AIR_PRINT("Get Port%02d %s storm Fail\n", port, stype[type]);
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doSaLearning(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    AIR_SEC_PORTSEC_PORT_CONFIG_T port_config;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    if(2 == argc)
+    {
+        memset(&port_config, 0, sizeof(AIR_SEC_PORTSEC_PORT_CONFIG_T));
+        rc = air_sec_getPortSecPortCfg(0, port, &port_config);
+        port_config.sa_lrn_en = _strtoul(argv[1], NULL, 0);
+        rc = air_sec_setPortSecPortCfg(0, port, port_config);
+        if(AIR_E_OK == rc)
+        {
+            AIR_PRINT("Set Port%02d sa learn %s Success.\n", port, port_config.sa_lrn_en?"Enable":"Disable");
+        }
+        else
+        {
+            AIR_PRINT("Set Port%02d sa learn %s Fail.\n", port, port_config.sa_lrn_en?"Enable":"Disable");
+        }
+    }
+    else if(1 == argc)
+    {
+        rc = air_sec_getPortSecPortCfg(0, port, &port_config);
+        if(AIR_E_OK == rc)
+        {
+            AIR_PRINT("Port%02d sa learn: %s\n", port, port_config.sa_lrn_en?"Enable":"Disable");
+        }
+        else
+        {
+            AIR_PRINT("Get Port%02d sa learn Fail\n", port);
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        rc = AIR_E_BAD_PARAMETER;
+    }
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doSaLimit(UI32_T argc, C8_T *argv[])
+{
+    UI32_T port = 0;
+    AIR_SEC_PORTSEC_PORT_CONFIG_T port_config;
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    port = _strtoul(argv[0], NULL, 0);
+    if(3 == argc)
+    {
+        memset(&port_config, 0, sizeof(AIR_SEC_PORTSEC_PORT_CONFIG_T));
+        rc = air_sec_getPortSecPortCfg(0, port, &port_config);
+        port_config.sa_lmt_en = _strtoul(argv[1], NULL, 0);
+        port_config.sa_lmt_cnt = _strtoul(argv[2], NULL, 0);
+        rc = air_sec_setPortSecPortCfg(0, port, port_config);
+        if(AIR_E_OK == rc)
+        {
+            AIR_PRINT("Set Port%02d sa limit %s Success.\n", port, port_config.sa_lmt_en?"Enable":"Disable");
+        }
+        else
+        {
+            AIR_PRINT("Set Port%02d sa limit %s Fail.\n", port, port_config.sa_lmt_en?"Enable":"Disable");
+        }
+    }
+    else if(1 == argc)
+    {
+        rc = air_sec_getPortSecPortCfg(0, port, &port_config);
+        if(AIR_E_OK == rc)
+        {
+            AIR_PRINT("Port%02d ", port);
+            AIR_PRINT("sa limit: %s\n", port_config.sa_lmt_en?"Enable":"Disable");
+            if(TRUE == (port_config.sa_lmt_en && (AIR_MAX_NUM_OF_MAC ==  port_config.sa_lmt_cnt)))
+            {
+                AIR_PRINT("Sa learning without limitation\n");
+            }
+            else if(TRUE == (port_config.sa_lmt_en && (AIR_MAX_NUM_OF_MAC >  port_config.sa_lmt_cnt)))
+            {
+                AIR_PRINT("Rx sa allowable learning number: %d\n", port_config.sa_lmt_cnt);
+            }
+        }
+        else
+        {
+            AIR_PRINT("Get Port%02d sa limit Fail\n", port);
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        rc = AIR_E_BAD_PARAMETER;
+    }
+
+    return rc;
+}
+
+static AIR_ERROR_NO_T
+doSecGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(secGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doSecSet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(secSetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doSec(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(secCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doSwitchCpuPortEn(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    BOOL_T cpu_en = FALSE;
+
+    if(0 == argc)
+    {
+        /* switch get sysPhyEn */
+        ret = air_switch_getCpuPortEn(0, &cpu_en);
+        AIR_PRINT("Get Cpu Port State ");
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT(": %s\n", cpu_en?"Enable":"Disable");
+        }
+        else
+        {
+            AIR_PRINT("Fail!\n");
+        }
+    }
+    else if(1 == argc)
+    {
+        /* switch set sysPhyEn <phy_en> */
+        cpu_en = _strtol(argv[0], NULL, 0);
+        ret = air_switch_setCpuPortEn(0, cpu_en);
+        AIR_PRINT("Set CPU port State ");
+        if(ret == AIR_E_OK)
+        {
+            AIR_PRINT(": %s\n", cpu_en?"Enable":"Disable");
+        }
+        else
+        {
+            AIR_PRINT("Fail!\n");
+        }
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doSwitchCpuPort(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    BOOL_T cpu_en = FALSE;
+    UI32_T port = 0;
+    C8_T str_temp[AIR_MAX_NUM_OF_PORTS+1];
+
+    if(1 == argc)
+    {
+        /* switch set cpuPort <portnumber> */
+        port = _strtol(argv[0], NULL, 10);
+        ret = air_switch_setCpuPort(0, port);
+        AIR_PRINT("Set CPU Port ");
+    }
+    else if(0 == argc)
+    {
+        /* switch get cpuPort */
+        ret = air_switch_getCpuPort(0, &port);
+        AIR_PRINT("Get CPU Port ");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK == ret)
+    {
+        AIR_PRINT(": %d\n", port);
+    }
+    else
+    {
+        AIR_PRINT("Fail!\n");
+    }
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doSwitchPhyLCIntrEn(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T phy = 0;
+    BOOL_T enable = FALSE;
+
+    if(2 == argc)
+    {
+        /* switch set phyLCIntrEn <phy(0..6)> <(1:En,0:Dis)> */
+        phy    = _strtol(argv[0], NULL, 10);
+        enable = _strtol(argv[1], NULL, 10);
+        ret    = air_switch_setSysIntrEn(0, (phy + AIR_SYS_INTR_TYPE_PHY0_LC), enable);
+    }
+    else if(1 == argc)
+    {
+        /* switch get phyLCIntrEn <phy(0..6)> */
+        phy = _strtol(argv[0], NULL, 10);
+        ret = air_switch_getSysIntrEn(0, (phy + AIR_SYS_INTR_TYPE_PHY0_LC), &enable);
+        AIR_PRINT("PHY(%d) LinkChange interrupt : %s\n", phy, (TRUE == enable) ? "enable" : "disable");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doSwitchPhyLCIntrSts(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T phy = 0;
+    BOOL_T enable = FALSE;
+
+    if(2 == argc)
+    {
+        /* switch set phyLCIntrSts <phy(0..6)> <(1:En)> */
+        phy    = _strtol(argv[0], NULL, 10);
+        enable = _strtol(argv[1], NULL, 10);
+        ret    = air_switch_setSysIntrStatus(0, (phy + AIR_SYS_INTR_TYPE_PHY0_LC), enable);
+    }
+    else if(1 == argc)
+    {
+        /* switch get phyLCIntrSts <phy(0..6)> */
+        phy = _strtol(argv[0], NULL, 10);
+        ret = air_switch_getSysIntrStatus(0, (phy + AIR_SYS_INTR_TYPE_PHY0_LC), &enable);
+        AIR_PRINT("PHY(%d) LinkChange interrupt state : %s\n", phy, (TRUE == enable) ? "set" : "unset");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        ret = AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+
+static AIR_ERROR_NO_T
+doSwitchSet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(switchSetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doSwitchGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(switchGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doSwitch(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(switchCmds, argc, argv);
+}
+
+static void _air_acl_printRuleMap(UI32_T *rule_map, UI32_T ary_num)
+{
+    UI32_T i;
+    BOOL_T first;
+
+    first = TRUE;
+    for(i=0; i<ary_num*32; i++)
+    {
+        if(rule_map[i/32] & BIT(i%32))
+        {
+            if(TRUE == first)
+            {
+                AIR_PRINT("%u", i);
+                first = FALSE;
+            }
+            else
+            {
+                AIR_PRINT(",%u", i);
+            }
+        }
+    }
+    AIR_PRINT("\n");
+}
+
+static AIR_ERROR_NO_T
+doAclEn(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T argi=0;
+    UI32_T port = 0;
+    BOOL_T en = FALSE;
+
+    if(1 == argc)
+    {
+        /* acl set en <en(1:En,0:Dis)> */
+        en = _strtoul(argv[argi++], NULL, 2);
+        ret = air_acl_setGlobalState(0, en);
+        AIR_PRINT("Set Global ACL function ");
+    }
+    else if(0 == argc)
+    {
+        /* acl get en */
+        ret = air_acl_getGlobalState(0, &en);
+        AIR_PRINT("Get Global ACL function ");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        AIR_PRINT(": %s\n", (TRUE == en)?"Enable":"Disable");
+    }
+    else
+    {
+        AIR_PRINT("Fail!\n");
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclRule(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T rule_idx = 0;
+    BOOL_T state = FALSE, reverse = FALSE, end = FALSE;
+    UI32_T argi = 0, ipv6 = 0, i = 0;
+    AIR_ACL_RULE_T rule;
+    UI8_T tmp_ip[16] = {0};
+    C8_T str_temp[AIR_MAX_NUM_OF_PORTS+1];
+    C8_T str[40];
+
+    memset(&rule, 0, sizeof(AIR_ACL_RULE_T));
+    if(argc >= 6)
+    {
+        /* acl set rule <idx(0..255)> <state(0:Dis,1:En)> <reverse(0:Dis,1:En)> <end(0:Dis,1:En)> <portmap(7'bin)>
+        <ipv6(0:Dis,1:En,2:Not care)>
+        [ dmac <dmac(12'hex)> <dmac_mask(12'hex)> ]
+        [ smac <smac(12'hex)> <smac_mask(12'hex)> ]
+        [ stag <stag(4'hex)> <stag_mask(4'hex)> ]
+        [ ctag <ctag(4'hex)> <ctag_mask(4'hex)> ]
+        [ etype <etype(4'hex)> <etype_mask(4'hex)> ]
+        [ dip <dip(IPADDR)> <dip_mask(IPADDR)> ]
+        [ sip <sip(IPADDR)> <sip_mask(IPADDR)> ]
+        [ dscp <dscp(2'hex)> <dscp_mask(2'hex)> ]
+        [ protocol <protocol(2'hex)> <protocol_mask(2'hex)> ]
+        [ dport <dport(4'hex)> <dport_mask(4'hex)> ]
+        [ sport <sport(4'hex)> <sport_mask(4'hex)> ]
+        [ flow_label <flow_label(4'hex)> <flow_label_mask(4'hex)> ]
+        [ udf <udf(4'hex)> <udf_mask(4'hex)> ] */
+
+        rule_idx = _strtoul(argv[argi++], NULL, 0);
+
+        rule.ctrl.rule_en = _strtoul(argv[argi++], NULL, 0);
+        rule.ctrl.reverse = _strtoul(argv[argi++], NULL, 0);
+        rule.ctrl.end = _strtoul(argv[argi++], NULL, 0);
+
+        rule.key.portmap = _strtoul(argv[argi++], NULL, 2);
+        rule.mask.portmap = (~rule.key.portmap) & AIR_ALL_PORT_BITMAP;
+
+        ipv6 = _strtoul(argv[argi++], NULL, 0);
+        if(0 == ipv6)
+        {
+            rule.key.isipv6 = FALSE;
+            rule.mask.isipv6 = TRUE;
+        }
+        else if(1 == ipv6)
+        {
+            rule.key.isipv6 = TRUE;
+            rule.mask.isipv6 = TRUE;
+        }
+        else
+        {
+            rule.mask.isipv6 = FALSE;
+        }
+
+        if(0 == _strcmp(argv[argi], "dmac"))
+        {
+            argi++;
+            _str2mac(argv[argi++], rule.key.dmac);
+            _str2mac(argv[argi++], rule.mask.dmac);
+            rule.key.fieldmap |= 1 << AIR_ACL_DMAC;
+        }
+
+        if(0 == _strcmp(argv[argi], "smac"))
+        {
+            argi++;
+            _str2mac(argv[argi++], rule.key.smac);
+            _str2mac(argv[argi++], rule.mask.smac);
+            rule.key.fieldmap |= 1 << AIR_ACL_SMAC;
+        }
+
+        if(0 == _strcmp(argv[argi], "stag"))
+        {
+            argi++;
+            rule.key.stag = _strtoul(argv[argi++], NULL, 16);
+            rule.mask.stag = _strtoul(argv[argi++], NULL, 16);
+            rule.key.fieldmap |= 1 << AIR_ACL_STAG;
+        }
+
+        if(0 == _strcmp(argv[argi], "ctag"))
+        {
+            argi++;
+            rule.key.ctag = _strtoul(argv[argi++], NULL, 16);
+            rule.mask.ctag = _strtoul(argv[argi++], NULL, 16);
+            rule.key.fieldmap |= 1 << AIR_ACL_CTAG;
+        }
+
+        if(0 == _strcmp(argv[argi], "etype"))
+        {
+            argi++;
+            rule.key.etype= _strtoul(argv[argi++], NULL, 16);
+            rule.mask.etype = _strtoul(argv[argi++], NULL, 16);
+            rule.key.fieldmap |= 1 << AIR_ACL_ETYPE;
+        }
+
+        if(0 == _strcmp(argv[argi], "dip"))
+        {
+            argi++;
+            if(0 == ipv6)
+            {
+                _str2ipv4(argv[argi++], rule.key.dip);
+                _str2ipv4(argv[argi++], rule.mask.dip);
+            }
+            else if(1 == ipv6)
+            {
+                _str2ipv6(argv[argi++], tmp_ip);
+                rule.key.dip[3] = (tmp_ip[0]<<24) | (tmp_ip[1]<<16) | (tmp_ip[2]<<8) | tmp_ip[3];
+                rule.key.dip[2] = (tmp_ip[4]<<24) | (tmp_ip[5]<<16) | (tmp_ip[6]<<8) | tmp_ip[7];
+                rule.key.dip[1] = (tmp_ip[8]<<24) | (tmp_ip[9]<<16) | (tmp_ip[10]<<8) | tmp_ip[11];
+                rule.key.dip[0] = (tmp_ip[12]<<24) | (tmp_ip[13]<<16) | (tmp_ip[14]<<8) | tmp_ip[15];
+                _str2ipv6(argv[argi++], tmp_ip);
+                rule.mask.dip[3] = (tmp_ip[0]<<24) | (tmp_ip[1]<<16) | (tmp_ip[2]<<8) | tmp_ip[3];
+                rule.mask.dip[2] = (tmp_ip[4]<<24) | (tmp_ip[5]<<16) | (tmp_ip[6]<<8) | tmp_ip[7];
+                rule.mask.dip[1] = (tmp_ip[8]<<24) | (tmp_ip[9]<<16) | (tmp_ip[10]<<8) | tmp_ip[11];
+                rule.mask.dip[0] = (tmp_ip[12]<<24) | (tmp_ip[13]<<16) | (tmp_ip[14]<<8) | tmp_ip[15];
+            }
+            rule.key.fieldmap |= 1 << AIR_ACL_DIP;
+        }
+
+        if(0 == _strcmp(argv[argi], "sip"))
+        {
+            argi++;
+            if(0 == ipv6)
+            {
+                _str2ipv4(argv[argi++], rule.key.sip);
+                _str2ipv4(argv[argi++], rule.mask.sip);
+            }
+            else if(1 == ipv6)
+            {
+                _str2ipv6(argv[argi++], tmp_ip);
+                rule.key.sip[3] = (tmp_ip[0]<<24) | (tmp_ip[1]<<16) | (tmp_ip[2]<<8) | tmp_ip[3];
+                rule.key.sip[2] = (tmp_ip[4]<<24) | (tmp_ip[5]<<16) | (tmp_ip[6]<<8) | tmp_ip[7];
+                rule.key.sip[1] = (tmp_ip[8]<<24) | (tmp_ip[9]<<16) | (tmp_ip[10]<<8) | tmp_ip[11];
+                rule.key.sip[0] = (tmp_ip[12]<<24) | (tmp_ip[13]<<16) | (tmp_ip[14]<<8) | tmp_ip[15];
+                _str2ipv6(argv[argi++], tmp_ip);
+                rule.mask.sip[3] = (tmp_ip[0]<<24) | (tmp_ip[1]<<16) | (tmp_ip[2]<<8) | tmp_ip[3];
+                rule.mask.sip[2] = (tmp_ip[4]<<24) | (tmp_ip[5]<<16) | (tmp_ip[6]<<8) | tmp_ip[7];
+                rule.mask.sip[1] = (tmp_ip[8]<<24) | (tmp_ip[9]<<16) | (tmp_ip[10]<<8) | tmp_ip[11];
+                rule.mask.sip[0] = (tmp_ip[12]<<24) | (tmp_ip[13]<<16) | (tmp_ip[14]<<8) | tmp_ip[15];
+            }
+            rule.key.fieldmap |= 1 << AIR_ACL_SIP;
+        }
+
+        if(0 == _strcmp(argv[argi], "dscp"))
+        {
+            argi++;
+            rule.key.dscp = _strtoul(argv[argi++], NULL, 16);
+            rule.mask.dscp = _strtoul(argv[argi++], NULL, 16);
+            rule.key.fieldmap |= 1 << AIR_ACL_DSCP;
+        }
+
+        if(0 == _strcmp(argv[argi], "protocol"))
+        {
+            argi++;
+            rule.key.protocol = _strtoul(argv[argi++], NULL, 16);
+            rule.mask.protocol = _strtoul(argv[argi++], NULL, 16);
+            rule.key.fieldmap |= 1 << AIR_ACL_PROTOCOL;
+        }
+
+        if(0 == _strcmp(argv[argi], "dport"))
+        {
+            argi++;
+            rule.key.dport = _strtoul(argv[argi++], NULL, 16);
+            rule.mask.dport = _strtoul(argv[argi++], NULL, 16);
+            rule.key.fieldmap |= 1 << AIR_ACL_DPORT;
+        }
+
+        if(0 == _strcmp(argv[argi], "sport"))
+        {
+            argi++;
+            rule.key.sport = _strtoul(argv[argi++], NULL, 16);
+            rule.mask.sport = _strtoul(argv[argi++], NULL, 16);
+            rule.key.fieldmap |= 1 << AIR_ACL_SPORT;
+        }
+
+        if(0 == _strcmp(argv[argi], "flow_label"))
+        {
+            argi++;
+            rule.key.flow_label= _strtoul(argv[argi++], NULL, 16);
+            rule.mask.flow_label= _strtoul(argv[argi++], NULL, 16);
+            rule.key.fieldmap |= 1 << AIR_ACL_FLOW_LABEL;
+        }
+
+        if(0 == _strcmp(argv[argi], "udf"))
+        {
+            argi++;
+            rule.key.udf = _strtoul(argv[argi++], NULL, 16);
+            rule.mask.udf = _strtoul(argv[argi++], NULL, 16);
+            rule.key.fieldmap |= 1 << AIR_ACL_UDF;
+        }
+
+        rule.mask.fieldmap = rule.key.fieldmap;
+        ret = air_acl_setRule(0, rule_idx, &rule);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Set ACL Rule(%u): %s\n", rule_idx, air_error_getString(ret));
+    }
+    else if(1 == argc)
+    {
+        rule_idx = _strtoul(argv[0], NULL, 0);
+        ret = air_acl_getRule(0, rule_idx, &rule);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Get ACL Rule(%u): %s\n", rule_idx, air_error_getString(ret));
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK == ret)
+    {
+        if(TRUE == rule.ctrl.rule_en)
+        {
+            AIR_PRINT("\t Rule end          : %s\n", (TRUE == rule.ctrl.end)?"Enable":"Disable");
+            AIR_PRINT("\t Rule reverse      : %s\n", (TRUE == rule.ctrl.reverse)?"Enable":"Disable");
+            _hex2bitstr((~rule.mask.portmap) & AIR_ALL_PORT_BITMAP, str_temp, AIR_MAX_NUM_OF_PORTS+1);
+            AIR_PRINT("\t Portmap[0:6]      : %s\n", str_temp);
+            for(i = AIR_ACL_DMAC; i < AIR_ACL_FIELD_TYPE_LAST; i++)
+            {
+                if((1 << i) & rule.mask.fieldmap)
+                {
+                    switch (i)
+                    {
+                        case AIR_ACL_DMAC:
+                            AIR_PRINT("\t dmac: ");
+                            AIR_PRINT("%02x-%02x-%02x-%02x-%02x-%02x",
+                            rule.key.dmac[0], rule.key.dmac[1], rule.key.dmac[2],
+                            rule.key.dmac[3], rule.key.dmac[4], rule.key.dmac[5]);
+                            AIR_PRINT(", dmac-mask: ");
+                            AIR_PRINT("%02x-%02x-%02x-%02x-%02x-%02x\n",
+                            rule.mask.dmac[0], rule.mask.dmac[1], rule.mask.dmac[2],
+                            rule.mask.dmac[3], rule.mask.dmac[4], rule.mask.dmac[5]);
+                            break;
+                        case AIR_ACL_SMAC:
+                            AIR_PRINT("\t smac: ");
+                            AIR_PRINT("%02x-%02x-%02x-%02x-%02x-%02x",
+                            rule.key.smac[0], rule.key.smac[1], rule.key.smac[2],
+                            rule.key.smac[3], rule.key.smac[4], rule.key.smac[5]);
+                            AIR_PRINT(", smac-mask: ");
+                            AIR_PRINT("%02x-%02x-%02x-%02x-%02x-%02x\n",
+                            rule.mask.smac[0], rule.mask.smac[1], rule.mask.smac[2],
+                            rule.mask.smac[3], rule.mask.smac[4], rule.mask.smac[5]);
+                            break;
+                        case AIR_ACL_ETYPE:
+                            AIR_PRINT("\t etype: 0x%x, etype-mask: 0x%x\n", rule.key.etype, rule.mask.etype);
+                            break;
+                        case AIR_ACL_STAG:
+                            AIR_PRINT("\t stag: 0x%x, stag-mask: 0x%x\n", rule.key.stag, rule.mask.stag);
+                            break;
+                        case AIR_ACL_CTAG:
+                            AIR_PRINT("\t ctag: 0x%x, ctag-mask: 0x%x\n", rule.key.ctag, rule.mask.ctag);
+                            break;
+                        case AIR_ACL_DPORT:
+                            AIR_PRINT("\t dport: 0x%x, dport-mask: 0x%x\n", rule.key.dport, rule.mask.dport);
+                            break;
+                        case AIR_ACL_SPORT:
+                            AIR_PRINT("\t sport: 0x%x, sport-mask: 0x%x\n", rule.key.sport, rule.mask.sport);
+                            break;
+                        case AIR_ACL_UDF:
+                            AIR_PRINT("\t udf: 0x%x, udf-mask: 0x%x\n", rule.key.udf, rule.mask.udf);
+                            break;
+                        case AIR_ACL_DIP:
+                            if (0 == rule.key.isipv6)
+                            {
+                                AIR_PRINT("\t dip: ");
+                                AIR_PRINT("%d.%d.%d.%d",
+                                ((rule.key.dip[0])&0xFF000000)>>24,((rule.key.dip[0])&0x00FF0000)>>16,
+                                ((rule.key.dip[0])&0x0000FF00)>>8, ((rule.key.dip[0])&0x000000FF));
+                                AIR_PRINT(", dip-mask: ");
+                                AIR_PRINT("%d.%d.%d.%d\n ",
+                                ((rule.mask.dip[0])&0xFF000000)>>24,((rule.mask.dip[0])&0x00FF0000)>>16,
+                                ((rule.mask.dip[0])&0x0000FF00)>>8, ((rule.mask.dip[0])&0x000000FF));
+                            }
+                            else
+                            {
+                                for(i=0; i<4; i++){
+                                    tmp_ip[i] = (rule.key.dip[3] >> (8*(3-i))) & 0xff;
+                                    AIR_PRINT("get tmp_ip[%d]=0x%x\n", i, tmp_ip[i]);
+                                }
+                                for(i=4; i<8; i++){
+                                    tmp_ip[i] = (rule.key.dip[2] >> (8*(7-i))) & 0xff;
+                                }
+                                for(i=8; i<12; i++){
+                                    tmp_ip[i] = (rule.key.dip[1] >> (8*(11-i))) & 0xff;
+                                }
+                                for(i=12; i<16; i++){
+                                    tmp_ip[i] = (rule.key.dip[0] >> (8*(15-i))) & 0xff;
+                                }
+
+                                AIR_PRINT("\t dip: ");
+                                AIR_PRINT("%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x",
+                                    tmp_ip[0], tmp_ip[1],tmp_ip[2], tmp_ip[3],tmp_ip[4], tmp_ip[5],tmp_ip[6], tmp_ip[7],
+                                    tmp_ip[8], tmp_ip[9],tmp_ip[10], tmp_ip[11],tmp_ip[12], tmp_ip[13],tmp_ip[14], tmp_ip[15]);
+                                for(i=0; i<4; i++){
+                                    tmp_ip[i] = (rule.mask.dip[3] >> (8*(3-i))) & 0xff;
+                                }
+                                for(i=4; i<8; i++){
+                                    tmp_ip[i] = (rule.mask.dip[2] >> (8*(7-i))) & 0xff;
+                                }
+                                for(i=8; i<12; i++){
+                                    tmp_ip[i] = (rule.mask.dip[1] >> (8*(11-i))) & 0xff;
+                                }
+                                for(i=12; i<16; i++){
+                                    tmp_ip[i] = (rule.mask.dip[0] >> (8*(15-i))) & 0xff;
+                                }
+                                AIR_PRINT(", dip-mask: ");
+                                AIR_PRINT("%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x\n",
+                                    tmp_ip[0], tmp_ip[1],tmp_ip[2], tmp_ip[3],tmp_ip[4], tmp_ip[5],tmp_ip[6], tmp_ip[7],
+                                    tmp_ip[8], tmp_ip[9],tmp_ip[10], tmp_ip[11],tmp_ip[12], tmp_ip[13],tmp_ip[14], tmp_ip[15]);
+                            }
+                            break;
+                        case AIR_ACL_SIP:
+                            if (0 == rule.key.isipv6)
+                            {
+                                AIR_PRINT("\t sip: ");
+                                AIR_PRINT("%d.%d.%d.%d ",
+                                ((rule.key.sip[0])&0xFF000000)>>24,((rule.key.sip[0])&0x00FF0000)>>16,
+                                ((rule.key.sip[0])&0x0000FF00)>>8, ((rule.key.sip[0])&0x000000FF));
+                                AIR_PRINT(", sip-mask: ");
+                                AIR_PRINT("%d.%d.%d.%d\n ",
+                                ((rule.mask.sip[0])&0xFF000000)>>24,((rule.mask.sip[0])&0x00FF0000)>>16,
+                                ((rule.mask.sip[0])&0x0000FF00)>>8, ((rule.mask.sip[0])&0x000000FF));
+                            }
+                            else
+                            {
+                                for(i=0; i<4; i++){
+                                    tmp_ip[i] = (rule.key.sip[3] >> (8*(3-i))) & 0xff;
+                                }
+                                for(i=4; i<8; i++){
+                                    tmp_ip[i] = (rule.key.sip[2] >> (8*(7-i))) & 0xff;
+                                }
+                                for(i=8; i<12; i++){
+                                    tmp_ip[i] = (rule.key.sip[1] >> (8*(11-i))) & 0xff;
+                                }
+                                for(i=12; i<16; i++){
+                                    tmp_ip[i] = (rule.key.sip[0] >> (8*(15-i))) & 0xff;
+                                }
+                                AIR_PRINT("\t sip: ");
+                                AIR_PRINT("%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x",
+                                    tmp_ip[0], tmp_ip[1],tmp_ip[2], tmp_ip[3],tmp_ip[4], tmp_ip[5],tmp_ip[6], tmp_ip[7],
+                                    tmp_ip[8], tmp_ip[9],tmp_ip[10], tmp_ip[11],tmp_ip[12], tmp_ip[13],tmp_ip[14], tmp_ip[15]);
+                                for(i=0; i<4; i++){
+                                    tmp_ip[i] = (rule.mask.sip[3] >> (8*(3-i))) & 0xff;
+                                }
+                                for(i=4; i<8; i++){
+                                    tmp_ip[i] = (rule.mask.sip[2] >> (8*(7-i))) & 0xff;
+                                }
+                                for(i=8; i<12; i++){
+                                    tmp_ip[i] = (rule.mask.sip[1] >> (8*(11-i))) & 0xff;
+                                }
+                                for(i=12; i<16; i++){
+                                    tmp_ip[i] = (rule.mask.sip[0] >> (8*(15-i))) & 0xff;
+                                }
+                                AIR_PRINT(", sip-mask: ");
+                                AIR_PRINT("%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x:%02x%02x\n",
+                                    tmp_ip[0], tmp_ip[1],tmp_ip[2], tmp_ip[3],tmp_ip[4], tmp_ip[5],tmp_ip[6], tmp_ip[7],
+                                    tmp_ip[8], tmp_ip[9],tmp_ip[10], tmp_ip[11],tmp_ip[12], tmp_ip[13],tmp_ip[14], tmp_ip[15]);
+                            }
+                            break;
+                        case AIR_ACL_DSCP:
+                            AIR_PRINT("\t dscp: 0x%x, dscp-mask: 0x%x\n", rule.key.dscp, rule.mask.dscp);
+                            break;
+                        case AIR_ACL_PROTOCOL:
+                            AIR_PRINT("\t protocol: 0x%x, protocol-mask: 0x%x\n", rule.key.protocol, rule.mask.protocol);
+                            break;
+                        case AIR_ACL_FLOW_LABEL:
+                            AIR_PRINT("\t flow-label: 0x%x, flow-label-mask: 0x%x\n", rule.key.flow_label, rule.mask.flow_label);
+                            break;
+                        default:
+                            AIR_PRINT("error\n");
+                            break;
+                    }
+                }
+            }
+        }
+        else
+        {
+            AIR_PRINT("Entry is Invalid.\n");
+        }
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclRmvRule(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T rule_idx = 0;
+
+    if(1 == argc)
+    {
+        /* acl del rule <idx(0..127)> */
+        rule_idx = _strtoul(argv[0], NULL, 0);
+        ret = air_acl_delRule(0, rule_idx);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Delete ACL Rule(%u): %s\n", rule_idx, air_error_getString(ret));
+    }
+    else if(0 == argc)
+    {
+        /* acl clear rule */
+        ret = air_acl_clearRule(0);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Clear ACL Rule: %s\n", air_error_getString(ret));
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclUdfRule(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T rule_idx;
+    AIR_ACL_UDF_RULE_T rule;
+    C8_T start_addr[8][12]=
+    {
+        "MAC header",
+        "L2 payload",
+        "IPv4 header",
+        "IPv6 header",
+        "L3 payload",
+        "TCP header",
+        "UDP header",
+        "L4 payload"
+    };
+    C8_T str_temp[AIR_MAX_NUM_OF_PORTS+1];
+
+    memset(&rule, 0, sizeof(AIR_ACL_UDF_RULE_T));
+    if(7 == argc)
+    {
+        /* acl set rule <idx(0..255)> <mode(0:pattern, 1:threshold)> [ <pat(4'hex)> <mask(4'hex)> | <low(4'hex)> <high(4'hex)> ] <start(0:MAC,1:ether,2:IP,3:IP_data,4:TCP/UDP,5:TCP/UDP data,6:IPv6)> <offset(0..62,unit:2 bytes)> <portmap(7'bin)> */
+        rule_idx = _strtoul(argv[0], NULL, 0);
+        rule.cmp_sel = _strtoul(argv[1], NULL, 2);
+        if(AIR_ACL_RULE_CMP_SEL_PATTERN == rule.cmp_sel)
+        {
+            rule.pattern = _strtoul(argv[2], NULL, 16);
+            rule.mask = _strtoul(argv[3], NULL, 16);
+        }
+        else
+        {
+            rule.low_threshold = _strtoul(argv[2], NULL, 16);
+            rule.high_threshold = _strtoul(argv[3], NULL, 16);
+        }
+        rule.offset_format = _strtoul(argv[4], NULL, 0);
+        rule.offset = _strtoul(argv[5], NULL, 0);
+        rule.portmap = _strtoul(argv[6], NULL, 2);
+        rule.valid = TRUE;
+        ret = air_acl_setUdfRule(0, rule_idx, rule);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Set ACL UDF Rule(%u): %s\n", rule_idx, air_error_getString(ret));
+    }
+    else if(1 == argc)
+    {
+        rule_idx = _strtoul(argv[0], NULL, 0);
+        ret = air_acl_getUdfRule(0, rule_idx, &rule);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Get ACL UDF Rule(%u): %s\n", rule_idx, air_error_getString(ret));
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK == ret)
+    {
+        if(TRUE == rule.valid)
+        {
+            AIR_PRINT("\tMode          : %s\n", (AIR_ACL_RULE_CMP_SEL_PATTERN == rule.cmp_sel)?"Pattern":"Threshold");
+            if(AIR_ACL_RULE_CMP_SEL_PATTERN == rule.cmp_sel)
+            {
+                AIR_PRINT("\tPattern       : 0x%04X\n", rule.pattern);
+                AIR_PRINT("\tMask          : 0x%04X\n", rule.mask);
+            }
+            else
+            {
+                AIR_PRINT("\tLow Threshold : 0x%04X\n", rule.low_threshold);
+                AIR_PRINT("\tHigh Threshold: 0x%04X\n", rule.high_threshold);
+            }
+            AIR_PRINT("\tOffset Start  : %s\n", start_addr[rule.offset_format]);
+            AIR_PRINT("\tOffset        : %u %s\n", rule.offset*2, (0==rule.offset)?"Byte":"Bytes");
+            _hex2bitstr(rule.portmap, str_temp, AIR_MAX_NUM_OF_PORTS+1);
+            AIR_PRINT("\tPortmap[0:6]  : %s\n", str_temp);
+        }
+        else
+        {
+            AIR_PRINT("Entry is Invalid.\n");
+        }
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclRmvUdfRule(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T rule_idx;
+
+    if(1 == argc)
+    {
+        /* acl del udfRule <idx(0..15)> */
+        rule_idx = _strtoul(argv[0], NULL, 0);
+        ret = air_acl_delUdfRule(0, rule_idx);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Delete ACL UDF Rule(%u): %s\n", rule_idx, air_error_getString(ret));
+    }
+    else if(0 == argc)
+    {
+        /* acl clear udfRule */
+        ret = air_acl_clearUdfRule(0);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Clear ACL UDF Rule: %s\n", air_error_getString(ret));
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclAction(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T argi = 0;
+    UI32_T act_idx;
+    AIR_ACL_ACTION_T act;
+    UI32_T redirect, trtcm, fwd;
+    C8_T fwding[AIR_ACL_ACT_FWD_LAST][25] =
+    {
+        "Default",
+        "Default",
+        "Default",
+        "Default",
+        "Default & CPU excluded",
+        "Default & CPU included",
+        "CPU only",
+        "Drop"
+    };
+    C8_T trtcm_usr[AIR_ACL_ACT_USR_TCM_LAST][8] =
+    {
+        "Default",
+        "Green",
+        "Yellow",
+        "Red"
+    };
+    C8_T egtag[AIR_ACL_ACT_EGTAG_LAST][11] =
+    {
+        "Default",
+        "Consistent",
+        "",
+        "",
+        "Untag",
+        "Swap",
+        "Tag",
+        "Stack"
+    };
+    C8_T str_temp[20];
+
+    memset(&act, 0, sizeof(AIR_ACL_ACTION_T));
+    if(2 < argc)
+    {
+        /* acl set action <idx(0..127)>
+        [ forward <forward(0:Default,4:Exclude CPU,5:Include CPU,6:CPU only,7:Drop)> ]
+        [ egtag <egtag(0:Default,1:Consistent,4:Untag,5:Swap,6:Tag,7:Stack)> ]
+        [ mirrormap <mirrormap(2'bin)> ]
+        [ priority <priority(0..7)> ]
+        [ redirect <redirect(0:Dst,1:Vlan)> <portmap(7'bin)> ]
+        [ leaky_vlan <leaky_vlan(1:En,0:Dis)> ]
+        [ cnt_idx <cnt_idx(0..63)> ]
+        [ rate_idx <rate_idx(0..31)> ]
+        [ attack_idx <attack_idx(0..95)> ]
+        [ vid <vid(0..4095)> ]
+        [ manage <manage(1:En,0:Dis)> ]
+        [ bpdu <bpdu(1:En,0:Dis)> ]
+        [ class <class(0:Original,1:Defined)>[0..7] ]
+        [ drop_pcd <drop_pcd(0:Original,1:Defined)> [red <red(0..7)>][yellow <yellow(0..7)>][green <green(0..7)>] ]
+        [ color <color(0:Defined,1:Trtcm)> [ <defined_color(0:Dis,1:Green,2:Yellow,3:Red)> | <trtcm_idx(0..31)> ] ]*/
+
+        act_idx = _strtoul(argv[argi++], NULL, 0);
+        if(0 == _strcmp(argv[argi], "forward"))
+        {
+            argi++;
+            fwd = _strtoul(argv[argi++], NULL, 0);
+            act.fwd_en = TRUE;
+            act.fwd = fwd;
+        }
+
+        if(0 == _strcmp(argv[argi], "egtag"))
+        {
+            argi++;
+            act.egtag_en = TRUE;
+            act.egtag = _strtoul(argv[argi++], NULL, 0);
+        }
+
+        if(0 == _strcmp(argv[argi], "mirrormap"))
+        {
+            argi++;
+            act.mirrormap = _strtoul(argv[argi++], NULL, 2);
+        }
+
+        if(0 == _strcmp(argv[argi], "priority"))
+        {
+            argi++;
+            act.pri_user_en = TRUE;
+            act.pri_user= _strtoul(argv[argi++], NULL, 0);
+        }
+
+        if(0 == _strcmp(argv[argi], "redirect"))
+        {
+            argi++;
+            redirect = _strtoul(argv[argi++], NULL, 0);
+            if(0 ==  redirect)
+            {
+                act.port_en = TRUE;
+                act.dest_port_sel = TRUE;
+                act.portmap = _strtoul(argv[argi++], NULL, 2);
+            }
+            else
+            {
+                act.port_en = TRUE;
+                act.vlan_port_sel = TRUE;
+                act.portmap = _strtoul(argv[argi++], NULL, 2);
+            }
+        }
+
+        if(0 == _strcmp(argv[argi], "leaky_vlan"))
+        {
+            argi++;
+            act.lyvlan_en = TRUE;
+            act.lyvlan = _strtoul(argv[argi++], NULL, 0);
+        }
+
+        /* ACL event counter */
+        if(0 == _strcmp(argv[argi], "cnt_idx"))
+        {
+            argi++;
+            act.cnt_en = TRUE;
+            act.cnt_idx = _strtol(argv[argi++], NULL, 0);
+        }
+
+        if(0 == _strcmp(argv[argi], "rate_idx"))
+        {
+            argi++;
+            act.rate_en = TRUE;
+            act.rate_idx = _strtol(argv[argi++], NULL, 0);
+        }
+
+        if(0 == _strcmp(argv[argi], "attack_idx"))
+        {
+            argi++;
+            act.attack_en = TRUE;
+            act.attack_idx = _strtol(argv[argi++], NULL, 0);
+        }
+
+        if(0 == _strcmp(argv[argi], "vid"))
+        {
+            argi++;
+            act.vlan_en = TRUE;
+            act.vlan_idx = _strtol(argv[argi++], NULL, 0);
+        }
+
+        /* Management frame */
+        if(0 == _strcmp(argv[argi], "manage"))
+        {
+            argi++;
+            act.mang = _strtoul(argv[argi++], NULL, 2);
+        }
+
+        if(0 == _strcmp(argv[argi], "bpdu"))
+        {
+            argi++;
+            act.bpdu = _strtoul(argv[argi++], NULL, 2);
+        }
+
+        /* DSCP class remap */
+        if(0 == _strcmp(argv[argi], "class"))
+        {
+            argi++;
+            act.trtcm_en = TRUE;
+            act.trtcm.cls_slr_sel = _strtoul(argv[argi++], NULL, 2);
+            if(TRUE == act.trtcm.cls_slr_sel)
+            {
+                act.trtcm.cls_slr = _strtoul(argv[argi++], NULL, 0);
+            }
+        }
+        if(0 == _strcmp(argv[argi], "drop_pcd"))
+        {
+            argi++;
+            act.trtcm_en = TRUE;
+            act.trtcm.drop_pcd_sel = _strtoul(argv[argi++], NULL, 2);
+            if(TRUE == act.trtcm.drop_pcd_sel)
+            {
+                if(0 == _strcmp(argv[argi], "red"))
+                {
+                    argi++;
+                    act.trtcm.drop_pcd_r= _strtoul(argv[argi++], NULL, 0);
+                }
+                if(0 == _strcmp(argv[argi], "yellow"))
+                {
+                    argi++;
+                    act.trtcm.drop_pcd_y= _strtoul(argv[argi++], NULL, 0);
+                }
+                if(0 == _strcmp(argv[argi], "green"))
+                {
+                    argi++;
+                    act.trtcm.drop_pcd_g= _strtoul(argv[argi++], NULL, 0);
+                }
+            }
+        }
+
+        /* trTCM */
+        if(0 == _strcmp(argv[argi], "color"))
+        {
+            argi++;
+            act.trtcm_en = TRUE;
+            act.trtcm.tcm_sel = _strtoul(argv[argi++], NULL, 2);
+            trtcm = _strtoul(argv[argi++], NULL, 0);
+            if(FALSE == act.trtcm.tcm_sel)
+            {
+                act.trtcm.usr_tcm = trtcm;
+            }
+            else
+            {
+                act.trtcm.tcm_idx = trtcm;
+            }
+        }
+        ret = air_acl_setAction(0, act_idx, act);
+        AIR_PRINT("Set ACL Action(%u): %s\n", act_idx, air_error_getString(ret));
+    }
+    else if(1 == argc)
+    {
+        /* acl get action <idx(0..127)> */
+        act_idx = _strtoul(argv[argi++], NULL, 0);
+        ret = air_acl_getAction(0, act_idx, &act);
+        AIR_PRINT("Get ACL Action(%u): %s\n", act_idx, air_error_getString(ret));
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK == ret)
+    {
+        if(TRUE == act.fwd_en)
+        {
+            AIR_PRINT("\t Forwarding           : %s\n", fwding[act.fwd]);
+        }
+
+        if(TRUE == act.egtag_en)
+        {
+            AIR_PRINT("\t Egress tag           : %s\n", egtag[act.egtag]);
+        }
+
+        if(act.mirrormap)
+        {
+            AIR_PRINT("\t Mirror Session Map   : %u\n", act.mirrormap);
+        }
+
+        if(TRUE == act.pri_user_en)
+        {
+            AIR_PRINT("\t User Priority        : %u\n", act.pri_user);
+        }
+
+        if(TRUE == act.port_en)
+        {
+            _hex2bitstr(act.portmap, str_temp, AIR_MAX_NUM_OF_PORTS+1);
+            if(TRUE == act.dest_port_sel)
+            {
+                AIR_PRINT("\t Destination Port[0:6]: %s\n", str_temp);
+            }
+            else
+            {
+                AIR_PRINT("\t VLAN Port[0:6]       : %s\n", str_temp);
+            }
+        }
+
+        if(TRUE == act.lyvlan_en)
+        {
+            AIR_PRINT("\t Leaky VLAN           : %s\n", (TRUE == act.lyvlan)?"Enable":"Disable");
+        }
+        AIR_PRINT("\t Management Frame     : %s\n", (TRUE == act.mang)?"Enable":"Disable");
+        AIR_PRINT("\t BPDU Frame           : %s\n", (TRUE == act.bpdu)?"Enable":"Disable");
+
+        if(TRUE == act.cnt_en)
+        {
+            AIR_PRINT("\t Event Index          : %u\n", act.cnt_idx);
+        }
+
+        /* trTCM*/
+        if(TRUE == act.trtcm_en)
+        {
+            if(TRUE == act.trtcm.cls_slr_sel)
+            {
+                AIR_PRINT("\t Class Selector Remap : %u\n", act.trtcm.cls_slr);
+            }
+            else
+            {
+                AIR_PRINT("\t Class Selector Remap : %s\n", "Disable");
+            }
+            if(TRUE == act.trtcm.drop_pcd_sel)
+            {
+                AIR_PRINT("\t Drop Precedence Remap(Red): %u\n", act.trtcm.drop_pcd_r);
+                AIR_PRINT("\t Drop Precedence Remap(Yel): %u\n", act.trtcm.drop_pcd_y);
+                AIR_PRINT("\t Drop Precedence Remap(Gre): %u\n", act.trtcm.drop_pcd_g);
+            }
+            else
+            {
+                AIR_PRINT("\t Drop Precedence Remap: %s\n", "Disable");
+            }
+
+            if(TRUE == act.trtcm.tcm_sel)
+            {
+                AIR_PRINT("\t trTCM Meter Index    : %u\n", act.trtcm.tcm_idx);
+            }
+            else
+            {
+                AIR_PRINT("\t trTCM User Defined   : %s\n", trtcm_usr[act.trtcm.usr_tcm]);
+            }
+        }
+        /* rate control */
+        if(TRUE == act.rate_en)
+        {
+            AIR_PRINT("\t Rate Control Index   : %u\n", act.rate_idx);
+        }
+
+        if(TRUE == act.attack_en)
+        {
+            AIR_PRINT("\t Attack Rate Control Index: %u\n", act.attack_idx);
+        }
+
+        if(TRUE == act.vlan_en)
+        {
+            AIR_PRINT("\t ACL VLAN Index       : %u\n", act.vlan_idx);
+        }
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclRmvAction(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T act_idx;
+
+    if(1 == argc)
+    {
+        /* acl del action <idx(0..127)> */
+        act_idx = _strtoul(argv[0], NULL, 0);
+        ret = air_acl_delAction(0, act_idx);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Delete ACL Action(%u): %s\n", act_idx, air_error_getString(ret));
+    }
+    else if(0 == argc)
+    {
+        /* acl clear action */
+        ret = air_acl_clearAction(0);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Clear ACL Action: %s\n", air_error_getString(ret));
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclTrtcm(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T argi = 0;
+    UI32_T tcm_idx;
+    AIR_ACL_TRTCM_T tcm;
+
+    memset(&tcm, 0, sizeof(AIR_ACL_TRTCM_T));
+    if(5 == argc)
+    {
+        /* acl set trtcm <idx(0..31)> <cir(4'hex)> <pir(4'hex)> <cbs(4'hex)> <pbs(4'hex)> */
+        tcm_idx = _strtoul(argv[argi++], NULL, 0);
+        tcm.cir = _strtoul(argv[argi++], NULL, 16);
+        tcm.pir = _strtoul(argv[argi++], NULL, 16);
+        tcm.cbs = _strtoul(argv[argi++], NULL, 16);
+        tcm.pbs = _strtoul(argv[argi++], NULL, 16);
+
+        ret = air_acl_setTrtcm(0, tcm_idx, tcm);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Set ACL trTCM(%u): %s\n", tcm_idx, air_error_getString(ret));
+    }
+    else if(1 == argc)
+    {
+        /* acl get trtcm <idx(1..31)> */
+        tcm_idx = _strtoul(argv[argi++], NULL, 0);
+        ret = air_acl_getTrtcm(0, tcm_idx, &tcm);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Get ACL trTCM(%u): %s\n", tcm_idx, air_error_getString(ret));
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK == ret)
+    {
+        AIR_PRINT("\t CIR: 0x%04X(unit:64Kbps)\n", tcm.cir);
+        AIR_PRINT("\t PIR: 0x%04X(unit:64Kbps)\n", tcm.pir);
+        AIR_PRINT("\t CBS: 0x%04X(unit:Byte)\n", tcm.cbs);
+        AIR_PRINT("\t PBS: 0x%04X(unit:Byte)\n", tcm.pbs);
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclTrtcmEn(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    BOOL_T state = FALSE;
+
+    if (1 == argc)
+    {
+        /* acl set trtcmEn <en(1:En,0:Dis)> */
+        state = _strtol(argv[0], NULL, 10);
+        ret = air_acl_setTrtcmEnable(0, state);
+        AIR_PRINT("Set trTCM State ");
+    }
+    else if (0 == argc)
+    {
+        /* acl get trtcmEn */
+        ret = air_acl_getTrtcmEnable(0, &state);
+        AIR_PRINT("Get trTCM State ");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if (ret == AIR_E_OK)
+    {
+        AIR_PRINT(": %s\n", (TRUE == state) ? "Enable" : "Disable");
+    }
+    else
+    {
+        AIR_PRINT("Fail!\n");
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclRmvTrtcm(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T tcm_idx;
+
+    if(1 == argc)
+    {
+        /* acl del trtcm <idx(1..31)> */
+        tcm_idx = _strtoul(argv[0], NULL, 0);
+        ret = air_acl_delTrtcm(0, tcm_idx);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Delete ACL TRTCM(%u): %s\n", tcm_idx, air_error_getString(ret));
+    }
+    else if(0 == argc)
+    {
+        /* acl clear trtcm */
+        ret = air_acl_clearTrtcm(0);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Clear ACL TRTCM: %s\n", air_error_getString(ret));
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclPortEn(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T argi=0;
+    UI32_T port = 0;
+    BOOL_T en;
+
+    if(2 == argc)
+    {
+        /* acl set portEn <port(0..6)> <en(1:En,0:Dis)> */
+        port = _strtoul(argv[argi++], NULL, 0);
+        en = _strtoul(argv[argi++], NULL, 2);
+        ret = air_acl_setPortEnable(0, port, en);
+        AIR_PRINT("Set Port:%u ACL function ", port);
+    }
+    else if(1 == argc)
+    {
+        /* acl get portEn <port(0..6)> */
+        port = _strtoul(argv[argi++], NULL, 0);
+        ret = air_acl_getPortEnable(0, port, &en);
+        AIR_PRINT("Get Port:%u ACL function ", port);
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        AIR_PRINT(": %s\n", (TRUE == en)?"Enable":"Disable");
+    }
+    else
+    {
+        AIR_PRINT("Fail!\n");
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclDropEn(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T argi=0;
+    UI32_T port = 0;
+    BOOL_T en;
+
+    if(2 == argc)
+    {
+        /* acl set dropEn <port(0..6)> <en(1:En,0:Dis)> */
+        port = _strtoul(argv[argi++], NULL, 0);
+        en = _strtoul(argv[argi++], NULL, 2);
+        ret = air_acl_setDropEnable(0, port, en);
+        AIR_PRINT("Set ACL Drop precedence ");
+    }
+    else if(1 == argc)
+    {
+        /* acl set dropEn <port(0..6)> */
+        port = _strtoul(argv[argi++], NULL, 0);
+        ret = air_acl_getDropEnable(0, port, &en);
+        AIR_PRINT("Get ACL Drop precedence ");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        AIR_PRINT("(Port %u):%s\n",
+                port,
+                (TRUE == en)?"Enable":"Disable");
+    }
+    else
+    {
+        AIR_PRINT("Fail!\n");
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclDropThrsh(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T argi=0;
+    UI32_T port = 0;
+    AIR_ACL_DP_COLOR_T color;
+    UI8_T queue;
+    UI32_T high, low;
+    C8_T dp_color[AIR_ACL_DP_COLOR_LAST][7] =
+    {
+        "Green",
+        "Yellow",
+        "Red"
+    };
+
+    if(5 == argc)
+    {
+        /* acl set dropThrsh <port(0..6)> <color(0:green,1:yellow,2:red)> <queue(0..7)> <high(0..2047)> <low(0..2047) */
+        port = _strtoul(argv[argi++], NULL, 0);
+        color = _strtoul(argv[argi++], NULL, 0);
+        queue = _strtoul(argv[argi++], NULL, 0);
+        high = _strtoul(argv[argi++], NULL, 0);
+        low = _strtoul(argv[argi++], NULL, 0);
+        ret = air_acl_setDropThreshold(0, port, color, queue, high, low);
+        AIR_PRINT("Set ACL Drop precedence ");
+    }
+    else if(3 == argc)
+    {
+        /* acl get dropThrsh <port(0..6)> <color(0:green,1:yellow,2:red)> <queue(0..7)> */
+        port = _strtoul(argv[argi++], NULL, 0);
+        color = _strtoul(argv[argi++], NULL, 0);
+        queue = _strtoul(argv[argi++], NULL, 0);
+        ret = air_acl_getDropThreshold(0, port, color, queue, &high, &low);
+        AIR_PRINT("Get ACL Drop precedence ");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        AIR_PRINT("(Port %u, color:%s, queue:%u):\n",
+                port,
+                dp_color[color],
+                queue);
+        AIR_PRINT("\tHigh Threshold :%u\n", high);
+        AIR_PRINT("\tLow Threshold  :%u\n", low);
+    }
+    else
+    {
+        AIR_PRINT("Fail!\n");
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclDropPbb(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T argi=0;
+    UI32_T port = 0;
+    AIR_ACL_DP_COLOR_T color;
+    UI8_T queue;
+    UI32_T pbb;
+    C8_T dp_color[AIR_ACL_DP_COLOR_LAST][7] =
+    {
+        "Green",
+        "Yellow",
+        "Red"
+    };
+
+    if(4 == argc)
+    {
+        /* acl set dropPbb <port(0..6)> <color(0:green,1:yellow,2:red)> <queue(0..7)> <probability(0..1023) */
+        port = _strtoul(argv[argi++], NULL, 0);
+        color = _strtoul(argv[argi++], NULL, 0);
+        queue = _strtoul(argv[argi++], NULL, 0);
+        pbb = _strtoul(argv[argi++], NULL, 0);
+        ret = air_acl_setDropProbability(0, port, color, queue, pbb);
+        AIR_PRINT("Set ACL Drop precedence ");
+    }
+    else if(3 == argc)
+    {
+        /* acl get dropPbb <port(0..6)> <color(0:green,1:yellow,2:red)> <queue(0..7)> */
+        port = _strtoul(argv[argi++], NULL, 0);
+        color = _strtoul(argv[argi++], NULL, 0);
+        queue = _strtoul(argv[argi++], NULL, 0);
+        ret = air_acl_getDropProbability(0, port, color, queue, &pbb);
+        AIR_PRINT("Get ACL Drop precedence ");
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(ret == AIR_E_OK)
+    {
+        AIR_PRINT("(Port %u, color:%s, queue %u):\n",
+                port,
+                dp_color[color],
+                queue);
+        AIR_PRINT("\tDrop probability:%u(unit=1/1023)\n", pbb);
+    }
+    else
+    {
+        AIR_PRINT("Fail!\n");
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclMeter(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T argi = 0;
+    UI32_T meter_idx, state, rate;
+
+    if(3 == argc)
+    {
+        /* acl set meter <idx(0..31)> <en(1:En,0:Dis)> <rate(0..65535)>
+           Note: Limit rate = rate * 64Kbps */
+        meter_idx = _strtoul(argv[argi++], NULL, 0);
+        state = _strtoul(argv[argi++], NULL, 2);
+        rate = _strtoul(argv[argi++], NULL, 0);
+
+        ret = air_acl_setMeterTable(0, meter_idx, state, rate);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Set ACL Meter(%u): %s\n", meter_idx, air_error_getString(ret));
+    }
+    else if(1 == argc)
+    {
+        /* acl get meter <idx(0..31)> */
+        meter_idx = _strtoul(argv[argi++], NULL, 0);
+        ret = air_acl_getMeterTable(0, meter_idx, &state, &rate);
+        if(ret < AIR_E_LAST)
+            AIR_PRINT("Get ACL Meter(%u): %s\n", meter_idx, air_error_getString(ret));
+    }
+    else
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK == ret)
+    {
+        AIR_PRINT("\t State: %s\n", (TRUE == state)?"Enable":"Disable");
+        if(TRUE == state)
+        {
+            AIR_PRINT("\t Rate : %u(unit:64Kbps)\n", rate);
+        }
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclDump(
+    UI32_T argc,
+    C8_T *argv[])
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T i, cnt = 0;
+    AIR_ACL_CTRL_T ctrl;
+
+    if(0 != argc)
+    {
+        AIR_PRINT("Unrecognized command.\n");
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    for(i=0; i<ACL_MAX_RULE_NUM; i++)
+    {
+        memset(&ctrl, 0, sizeof(AIR_ACL_CTRL_T));
+        ret = air_acl_getRuleCtrl(0, i, &ctrl);
+        if(AIR_E_OK == ret)
+        {
+            if(TRUE == ctrl.rule_en)
+            {
+                cnt++;
+                AIR_PRINT("\t Entry-%d vaild\n", i);
+            }
+        }
+    }
+    if(0 == cnt)
+    {
+        AIR_PRINT("\t No entry vaild\n");
+    }
+
+    return ret;
+}
+
+static AIR_ERROR_NO_T
+doAclSet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(aclSetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doAclGet(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(aclGetCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doAclDel(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(aclDelCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doAclClear(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(aclClearCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+doAcl(
+        UI32_T argc,
+        C8_T *argv[])
+{
+    return subcmd(aclCmds, argc, argv);
+}
+
+static AIR_ERROR_NO_T
+subcmd(
+        const AIR_CMD_T tab[],
+        UI32_T argc,
+        C8_T *argv[])
+{
+    const AIR_CMD_T *cmdp;
+    I32_T found = 0;
+    I32_T i, len;
+
+    if (argc < 1)
+    {
+        goto print_out_cmds;
+    }
+
+    for (cmdp = tab; cmdp->name != NULL; cmdp++)
+    {
+        if (strlen(argv[0]) == strlen(cmdp->name))
+        {
+            if (strncmp(argv[0], cmdp->name, strlen(argv[0])) == 0)
+            {
+                found = 1;
+                break;
+            }
+        }
+    }
+
+    if(!found)
+    {
+        C8_T buf[66];
+
+print_out_cmds:
+        AIR_PRINT("valid subcommands:\n");
+        memset(buf, ' ', sizeof(buf));
+        buf[64] = '\n';
+        buf[65] = '\0';
+
+        for (i=0, cmdp = tab; cmdp->name != NULL; cmdp++)
+        {
+            len = strlen(cmdp->name);
+            strncpy(&buf[i*16], cmdp->name, (len > 16) ? 16 : len);
+            if(3 == i)
+            {
+                AIR_PRINT("%s\n", buf);
+                memset(buf, ' ', sizeof(buf));
+                buf[64] = '\n';
+                buf[65] = '\0';
+            }
+            i = (i + 1) % 4;
+        }
+
+        if (0 != i)
+            AIR_PRINT("%s\n", buf);
+
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    if (CMD_NO_PARA == cmdp->argc_min)
+    {
+        if (argc != 1)
+        {
+            if (cmdp->argc_errmsg != NULL)
+            {
+                AIR_PRINT("Usage: %s\n", cmdp->argc_errmsg);
+            }
+
+            return AIR_E_BAD_PARAMETER;
+        }
+    }
+    else if (CMD_VARIABLE_PARA == cmdp->argc_min)
+    {
+        if (argc < 3)
+        {
+            if (cmdp->argc_errmsg != NULL)
+            {
+                AIR_PRINT("Usage: %s\n", cmdp->argc_errmsg);
+            }
+
+            return AIR_E_BAD_PARAMETER;
+        }
+    }
+    else
+    {
+        if ((argc <= cmdp->argc_min) || ((cmdp->argc_min != 0) && (argc != (cmdp->argc_min + 1))))
+        {
+            if (cmdp->argc_errmsg != NULL)
+            {
+                AIR_PRINT("Usage: %s\n", cmdp->argc_errmsg);
+            }
+
+            return AIR_E_BAD_PARAMETER;
+        }
+    }
+
+    if (cmdp->func)
+    {
+        argc--;
+        argv++;
+        return (*cmdp->func)(argc, argv);
+    }
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_parse_cmd
+ * PURPOSE:
+ *      This function is used process diagnostic cmd
+ * INPUT:
+ *      argc         -- parameter number
+ *      argv         -- parameter strings
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      NPS_E_OK     -- Successfully read the data.
+ *      NPS_E_OTHERS -- Failed to read the data.
+ * NOTES:
+ *
+ */
+AIR_ERROR_NO_T
+air_parse_cmd(
+        const UI32_T argc,
+        const C8_T **argv)
+{
+    return subcmd(Cmds, argc, (C8_T **)argv);
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_diag.c b/feed/app/switch/src/an8855_sdk/api/src/air_diag.c
new file mode 100644
index 0000000..2f89ddf
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_diag.c
@@ -0,0 +1,410 @@
+/* FILE NAME: air_diag.c
+ * PURPOSE:
+ *      Define the diagnostic function in AIR SDK.
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM BODIES
+*/
+
+/* EXPORTED SUBPROGRAM BODIES
+*/
+
+/* FUNCTION NAME: air_diag_setTxComplyMode
+ * PURPOSE:
+ *      Set Ethernet TX Compliance mode.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      mode            --  Testing mode of Ethernet TX Compliance
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ */
+AIR_ERROR_NO_T
+air_diag_setTxComplyMode(
+    const UI32_T unit,
+    const UI8_T port,
+    const AIR_DIAG_TXCOMPLY_MODE_T mode)
+{
+    UI32_T page = 0;
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((mode >= AIR_DIAG_TXCOMPLY_MODE_LAST), AIR_E_BAD_PARAMETER);
+
+    /* Backup page of CL22 */
+    aml_readPhyReg(unit, port, PHY_PAGE, &page);
+
+    switch(mode)
+    {
+        case AIR_DIAG_TXCOMPLY_MODE_10M_NLP:
+            /* PHY 00h = 0x0100 */
+            aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+            aml_writePhyReg(unit, port, PHY_MCR, MCR_MR_DUX);
+            /* PHY dev 1Eh reg 145h = 0x5010 */
+            u32dat = (FC_TDI_EN | FC_LITN_NO_COMP | FC_MDI_CO_MDI);
+            aml_writePhyRegCL45(unit, port, 0x1e, 0x0145, u32dat);
+            /* PHY dev 1Fh reg 17Bh = 0x1177 */
+            u32dat = (CR_RG_TX_CM_10M(1) | CR_RG_DELAY_TX_10M(1) \
+                    | CR_DA_TX_GAIN_10M_EEE(100) | CR_DA_TX_GAIN_10M(100));
+            aml_writePhyRegCL45(unit, port, 0x1f, 0x027b, u32dat);
+            break;
+        case AIR_DIAG_TXCOMPLY_MODE_10M_RANDOM:
+            /* PHY 00h = 0x0100 */
+            aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+            aml_writePhyReg(unit, port, PHY_MCR, MCR_MR_DUX);
+            /* PHY dev 1Eh reg 145h = 0x5010 */
+            u32dat = (FC_TDI_EN | FC_LITN_NO_COMP | FC_MDI_CO_MDI);
+            aml_writePhyRegCL45(unit, port, 0x1e, 0x0145, u32dat);
+            /* PHY dev 1Fh reg 27Bh = 0x1177 */
+            u32dat = (CR_RG_TX_CM_10M(1) | CR_RG_DELAY_TX_10M(1) \
+                    | CR_DA_TX_GAIN_10M_EEE(100) | CR_DA_TX_GAIN_10M(100));
+            aml_writePhyRegCL45(unit, port, 0x1f, 0x027b, u32dat);
+            /* PHY 11dh = 0xf842 */
+            aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_1);
+            u32dat = (EPG_EN | EPG_RUN | EPG_TX_DUR | EPG_PKT_LEN_10KB \
+                    | EPG_DES_ADDR(1) | EPG_PL_TYP_RANDOM);
+            aml_writePhyReg(unit, port, PHY_EPG, u32dat);
+            break;
+        case AIR_DIAG_TXCOMPLY_MODE_10M_SINE:
+            /* PHY 00h = 0x0100 */
+            aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+            aml_writePhyReg(unit, port, PHY_MCR, MCR_MR_DUX);
+            /* PHY dev 1Eh reg 145h = 0x5010 */
+            u32dat = (FC_TDI_EN | FC_LITN_NO_COMP | FC_MDI_CO_MDI);
+            aml_writePhyRegCL45(unit, port, 0x1e, 0x0145, u32dat);
+            /* PHY dev 1Fh reg 27Bh = 0x1177 */
+            u32dat = (CR_RG_TX_CM_10M(1) | CR_RG_DELAY_TX_10M(1) \
+                    | CR_DA_TX_GAIN_10M_EEE(100) | CR_DA_TX_GAIN_10M(100));
+            aml_writePhyRegCL45(unit, port, 0x1f, 0x027b, u32dat);
+            /* PHY dev 1Eh reg 1A3h = 0x0000 */
+            aml_writePhyRegCL45(unit, port, 0x1e, 0x01a3, 0x0000);
+            /* PHY dev 1Eh reg 1A4h = 0x0000 */
+            aml_writePhyRegCL45(unit, port, 0x1e, 0x01a4, 0x0000);
+            /* PHY 11dh = 0xf840 */
+            aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_1);
+            u32dat = (EPG_EN | EPG_RUN | EPG_TX_DUR \
+                    | EPG_PKT_LEN_10KB | EPG_DES_ADDR(1));
+            aml_writePhyReg(unit, port, PHY_EPG, u32dat);
+            break;
+        case AIR_DIAG_TXCOMPLY_MODE_100M_PAIR_A:
+            /* PHY 00h = 0x2100 */
+            aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+            u32dat = (MCR_MR_FC_SPD_INT_0 | MCR_MR_DUX);
+            aml_writePhyReg(unit, port, PHY_MCR, u32dat);
+            /* PHY dev 1Eh reg 145h = 0x5010 */
+            u32dat = (FC_TDI_EN | FC_LITN_NO_COMP | FC_MDI_CO_MDI);
+            aml_writePhyRegCL45(unit, port, 0x1e, 0x0145, u32dat);
+            break;
+        case AIR_DIAG_TXCOMPLY_MODE_100M_PAIR_B:
+            /* PHY 00h = 0x2100 */
+            aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+            u32dat = (MCR_MR_FC_SPD_INT_0 | MCR_MR_DUX);
+            aml_writePhyReg(unit, port, PHY_MCR, u32dat);
+            /* PHY dev 1Eh reg 145h = 0x5018 */
+            u32dat = (FC_TDI_EN | FC_LITN_NO_COMP | FC_MDI_CO_MDIX);
+            aml_writePhyRegCL45(unit, port, 0x1e, 0x0145, u32dat);
+            break;
+        case AIR_DIAG_TXCOMPLY_MODE_1000M_TM1:
+            /* PHY 09h = 0x2700 */
+            aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+            u32dat = (CR1G_TEST_TM1 | CR1G_PORT_TYPE \
+                    | CR1G_ADV_CAP1000_FDX | CR1G_ADV_CAP1000_HDX);
+            aml_writePhyReg(unit, port, PHY_CR1G, u32dat);
+            break;
+        case AIR_DIAG_TXCOMPLY_MODE_1000M_TM2:
+            aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+            /* PHY 09h = 0x4700 */
+            u32dat = (CR1G_TEST_TM2 | CR1G_PORT_TYPE \
+                    | CR1G_ADV_CAP1000_FDX | CR1G_ADV_CAP1000_HDX);
+            aml_writePhyReg(unit, port, PHY_CR1G, u32dat);
+            break;
+        case AIR_DIAG_TXCOMPLY_MODE_1000M_TM3:
+            aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+            /* PHY 09h = 0x6700 */
+            u32dat = (CR1G_TEST_TM3 | CR1G_PORT_TYPE \
+                    | CR1G_ADV_CAP1000_FDX | CR1G_ADV_CAP1000_HDX);
+            aml_writePhyReg(unit, port, PHY_CR1G, u32dat);
+            break;
+        case AIR_DIAG_TXCOMPLY_MODE_1000M_TM4:
+            aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+            /* PHY 09h = 0x8700 */
+            u32dat = (CR1G_TEST_TM4 | CR1G_PORT_TYPE \
+                    | CR1G_ADV_CAP1000_FDX | CR1G_ADV_CAP1000_HDX);
+            aml_writePhyReg(unit, port, PHY_CR1G, u32dat);
+            break;
+        default:
+            /* Unrecognized argument */
+            return AIR_E_BAD_PARAMETER;
+    }
+    /* Restore page of CL22 */
+    aml_writePhyReg(unit, port, PHY_PAGE, page);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_diag_getTxComplyMode
+ * PURPOSE:
+ *      Get Ethernet TX Compliance mode.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_mode        --  Testing mode of Ethernet TX Compliance
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_OTHERS
+ *
+ * NOTES:
+ */
+AIR_ERROR_NO_T
+air_diag_getTxComplyMode(
+    const UI32_T unit,
+    const UI8_T port,
+    AIR_DIAG_TXCOMPLY_MODE_T *ptr_mode)
+{
+    UI32_T page = 0;
+    UI32_T curReg[4] = {0};
+    UI32_T cmpReg[4] = {0};
+    BOOL_T hit = FALSE;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_mode);
+
+    /* Backup page of CL22 */
+    aml_readPhyReg(unit, port, PHY_PAGE, &page);
+
+    /* Test for AIR_DIAG_TXCOMPLY_MODE_1000M_TM1 */
+    if( FALSE == hit )
+    {
+        aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+        aml_readPhyReg(unit, port, PHY_CR1G, &curReg[0]);
+        cmpReg[0] = (CR1G_TEST_TM1 | CR1G_PORT_TYPE | CR1G_ADV_CAP1000_FDX | CR1G_ADV_CAP1000_HDX);
+
+        if( cmpReg[0] == curReg[0] )
+        {
+            (*ptr_mode) = AIR_DIAG_TXCOMPLY_MODE_1000M_TM1;
+            hit = TRUE;
+        }
+    }
+
+    /* Test for AIR_DIAG_TXCOMPLY_MODE_1000M_TM2 */
+    if( FALSE == hit )
+    {
+        aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+        aml_readPhyReg(unit, port, PHY_CR1G, &curReg[0]);
+        cmpReg[0] = (CR1G_TEST_TM2 | CR1G_PORT_TYPE | CR1G_ADV_CAP1000_FDX | CR1G_ADV_CAP1000_HDX);
+
+        if( cmpReg[0] == curReg[0] )
+        {
+            (*ptr_mode) = AIR_DIAG_TXCOMPLY_MODE_1000M_TM2;
+            hit = TRUE;
+        }
+    }
+
+    /* Test for AIR_DIAG_TXCOMPLY_MODE_1000M_TM3 */
+    if( FALSE == hit )
+    {
+        aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+        aml_readPhyReg(unit, port, PHY_CR1G, &curReg[0]);
+        cmpReg[0] = (CR1G_TEST_TM3 | CR1G_PORT_TYPE | CR1G_ADV_CAP1000_FDX | CR1G_ADV_CAP1000_HDX);
+
+        if( cmpReg[0] == curReg[0] )
+        {
+            (*ptr_mode) = AIR_DIAG_TXCOMPLY_MODE_1000M_TM3;
+            hit = TRUE;
+        }
+    }
+
+    /* Test for AIR_DIAG_TXCOMPLY_MODE_1000M_TM4 */
+    if( FALSE == hit )
+    {
+        aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+        aml_readPhyReg(unit, port, PHY_CR1G, &curReg[0]);
+        cmpReg[0] = (CR1G_TEST_TM4 | CR1G_PORT_TYPE | CR1G_ADV_CAP1000_FDX | CR1G_ADV_CAP1000_HDX);
+
+        if( cmpReg[0] == curReg[0] )
+        {
+            (*ptr_mode) = AIR_DIAG_TXCOMPLY_MODE_1000M_TM4;
+            hit = TRUE;
+        }
+    }
+
+    /* Test for AIR_DIAG_TXCOMPLY_MODE_100M_PAIR_A */
+    if( FALSE == hit )
+    {
+        aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+        aml_readPhyReg(unit, port, PHY_MCR, &curReg[0]);
+        cmpReg[0] = (MCR_MR_FC_SPD_INT_0 | MCR_MR_DUX);
+
+        aml_readPhyRegCL45(unit, port, 0x1e, 0x0145, &curReg[1]);
+        cmpReg[1] = (FC_TDI_EN | FC_LITN_NO_COMP | FC_MDI_CO_MDI);
+
+        if( (cmpReg[0] == curReg[0]) && (cmpReg[1] == curReg[1]) )
+        {
+            (*ptr_mode) = AIR_DIAG_TXCOMPLY_MODE_100M_PAIR_A;
+            hit = TRUE;
+        }
+    }
+
+    /* Test for AIR_DIAG_TXCOMPLY_MODE_100M_PAIR_B */
+    if( FALSE == hit )
+    {
+        aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+        aml_readPhyReg(unit, port, PHY_MCR, &curReg[0]);
+        cmpReg[0] = (MCR_MR_FC_SPD_INT_0 | MCR_MR_DUX);
+
+        aml_readPhyRegCL45(unit, port, 0x1e, 0x0145, &curReg[1]);
+        cmpReg[1] = (FC_TDI_EN | FC_LITN_NO_COMP | FC_MDI_CO_MDIX);
+
+        if( (cmpReg[0] == curReg[0]) && (cmpReg[1] == curReg[1]) )
+        {
+            (*ptr_mode) = AIR_DIAG_TXCOMPLY_MODE_100M_PAIR_B;
+            hit = TRUE;
+        }
+    }
+
+    /* Test for AIR_DIAG_TXCOMPLY_MODE_10M_SINE */
+    if( FALSE == hit )
+    {
+        aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+        aml_readPhyReg(unit, port, PHY_MCR, &curReg[0]);
+        cmpReg[0] = MCR_MR_DUX;
+
+        aml_readPhyRegCL45(unit, port, 0x1e, 0x0145, &curReg[1]);
+        cmpReg[1] = (FC_TDI_EN | FC_LITN_NO_COMP | FC_MDI_CO_MDI);
+
+        aml_readPhyRegCL45(unit, port, 0x1f, 0x027b, &curReg[2]);
+        cmpReg[2] = (CR_RG_TX_CM_10M(1) \
+                | CR_RG_DELAY_TX_10M(1) \
+                | CR_DA_TX_GAIN_10M_EEE(100) \
+                | CR_DA_TX_GAIN_10M(100));
+
+        aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_1);
+        aml_readPhyReg(unit, port, PHY_EPG, &curReg[3]);
+        cmpReg[3] = (EPG_EN \
+                | EPG_RUN \
+                | EPG_TX_DUR \
+                | EPG_PKT_LEN_10KB \
+                | EPG_DES_ADDR(1));
+
+        if( (cmpReg[0] == curReg[0])    \
+            && (cmpReg[1] == curReg[1]) \
+            && (cmpReg[2] == curReg[2]) \
+            && (cmpReg[3] == curReg[3]) )
+        {
+            (*ptr_mode) = AIR_DIAG_TXCOMPLY_MODE_10M_SINE;
+            hit = TRUE;
+        }
+    }
+
+    /* Test for AIR_DIAG_TXCOMPLY_MODE_10M_RANDOM */
+    if( FALSE == hit )
+    {
+        aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+        aml_readPhyReg(unit, port, PHY_MCR, &curReg[0]);
+        cmpReg[0] = MCR_MR_DUX;
+
+        aml_readPhyRegCL45(unit, port, 0x1e, 0x0145, &curReg[1]);
+        cmpReg[1] = (FC_TDI_EN | FC_LITN_NO_COMP | FC_MDI_CO_MDI);
+
+        aml_readPhyRegCL45(unit, port, 0x1f, 0x027b, &curReg[2]);
+        cmpReg[2] = (CR_RG_TX_CM_10M(1) \
+                | CR_RG_DELAY_TX_10M(1) \
+                | CR_DA_TX_GAIN_10M_EEE(100) \
+                | CR_DA_TX_GAIN_10M(100));
+
+        aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_1);
+        aml_readPhyReg(unit, port, PHY_EPG, &curReg[3]);
+        cmpReg[3] = (EPG_EN \
+                | EPG_RUN \
+                | EPG_TX_DUR \
+                | EPG_PKT_LEN_10KB \
+                | EPG_DES_ADDR(1) \
+                | EPG_PL_TYP_RANDOM);
+
+        if( (cmpReg[0] == curReg[0])    \
+            && (cmpReg[1] == curReg[1]) \
+            && (cmpReg[2] == curReg[2]) \
+            && (cmpReg[3] == curReg[3]) )
+        {
+            (*ptr_mode) = AIR_DIAG_TXCOMPLY_MODE_10M_RANDOM;
+            hit = TRUE;
+        }
+    }
+
+    /* Test for AIR_DIAG_TXCOMPLY_MODE_10M_NLP */
+    if( FALSE == hit )
+    {
+        aml_writePhyReg(unit, port, PHY_PAGE, PHY_PAGE_0);
+        aml_readPhyReg(unit, port, PHY_MCR, &curReg[0]);
+        cmpReg[0] = MCR_MR_DUX;
+
+        aml_readPhyRegCL45(unit, port, 0x1e, 0x0145, &curReg[1]);
+        cmpReg[1] = (FC_TDI_EN | FC_LITN_NO_COMP | FC_MDI_CO_MDI);
+
+        aml_readPhyRegCL45(unit, port, 0x1f, 0x027b, &curReg[2]);
+        cmpReg[2] = (CR_RG_TX_CM_10M(1) \
+                | CR_RG_DELAY_TX_10M(1) \
+                | CR_DA_TX_GAIN_10M_EEE(100) \
+                | CR_DA_TX_GAIN_10M(100));
+
+        if( (cmpReg[0] == curReg[0])    \
+            && (cmpReg[1] == curReg[1]) \
+            && (cmpReg[2] == curReg[2]) )
+        {
+            (*ptr_mode) = AIR_DIAG_TXCOMPLY_MODE_10M_NLP;
+            hit = TRUE;
+        }
+    }
+
+    /* Restore page of CL22 */
+    aml_writePhyReg(unit, port, PHY_PAGE, page);
+
+    if( TRUE == hit)
+    {
+        return AIR_E_OK;
+    }
+    else
+    {
+        return AIR_E_OTHERS;
+    }
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_error.c b/feed/app/switch/src/an8855_sdk/api/src/air_error.c
new file mode 100644
index 0000000..3323e54
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_error.c
@@ -0,0 +1,73 @@
+/* FILE NAME:   air_error.c
+ * PURPOSE:
+ *      Define the software modules in AIR SDK.
+ * NOTES:
+ */
+
+/* INCLUDE FILE DECLARATIONS
+ */
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+
+/* GLOBAL VARIABLE DECLARATIONS
+ */
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+ */
+
+/* STATIC VARIABLE DECLARATIONS
+ */
+static C8_T *_air_error_cause[AIR_E_LAST] =
+{
+    "OK",
+    "NOT_OK",
+    "BAD_PARAMETER",
+    "TABLE_FULL",
+    "ENTRY_NOT_FOUND",
+    "ENTRY_EXISTS",
+    "NOT_SUPPORT",
+    "TIMEOUT",
+};
+
+/* EXPORTED SUBPROGRAM BODIES
+ */
+
+/* LOCAL SUBPROGRAM BODIES
+ */
+/* FUNCTION NAME:   air_error_getString
+ * PURPOSE:
+ *      To obtain the error string of the specified error code
+ *
+ * INPUT:
+ *      The specified error code
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      Pointer to the target error string
+ *
+ * NOTES:
+ *
+ *
+ */
+C8_T *
+air_error_getString(
+const AIR_ERROR_NO_T cause )
+{
+    if(cause < AIR_E_LAST)
+    {
+        return _air_error_cause[cause];
+    }
+    else
+    {
+        return "";
+    }
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_init.c b/feed/app/switch/src/an8855_sdk/api/src/air_init.c
new file mode 100644
index 0000000..8a4f96f
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_init.c
@@ -0,0 +1,147 @@
+/* FILE NAME:   air_init.c
+ * PURPOSE:
+ *      Define the initialization function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+ */
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+
+/* GLOBAL VARIABLE DECLARATIONS
+ */
+AIR_PRINTF _ext_printf;
+AIR_UDELAY _ext_udelay;
+AIR_MALLOC _ext_malloc;
+AIR_FREE   _ext_free;
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+ */
+
+/* STATIC VARIABLE DECLARATIONS
+ */
+
+/* EXPORTED SUBPROGRAM BODIES
+ */
+
+/* LOCAL SUBPROGRAM BODIES
+ */
+
+/* FUNCTION NAME:   air_init
+ * PURPOSE:
+ *      This API is used to initialize the SDK.
+ *
+ * INPUT:
+ *      unit            --  The device unit
+ *      ptr_init_param  --  The sdk callback functions.
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_init(
+    const UI32_T unit,
+    AIR_INIT_PARAM_T *ptr_init_param)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T u32dat = 0;
+    UI8_T port = 0;
+    AIR_LED_ON_EVT_T on_evt;
+    AIR_LED_BLK_EVT_T blk_evt;
+
+    /* check point */
+    AIR_CHECK_PTR(ptr_init_param);
+
+    _ext_dev_access.read_callback = ptr_init_param->dev_access.read_callback;
+    _ext_dev_access.write_callback = ptr_init_param->dev_access.write_callback;
+    _ext_dev_access.phy_read_callback = ptr_init_param->dev_access.phy_read_callback;
+    _ext_dev_access.phy_write_callback = ptr_init_param->dev_access.phy_write_callback;
+    _ext_dev_access.phy_cl45_read_callback = ptr_init_param->dev_access.phy_cl45_read_callback;
+    _ext_dev_access.phy_cl45_write_callback = ptr_init_param->dev_access.phy_cl45_write_callback;
+    _ext_printf = ptr_init_param->printf;
+    _ext_udelay = ptr_init_param->udelay;
+    _ext_malloc = ptr_init_param->malloc;
+    _ext_free   = ptr_init_param->free;
+    
+    return rc;
+}
+
+/* FUNCTION NAME:   air_hw_reset
+ * PURPOSE:
+ *      This API is used to reset hardware.
+ *
+ * INPUT:
+ *      unit            --  The device unit
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_hw_reset(
+    const UI32_T unit)
+{
+    AIR_PRINT(">>>>> enct_hw_reset\n");
+    /* Set an8855 reset pin to 0 */
+
+    /* Delay 100ms */
+
+    /* Set an8855 reset pin to 1 */
+
+    /* Delay 600ms */
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_set_gpio_pin_mux
+ * PURPOSE:
+ *      This API is used to set gpio pin mux.
+ *
+ * INPUT:
+ *      unit            --  The device unit
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_set_gpio_pin_mux(
+    const UI32_T unit)
+{
+    AIR_PRINT(">>>>> enct_set_gpio_pin_mux\n");
+    /* Set GPIO_MODE0 */
+    /* Implementation for SLT HW */
+    aml_writeReg(unit, GPIO_MODE0, 0x11111111);
+
+    return AIR_E_OK;
+}
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_l2.c b/feed/app/switch/src/an8855_sdk/api/src/air_l2.c
new file mode 100644
index 0000000..f8da749
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_l2.c
@@ -0,0 +1,1368 @@
+/* FILE NAME: air_l2.c
+ * PURPOSE:
+ *      Define the layer 2 function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+ */
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+#define AIR_L2_DELAY_US             (1000)
+#define AIR_L2_WDOG_KICK_NUM        (1000)
+#define AIR_L2_FORWARD_VALUE        (0xFFFFFFFF)
+#define AIR_L2_AGING_MS_CONSTANT    (1024)
+#define AIR_L2_AGING_1000MS         (1000)
+
+typedef enum
+{
+    AIR_L2_EXEC_FWD_CTRL_DEFAULT =      0x0,
+    AIR_L2_EXEC_FWD_CTRL_CPU_EXCLUDE =  0x4,
+    AIR_L2_EXEC_FWD_CTRL_CPU_INCLUDE =  0x5,
+    AIR_L2_EXEC_FWD_CTRL_CPU_ONLY =     0x6,
+    AIR_L2_EXEC_FWD_CTRL_DROP =         0x7,
+    AIR_L2_EXEC_FWD_CTRL_LAST
+}AIR_L2_EXEC_FWD_CTRL_T;
+
+typedef enum
+{
+    AIR_L2_MAC_MAT_MAC,
+    AIR_L2_MAC_MAT_DYNAMIC_MAC,
+    AIR_L2_MAC_MAT_STATIC_MAC,
+    AIR_L2_MAC_MAT_MAC_BY_VID,
+    AIR_L2_MAC_MAT_MAC_BY_FID,
+    AIR_L2_MAC_MAT_MAC_BY_PORT,
+    AIR_L2_MAC_MAT_MAC_BY_LAST
+}AIR_L2_MAC_MAT_T;
+
+/* L2 MAC table multi-searching */
+typedef enum
+{
+    AIR_L2_MAC_MS_START,   /* Start search */
+    AIR_L2_MAC_MS_NEXT,    /* Next search */
+    AIR_L2_MAC_MS_LAST
+}AIR_L2_MAC_MS_T;
+
+typedef enum
+{
+    AIR_L2_MAC_TB_TY_MAC,
+    AIR_L2_MAC_TB_TY_DIP,
+    AIR_L2_MAC_TB_TY_DIP_SIP,
+    AIR_L2_MAC_TB_TY_LAST
+}AIR_L2_MAC_TB_TY_T;
+
+/*
+typedef enum
+{
+    AIR_MAC_MAT_MAC,
+    AIR_MAC_MAT_DYNAMIC_MAC,
+    AIR_MAC_MAT_STATIC_MAC,
+    AIR_MAC_MAT_MAC_BY_VID,
+    AIR_MAC_MAT_MAC_BY_FID,
+    AIR_MAC_MAT_MAC_BY_PORT,
+    AIR_MAC_MAT_MAC_BY_LAST
+}AIR_MAC_MAT_T;
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+#define AIR_L2_AGING_TIME(__cnt__, __unit__)   \
+        (((__cnt__) + 1) * ((__unit__) + 1) * AIR_L2_AGING_MS_CONSTANT / AIR_L2_AGING_1000MS)
+
+/* DATA TYPE DECLARATIONS
+ */
+
+/* GLOBAL VARIABLE DECLARATIONS
+ */
+static BOOL_T _search_end = FALSE;
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+ */
+static BOOL_T
+_cmpMac(
+    const UI8_T mac1[6],
+    const UI8_T mac2[6]);
+
+static AIR_ERROR_NO_T
+_searchMacEntry(
+    const UI32_T unit,
+    const AIR_L2_MAC_MS_T ms,
+    const AIR_L2_MAC_MAT_T multi_target,
+    UI32_T *ptr_addr,
+    UI32_T *ptr_bank);
+
+static AIR_ERROR_NO_T
+_checkL2Busy(
+    const UI32_T unit);
+
+static void
+_fill_MAC_ATA(
+    const UI32_T unit,
+    const AIR_MAC_ENTRY_T *ptr_mac_entry);
+
+static void
+_fill_MAC_ATWD(
+    const UI32_T            unit,
+    const AIR_MAC_ENTRY_T   *ptr_mac_entry,
+    const BOOL_T            valid);
+
+static UI32_T
+_checkL2EntryHit(
+    const UI32_T unit);
+
+static void
+_fill_MAC_ATRDS(
+    const UI32_T unit,
+    UI8_T bank);
+
+static AIR_ERROR_NO_T
+_read_MAC_ATRD(
+    const UI32_T unit,
+    AIR_MAC_ENTRY_T *ptr_mac_entry);
+
+/* FUNCTION NAME: _cmpMac
+ * PURPOSE:
+ *      Compare MAC address to check whether those MAC is same.
+ *
+ * INPUT:
+ *      mac1            --  1st MAC address
+ *      mac2            --  2nd MAC address
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      TRUE
+ *      FALSE
+ *
+ * NOTES:
+ *      None
+ */
+static BOOL_T
+_cmpMac(
+    const UI8_T mac1[6],
+    const UI8_T mac2[6])
+{
+    UI32_T i;
+    for(i=0; i<6; i++)
+    {
+        if(mac1[i] != mac2[i])
+        {
+            return FALSE;
+        }
+    }
+    return TRUE;
+}
+/* FUNCTION NAME: _searchMacEntry
+ * PURPOSE:
+ *      Search MAC Address table.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ms              --  _HAL_SCO_L2_MAC_MS_START:           Start search command
+ *                          _HAL_SCO_L2_MAC_MS_NEXT:            Next search command
+ *      multi_target    --  _HAL_SCO_L2_MAC_MAT_MAC:            MAC address entries
+ *                          _HAL_SCO_L2_MAC_MAT_DYNAMIC_MAC:    Dynamic MAC address entries
+ *                          _HAL_SCO_L2_MAC_MAT_STATIC_MAC:     Static MAC address entries
+ *                          _HAL_SCO_L2_MAC_MAT_MAC_BY_VID:     MAC address entries with specific CVID
+ *                          _HAL_SCO_L2_MAC_MAT_MAC_BY_FID:     MAC address entries with specific FID
+ *                          _HAL_SCO_L2_MAC_MAT_MAC_BY_PORT:    MAC address entries with specific port
+ * OUTPUT:
+ *      ptr_addr        --  MAC Table Access Index
+ *      ptr_bank        --  Searching result in which bank
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+static AIR_ERROR_NO_T
+_searchMacEntry(
+    const UI32_T unit,
+    const AIR_L2_MAC_MS_T ms,
+    const AIR_L2_MAC_MAT_T multi_target,
+    UI32_T *ptr_addr,
+    UI32_T *ptr_bank)
+{
+    UI32_T u32dat = 0;
+
+    u32dat = (ATC_SAT_MAC | ATC_START_BUSY);
+    if (AIR_L2_MAC_MS_START == ms)
+    {
+        /* Start search 1st valid entry */
+        u32dat |= ATC_CMD_SEARCH;
+    }
+    else if (AIR_L2_MAC_MS_NEXT == ms)
+    {
+        /* Search next valid entry */
+        u32dat |= ATC_CMD_SEARCH_NEXT;
+    }
+    else
+    {
+        /* Unknown commnad */
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    switch(multi_target)
+    {
+        case AIR_L2_MAC_MAT_MAC:
+            u32dat |= ATC_MAT_MAC;
+            break;
+        case AIR_L2_MAC_MAT_DYNAMIC_MAC:
+            u32dat |= ATC_MAT_DYNAMIC_MAC;
+            break;
+        case AIR_L2_MAC_MAT_STATIC_MAC:
+            u32dat |= ATC_MAT_STATIC_MAC;
+            break;
+        case AIR_L2_MAC_MAT_MAC_BY_VID:
+            u32dat |= ATC_MAT_MAC_BY_VID;
+            break;
+        case AIR_L2_MAC_MAT_MAC_BY_FID:
+            u32dat |= ATC_MAT_MAC_BY_FID;
+            break;
+        case AIR_L2_MAC_MAT_MAC_BY_PORT:
+            u32dat |= ATC_MAT_MAC_BY_PORT;
+            break;
+        default:
+            /* Unknown searching mode */
+            return AIR_E_BAD_PARAMETER;
+    }
+    aml_writeReg(unit, ATC, u32dat);
+    if (AIR_E_TIMEOUT == _checkL2Busy(unit))
+    {
+        return AIR_E_TIMEOUT;
+    }
+
+    aml_readReg(unit, ATC, &u32dat);
+    /* Get address */
+    (*ptr_addr) = BITS_OFF_R(u32dat, ATC_ADDR_OFFSET, ATC_ADDR_LENGTH);
+    /* Get banks */
+    (*ptr_bank) = BITS_OFF_R(u32dat, ATC_ENTRY_HIT_OFFSET, ATC_ENTRY_HIT_LENGTH);
+    if ((AIR_L2_MAX_SIZE - 1) == (*ptr_addr))
+    {
+        _search_end = TRUE;
+    }
+    else
+    {
+        _search_end = FALSE;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: _checkL2Busy
+ * PURPOSE:
+ *      Check BUSY bit of ATC
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+static AIR_ERROR_NO_T
+_checkL2Busy(
+    const UI32_T unit)
+{
+    UI32_T i = 0;
+    UI32_T reg_atc = 0;
+
+    /* Check BUSY bit is 0 */
+    for(i = 0; i < AIR_L2_MAX_BUSY_TIME; i++)
+    {
+        aml_readReg(unit, ATC, &reg_atc);
+        if(!BITS_OFF_R(reg_atc, ATC_BUSY_OFFSET, ATC_BUSY_LENGTH))
+        {
+            break;
+        }
+        AIR_UDELAY(AIR_L2_DELAY_US);
+    }
+    if(i >= AIR_L2_MAX_BUSY_TIME)
+    {
+        return AIR_E_TIMEOUT;
+    }
+    return AIR_E_OK;
+}
+/***************************************************************/
+/* FUNCTION NAME: _fill_MAC_ATA
+ * PURPOSE:
+ *      Fill register ATA for MAC Address table.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_mac_entry   --  Structure of MAC Address table
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      None
+ *
+ * NOTES:
+ *      None
+ */
+static void
+_fill_MAC_ATA(
+    const UI32_T unit,
+    const AIR_MAC_ENTRY_T *ptr_mac_entry)
+{
+    UI32_T u32dat = 0;
+    UI32_T i = 0;
+
+    /* Fill ATA1 */
+    for (i = 0; i < 4; i++)
+    {
+        u32dat |= ((UI32_T)(ptr_mac_entry->mac[i] & BITS(0,7))) << ( (3-i) * 8);
+    }
+    aml_writeReg(unit, ATA1, u32dat);
+    AIR_UDELAY(AIR_L2_DELAY_US);
+
+    /* Fill ATA2 */
+    u32dat=0;
+    for (i = 4; i < 6; i++)
+    {
+        u32dat |= ((UI32_T)(ptr_mac_entry->mac[i] & BITS(0,7))) << ( (7-i) * 8);
+    }
+    if (!(ptr_mac_entry->flags & AIR_L2_MAC_ENTRY_FLAGS_STATIC))
+    {
+        /* type is dynamic */
+        u32dat |= BITS_OFF_L(1UL, ATA2_MAC_LIFETIME_OFFSET, ATA2_MAC_LIFETIME_LENGTH);
+        /* set aging counter as system aging conuter */
+        u32dat |= BITS_OFF_L(ptr_mac_entry->timer, ATA2_MAC_AGETIME_OFFSET, ATA2_MAC_AGETIME_LENGTH);
+    }
+    if (ptr_mac_entry->flags & AIR_L2_MAC_ENTRY_FLAGS_UNAUTH)
+    {
+        u32dat |= BITS_OFF_L(1UL, ATA2_MAC_UNAUTH_OFFSET, ATA2_MAC_UNAUTH_LENGTH);
+    }
+
+    aml_writeReg(unit, ATA2, u32dat);
+    AIR_UDELAY(AIR_L2_DELAY_US);
+}
+
+/* FUNCTION NAME: _fill_MAC_ATWD
+ * PURPOSE:
+ *      Fill register ATWD for MAC Address table.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_mac_entry   --  Structure of MAC Address table
+ *      valid           --  TRUE
+ *                          FALSE
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      None
+ *
+ * NOTES:
+ *      None
+ */
+static void
+_fill_MAC_ATWD(
+    const UI32_T            unit,
+    const AIR_MAC_ENTRY_T   *ptr_mac_entry,
+    const BOOL_T            valid)
+{
+    UI32_T u32dat = 0;
+    UI32_T fwd_val = 0;
+
+    u32dat = 0;
+    /* Fill ATWD */
+    /* set valid bit */
+    if (TRUE == valid)
+    {
+        u32dat |= BITS_OFF_L(1UL, ATWD_MAC_LIVE_OFFSET, ATWD_MAC_LIVE_LENGTH);
+    }
+
+    /* set IVL */
+    if (ptr_mac_entry->flags & AIR_L2_MAC_ENTRY_FLAGS_IVL)
+    {
+        u32dat |= BITS_OFF_L(1UL, ATWD_MAC_IVL_OFFSET, ATWD_MAC_IVL_LENGTH);
+    }
+    /* set VID */
+    u32dat |= BITS_OFF_L(ptr_mac_entry->cvid, ATWD_MAC_VID_OFFSET, ATWD_MAC_VID_LENGTH);
+    /* set FID */
+    u32dat |= BITS_OFF_L(ptr_mac_entry->fid, ATWD_MAC_FID_OFFSET, ATWD_MAC_FID_LENGTH);
+
+    /* Set forwarding control */
+    switch (ptr_mac_entry->sa_fwd)
+    {
+        case AIR_L2_FWD_CTRL_DEFAULT:
+            fwd_val = AIR_L2_EXEC_FWD_CTRL_DEFAULT;
+            break;
+        case AIR_L2_FWD_CTRL_CPU_INCLUDE:
+            fwd_val = AIR_L2_EXEC_FWD_CTRL_CPU_INCLUDE;
+            break;
+        case AIR_L2_FWD_CTRL_CPU_EXCLUDE:
+            fwd_val = AIR_L2_EXEC_FWD_CTRL_CPU_EXCLUDE;
+            break;
+        case AIR_L2_FWD_CTRL_CPU_ONLY:
+            fwd_val = AIR_L2_EXEC_FWD_CTRL_CPU_ONLY;
+            break;
+        case AIR_L2_FWD_CTRL_DROP:
+            fwd_val = AIR_L2_EXEC_FWD_CTRL_DROP;
+            break;
+        default:
+            break;
+    }
+    u32dat |= BITS_OFF_L(fwd_val, ATWD_MAC_FWD_OFFSET, ATWD_MAC_FWD_LENGTH);
+    aml_writeReg(unit, ATWD, u32dat);
+    AIR_UDELAY(AIR_L2_DELAY_US);
+
+    /* Fill ATWD2 */
+    u32dat = BITS_OFF_L(ptr_mac_entry->port_bitmap[0], ATWD2_MAC_PORT_OFFSET, ATWD2_MAC_PORT_LENGTH);
+    aml_writeReg(unit, ATWD2, u32dat);
+    AIR_UDELAY(AIR_L2_DELAY_US);
+}
+
+/* FUNCTION NAME: _checkL2EntryHit
+ * PURPOSE:
+ *      Check entry hit of ATC
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      The entry hit bitmap
+ *
+ * NOTES:
+ *      None
+ */
+static UI32_T
+_checkL2EntryHit(
+    const UI32_T unit)
+{
+    UI32_T reg_atc = 0;
+    aml_readReg(unit, ATC, &reg_atc);
+    return BITS_OFF_R(reg_atc, ATC_ENTRY_HIT_OFFSET, ATC_ENTRY_HIT_LENGTH);
+}
+
+/* FUNCTION NAME: _fill_MAC_ATRDS
+ * PURPOSE:
+ *      Fill register ATRDS for select bank after ATC search L2 table.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      bank            --  Selected index of bank
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      None
+ *
+ * NOTES:
+ *      None
+ */
+static void
+_fill_MAC_ATRDS(
+    const UI32_T unit,
+    UI8_T bank)
+{
+    UI32_T u32dat = 0;
+
+    /* Fill ATRDS */
+    u32dat = BITS_OFF_L(bank, ATRD0_MAC_SEL_OFFSET, ATRD0_MAC_SEL_LENGTH);
+    aml_writeReg(unit, ATRDS, u32dat);
+    AIR_UDELAY(AIR_L2_DELAY_US);
+}
+
+/* FUNCTION NAME: _read_MAC_ATRD
+ * PURPOSE:
+ *      Read register ATRD for MAC Address table.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_mac_entry   --  Structure of MAC Address table
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_ENTRY_NOT_FOUND
+ *
+ * NOTES:
+ *      None
+ */
+static AIR_ERROR_NO_T
+_read_MAC_ATRD(
+    const UI32_T unit,
+    AIR_MAC_ENTRY_T *ptr_mac_entry)
+{
+    UI32_T u32dat = 0;
+    UI32_T i = 0;
+    BOOL_T live = FALSE;
+    UI32_T type = 0;
+    UI32_T age_unit = 0;
+    UI32_T age_cnt = 0;
+    UI32_T sa_fwd = 0;
+
+    /* Read ATRD0 */
+    aml_readReg(unit, ATRD0, &u32dat);
+    live = BITS_OFF_R(u32dat, ATRD0_MAC_LIVE_OFFSET, ATRD0_MAC_LIVE_LENGTH);
+    type = BITS_OFF_R(u32dat, ATRD0_MAC_TYPE_OFFSET, ATRD0_MAC_TYPE_LENGTH);
+    if (FALSE == live)
+    {
+        return AIR_E_ENTRY_NOT_FOUND;
+    }
+    if (AIR_L2_MAC_TB_TY_MAC != type)
+    {
+        return AIR_E_ENTRY_NOT_FOUND;
+    }
+    /* Clear table */
+    memset(ptr_mac_entry, 0, sizeof(AIR_MAC_ENTRY_T));
+
+    ptr_mac_entry->cvid = (UI16_T)BITS_OFF_R(u32dat, ATRD0_MAC_VID_OFFSET, ATRD0_MAC_VID_LENGTH);
+    ptr_mac_entry->fid = (UI16_T)BITS_OFF_R(u32dat, ATRD0_MAC_FID_OFFSET, ATRD0_MAC_FID_LENGTH);
+    if (!!BITS_OFF_R(u32dat, ATRD0_MAC_LIFETIME_OFFSET, ATRD0_MAC_LIFETIME_LENGTH))
+    {
+        ptr_mac_entry->flags |= AIR_L2_MAC_ENTRY_FLAGS_STATIC;
+    }
+    if (!!BITS_OFF_R(u32dat, ATRD0_MAC_IVL_OFFSET, ATRD0_MAC_IVL_LENGTH))
+    {
+        ptr_mac_entry->flags |= AIR_L2_MAC_ENTRY_FLAGS_IVL;
+    }
+    if (!!BITS_OFF_R(u32dat, ATRD1_MAC_UNAUTH_OFFSET, ATRD1_MAC_UNAUTH_LENGTH))
+    {
+        ptr_mac_entry->flags |= AIR_L2_MAC_ENTRY_FLAGS_UNAUTH;
+    }
+
+    /* Get the L2 MAC aging unit */
+    aml_readReg(unit, AAC, &u32dat);
+    age_unit = BITS_OFF_R(u32dat, AAC_AGE_UNIT_OFFSET, AAC_AGE_UNIT_LENGTH);
+
+    /* Read ATRD1 */
+    aml_readReg(unit, ATRD1, &u32dat);
+    for (i = 4; i < 6; i++)
+    {
+        ptr_mac_entry->mac[i] = BITS_OFF_R(u32dat, (7 - i)*8, 8);
+    }
+    /* Aging time */
+    age_cnt = BITS_OFF_R(u32dat, ATRD1_MAC_AGETIME_OFFSET, ATRD1_MAC_AGETIME_LENGTH);
+    ptr_mac_entry->timer = AIR_L2_AGING_TIME(age_cnt, age_unit);
+    /* SA forwarding */
+    sa_fwd = BITS_OFF_R(u32dat, ATRD1_MAC_FWD_OFFSET, ATRD1_MAC_FWD_LENGTH);
+    switch (sa_fwd)
+    {
+        case AIR_L2_EXEC_FWD_CTRL_DEFAULT:
+            ptr_mac_entry->sa_fwd = AIR_L2_FWD_CTRL_DEFAULT;
+            break;
+        case AIR_L2_EXEC_FWD_CTRL_CPU_INCLUDE:
+            ptr_mac_entry->sa_fwd = AIR_L2_FWD_CTRL_CPU_INCLUDE;
+            break;
+        case AIR_L2_EXEC_FWD_CTRL_CPU_EXCLUDE:
+            ptr_mac_entry->sa_fwd = AIR_L2_FWD_CTRL_CPU_EXCLUDE;
+            break;
+        case AIR_L2_EXEC_FWD_CTRL_CPU_ONLY:
+            ptr_mac_entry->sa_fwd = AIR_L2_FWD_CTRL_CPU_ONLY;
+            break;
+        case AIR_L2_EXEC_FWD_CTRL_DROP:
+            ptr_mac_entry->sa_fwd = AIR_L2_FWD_CTRL_DROP;
+            break;
+        default:
+            ptr_mac_entry->sa_fwd = AIR_L2_FWD_CTRL_DEFAULT;
+            break;
+    }
+
+    /* Read ATRD2 */
+    aml_readReg(unit, ATRD2, &u32dat);
+    for (i = 0; i < 4; i++)
+    {
+        ptr_mac_entry->mac[i] = BITS_OFF_R(u32dat, (3 - i)*8, 8);
+    }
+
+    /* Read ATRD3 */
+    aml_readReg(unit, ATRD3, &u32dat);
+    ptr_mac_entry->port_bitmap[0] = BITS_OFF_R(u32dat, ATRD3_MAC_PORT_OFFSET, ATRD3_MAC_PORT_LENGTH);
+
+    return AIR_E_OK;
+}
+
+static AIR_ERROR_NO_T _mac_entry_init(AIR_MAC_ENTRY_T   *ptr_mac_entry)
+{
+    AIR_CHECK_PTR(ptr_mac_entry);
+    memset(ptr_mac_entry->mac, 0, sizeof(ptr_mac_entry->mac));
+    ptr_mac_entry->cvid = 0;
+    ptr_mac_entry->fid = 0;
+    ptr_mac_entry->flags = 0;
+    ptr_mac_entry->port_bitmap[0] = 0;
+    ptr_mac_entry->sa_fwd = 0;
+    ptr_mac_entry->timer = 0;
+    return AIR_E_OK;
+}
+/* FUNCTION NAME: air_l2_addMacAddr
+ * PURPOSE:
+ *      Add or set a L2 unicast MAC address entry.
+ *      If the address entry doesn't exist, it will add the entry.
+ *      If the address entry already exists, it will set the entry
+ *      with user input value.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_mac_entry   --  Structure of MAC Address table
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TABLE_FULL
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_addMacAddr(
+    const UI32_T unit,
+    const AIR_MAC_ENTRY_T   *ptr_mac_entry)
+{
+    UI32_T u32dat = 0;
+    UI32_T reg_aac = 0;
+    AIR_MAC_ENTRY_T set_mac_entry;
+
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_mac_entry);
+    AIR_PARAM_CHK(((ptr_mac_entry->port_bitmap[0] & AIR_ALL_PORT_BITMAP) == 0), AIR_E_BAD_PARAMETER);
+    if (ptr_mac_entry->flags & AIR_L2_MAC_ENTRY_FLAGS_IVL)
+    {
+        AIR_PARAM_CHK(((ptr_mac_entry->cvid < 1) || (ptr_mac_entry->cvid > 4095)), AIR_E_BAD_PARAMETER);
+    }
+    else
+    {
+        AIR_PARAM_CHK(((ptr_mac_entry->fid > (AIR_STP_FID_NUMBER - 1))), AIR_E_BAD_PARAMETER);
+    }
+    _mac_entry_init(&set_mac_entry);
+    /* Set the target MAC entry as setting entry no mater the hash addrees is existed or not */
+    memcpy(&set_mac_entry, ptr_mac_entry, sizeof(AIR_MAC_ENTRY_T));
+    /* Translate port bitmap type */
+    /* set aging counter as system aging conuter */
+    aml_readReg(unit, AAC, &reg_aac);
+    set_mac_entry.timer = BITS_OFF_R(reg_aac, AAC_AGE_CNT_OFFSET, AAC_AGE_CNT_LENGTH);
+
+    /* Fill MAC address entry */
+    _fill_MAC_ATA(unit, &set_mac_entry);
+    _fill_MAC_ATWD(unit, &set_mac_entry, TRUE);
+
+    /* Write data by ATC */
+    u32dat = (ATC_SAT_MAC | ATC_CMD_WRITE | ATC_START_BUSY);
+    aml_writeReg(unit, ATC, u32dat);
+    if (AIR_E_TIMEOUT == _checkL2Busy(unit))
+    {
+        return AIR_E_TIMEOUT;
+    }
+    if ( !_checkL2EntryHit(unit))
+    {
+        return AIR_E_TABLE_FULL;
+    }
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_l2_delMacAddr
+ * PURPOSE:
+ *      Delete a L2 unicast MAC address entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_mac_entry   --  The structure of MAC Address table
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_delMacAddr(
+    const UI32_T unit,
+    const AIR_MAC_ENTRY_T   *ptr_mac_entry)
+{
+    UI32_T u32dat = 0;
+    AIR_MAC_ENTRY_T del_mac_entry;
+
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_mac_entry);
+    //AIR_PARAM_CHK(((ptr_mac_entry->port_bitmap[0] & AIR_ALL_PORT_BITMAP) == 0), AIR_E_BAD_PARAMETER);
+    if (ptr_mac_entry->flags & AIR_L2_MAC_ENTRY_FLAGS_IVL)
+    {
+        AIR_PARAM_CHK(((ptr_mac_entry->cvid < 1) || (ptr_mac_entry->cvid > 4095)), AIR_E_BAD_PARAMETER);
+    }
+    else
+    {
+        AIR_PARAM_CHK(((ptr_mac_entry->fid > (AIR_STP_FID_NUMBER - 1))), AIR_E_BAD_PARAMETER);
+    }
+    _mac_entry_init(&del_mac_entry);
+    memcpy(&del_mac_entry, ptr_mac_entry, sizeof(AIR_MAC_ENTRY_T));
+
+    /* Fill MAC address entry */
+    _fill_MAC_ATA(unit, &del_mac_entry);
+    _fill_MAC_ATWD(unit, &del_mac_entry, FALSE);
+
+    /* Write data by ATC to delete entry */
+    u32dat = (ATC_SAT_MAC | ATC_CMD_WRITE | ATC_START_BUSY);
+    aml_writeReg(unit, ATC, u32dat);
+    if (AIR_E_TIMEOUT == _checkL2Busy(unit))
+    {
+        return AIR_E_TIMEOUT;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_l2_getMacBucketSize
+ * PURPOSE:
+ *      Get the bucket size of one MAC address set when searching L2
+ *      table.
+ * INPUT:
+ *      unit                     -- Device ID
+ * OUTPUT:
+ *      ptr_size                 -- The bucket size
+ * RETURN:
+ *      AIR_E_OK                 -- Operation success.
+ *      AIR_E_BAD_PARAMETER      -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_getMacBucketSize(
+    const UI32_T    unit,
+    UI32_T          *ptr_size)
+{
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_size);
+
+    /* Access regiser */
+    (*ptr_size) = AIR_L2_MAC_SET_NUM;
+
+    return AIR_E_OK;
+}
+
+
+/* FUNCTION NAME:  air_l2_getMacAddr
+ * PURPOSE:
+ *      Get a L2 unicast MAC address entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_mac_entry   --  The structure of MAC Address table
+ *
+ * OUTPUT:
+ *      ptr_count                -- The number of returned MAC entries
+ *      ptr_mac_entry            -- Structure of MAC Address table for
+ *                                  searching result.
+ *                                  The size of ptr_mac_entry depends
+ *                                  on the maximun number of bank.
+ *                                  The memory size should greater than
+ *                                  ((# of Bank) * (Size of entry
+ *                                  structure))
+ *                                  AIR_MAC_ENTRY_T
+ * RETURN:
+ *      AIR_E_OK                 -- Operation success.
+ *      AIR_E_BAD_PARAMETER      -- Parameter is wrong.
+ *      AIR_E_TIMEOUT            -- Timeout error.
+ *      AIR_E_ENTRY_NOT_FOUND    -- Entry is not found.
+ * NOTES:
+ *      If the parameter:mac in input argument ptr_mac_entry[0] is
+ *      empty. It means to search the first valid MAC address entry
+ *      in MAC address table. Otherwise, to search the specific MAC
+ *      address entry in input argument ptr_mac_entry[0].
+ *      Input argument ptr_mac_entry[0] needs include mac, ivl and
+ *      (fid or cvid) depends on ivl.
+ *      If argument ivl is TRUE, cvid is necessary, or fid is.
+ */
+AIR_ERROR_NO_T
+air_l2_getMacAddr(
+    const UI32_T unit,
+    UI8_T           *ptr_count,
+    AIR_MAC_ENTRY_T *ptr_mac_entry)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T i = 0;
+    BOOL_T is_mac_empty = TRUE;
+    BOOL_T found_target = FALSE;
+    AIR_MAC_ENTRY_T mt_read;
+    UI32_T addr = 0;
+    UI32_T banks = 0;
+    AIR_L2_MAC_MAT_T mat = 0;
+
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_mac_entry);
+    //AIR_PARAM_CHK(((ptr_mac_entry->port_bitmap[0] & AIR_ALL_PORT_BITMAP) == 0), AIR_E_BAD_PARAMETER);
+    if (ptr_mac_entry->flags & AIR_L2_MAC_ENTRY_FLAGS_IVL)
+    {
+        AIR_PARAM_CHK(((ptr_mac_entry->cvid < 1) || (ptr_mac_entry->cvid > 4095)), AIR_E_BAD_PARAMETER);
+    }
+    else
+    {
+        AIR_PARAM_CHK(((ptr_mac_entry->fid > (AIR_STP_FID_NUMBER - 1))), AIR_E_BAD_PARAMETER);
+    }
+    _mac_entry_init(&mt_read);
+    /* Check MAC Address field of input data */
+    for (i = 0; i < 6; i++)
+    {
+        if (0 != ptr_mac_entry->mac[i])
+        {
+            is_mac_empty = FALSE;
+            break;
+        }
+    }
+
+    (*ptr_count) = 0;
+    if (FALSE == is_mac_empty)
+    {
+        /* MAC address isn't empty, means to search a specific MAC entry */
+        if (ptr_mac_entry->flags & AIR_L2_MAC_ENTRY_FLAGS_IVL)
+        {
+            mat = AIR_L2_MAC_MAT_MAC_BY_VID;
+        }
+        else
+        {
+            mat = AIR_L2_MAC_MAT_MAC_BY_FID;
+        }
+        _fill_MAC_ATA(unit, ptr_mac_entry);
+        _fill_MAC_ATWD(unit, ptr_mac_entry, TRUE);
+
+        rc = _searchMacEntry(unit, AIR_L2_MAC_MS_START, mat, &addr, &banks);
+
+        while(AIR_E_OK == rc)
+        {
+            AIR_PRINT("banks=(%d)\n", banks);
+            if (0 == banks)
+            {
+                return AIR_E_ENTRY_NOT_FOUND;
+            }
+            for (i = 0; i < AIR_L2_MAC_SET_NUM; i++)
+            {
+                if (!!BITS_OFF_R(banks, i, 1))
+                {
+                    /* Found a valid MAC entry */
+                    /* Select bank */
+                    _fill_MAC_ATRDS(unit, i);
+
+                    /* Read MAC entry */
+                    memset(&mt_read, 0, sizeof(AIR_MAC_ENTRY_T));
+                    rc = _read_MAC_ATRD(unit, &mt_read);
+                    if (AIR_E_OK != rc)
+                    {
+                        AIR_PRINT("rc=(%d)\n", rc);
+                        continue;
+                    }
+                    if (TRUE == _cmpMac(ptr_mac_entry->mac, mt_read.mac))
+                    {
+                        /* The found MAC is the target, restore data and leave */
+                        memcpy(ptr_mac_entry, &mt_read, sizeof(AIR_MAC_ENTRY_T));
+                        /* Translate port bitmap type */
+                        found_target = TRUE;
+                        (*ptr_count)++;
+                        break;
+                    }
+                }
+            }
+
+            if ( TRUE == found_target)
+            {
+                break;
+            }
+
+            /* The found MAC isn't the target, keep searching or leave
+             * when found the last entry */
+            if (TRUE == _search_end)
+            {
+                return AIR_E_ENTRY_NOT_FOUND;
+            }
+            else
+            {
+                rc = _searchMacEntry(unit, AIR_L2_MAC_MS_NEXT, mat, &addr, &banks);
+            }
+        }
+        return rc;
+    }
+    else
+    {
+        /* MAC address is empty, means to search the 1st MAC entry */
+        rc = _searchMacEntry(unit, AIR_L2_MAC_MS_START, AIR_L2_MAC_MAT_MAC, &addr, &banks);
+
+        switch(rc)
+        {
+            case AIR_E_OK:
+                /* Searching bank and read data */
+                AIR_PRINT("banks=(%d)\n", banks);
+                if (0 == banks)
+                {
+                    return AIR_E_ENTRY_NOT_FOUND;
+                }
+                for (i = 0; i < AIR_L2_MAC_SET_NUM; i++)
+                {
+                    if (!!BITS_OFF_R(banks, i, 1))
+                    {
+                        /* Found a valid MAC entry */
+                        /* Select bank */
+                        _fill_MAC_ATRDS(unit, i);
+
+                        /* Read MAC entry */
+                        memset(&mt_read, 0, sizeof(AIR_MAC_ENTRY_T));
+                        rc = _read_MAC_ATRD(unit, &mt_read);
+                        if (AIR_E_OK != rc)
+                        {
+                            AIR_PRINT("rc=(%d)\n", rc);
+                            continue;
+                        }
+                        memcpy(&ptr_mac_entry[(*ptr_count)], &mt_read, sizeof(AIR_MAC_ENTRY_T));
+                        /* Translate port bitmap type */
+                        (*ptr_count)++;
+                    }
+                }
+                return AIR_E_OK;
+            case AIR_E_TIMEOUT:
+                /* Searching over time */
+                return AIR_E_TIMEOUT;
+            default:
+                AIR_PRINT("rc=(%d)\n", rc);
+                return AIR_E_ENTRY_NOT_FOUND;
+        }
+    }
+}
+
+/* FUNCTION NAME: air_l2_getNextMacAddr
+ * PURPOSE:
+ *      Get the next L2 unicast MAC address entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_mac_entry   --  The structure of MAC Address table
+ *
+ * OUTPUT:
+ *      ptr_count       --  The number of returned MAC entries
+ *      ptr_mac_entry   --  Structure of MAC Address table for searching result.
+ *                          The size of ptr_mac_entry depends on the max. number of bank.
+ *                          The memory size should greater than ((# of Bank) * (Table size))
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *      AIR_E_ENTRY_NOT_FOUND
+ * NOTES:
+ *      If the parameter:mac in input argument ptr_mac_entry[0] is empty.
+ *      It means to search the next valid MAC address entries of last searching result.
+ *      Otherwise, to search the next valid MAC address entry of the specific MAC address
+ *      entry in input argument ptr_mac_entry[0].
+ *      Input argument ptr_mac_entry[0] needs include mac, ivl and (fid or cvid) depends on ivl.
+ *      If argument ivl is TRUE, cvid is necessary, or fid is.
+ */
+AIR_ERROR_NO_T
+air_l2_getNextMacAddr(
+    const UI32_T unit,
+    UI8_T           *ptr_count,
+    AIR_MAC_ENTRY_T *ptr_mac_entry)
+
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T i = 0;
+    BOOL_T is_mac_empty = TRUE;
+    BOOL_T found_target = FALSE;
+    AIR_MAC_ENTRY_T mt_read;
+    UI32_T addr = 0;
+    UI32_T banks = 0;
+
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_mac_entry);
+    //AIR_PARAM_CHK(((ptr_mac_entry->port_bitmap[0] & AIR_ALL_PORT_BITMAP) == 0), AIR_E_BAD_PARAMETER);
+    if (ptr_mac_entry->flags & AIR_L2_MAC_ENTRY_FLAGS_IVL)
+    {
+        AIR_PARAM_CHK(((ptr_mac_entry->cvid < 1) || (ptr_mac_entry->cvid > 4095)), AIR_E_BAD_PARAMETER);
+    }
+    else
+    {
+        AIR_PARAM_CHK(((ptr_mac_entry->fid > (AIR_STP_FID_NUMBER - 1))), AIR_E_BAD_PARAMETER);
+    }
+    _mac_entry_init(&mt_read);
+    /* If found the lastest entry last time, we couldn't keep to search the next entry */
+    if(TRUE == _search_end)
+    {
+        return AIR_E_ENTRY_NOT_FOUND;
+    }
+
+    /* Check MAC Address field of input data */
+    for (i = 0; i < 6; i++)
+    {
+        if (0 != ptr_mac_entry->mac[i])
+        {
+            is_mac_empty = FALSE;
+            break;
+        }
+    }
+    (*ptr_count)=0;
+
+    if (FALSE == is_mac_empty)
+    {
+        /* MAC address isn't empty, means to search the next entries of input MAC Address */
+        /* Search the target MAC entry */
+        _fill_MAC_ATA(unit, ptr_mac_entry);
+        rc = _searchMacEntry(unit, AIR_L2_MAC_MS_START, AIR_L2_MAC_MAT_MAC, &addr, &banks);
+        while(AIR_E_OK == rc)
+        {
+            AIR_PRINT("banks=(%d)\n", banks);
+            if (0 == banks)
+            {
+                return AIR_E_ENTRY_NOT_FOUND;
+            }
+            for (i = 0; i < AIR_L2_MAC_SET_NUM; i++)
+            {
+                if (!!BITS_OFF_R(banks, i, 1))
+                {
+                    /* Found a valid MAC entry */
+                    /* Select bank */
+                    _fill_MAC_ATRDS(unit, i);
+
+                    /* Read MAC entry */
+                    memset(&mt_read, 0, sizeof(AIR_MAC_ENTRY_T));
+                    rc = _read_MAC_ATRD(unit, &mt_read);
+                    if (AIR_E_OK != rc)
+                    {
+                        AIR_PRINT("rc=(%d)\n", rc);
+                        continue;
+                    }
+                    if (TRUE == _cmpMac(ptr_mac_entry->mac, mt_read.mac))
+                    {
+                        /* The found MAC is the target, restore data and leave */
+                        found_target = TRUE;
+                        break;
+                    }
+                }
+            }
+
+            if ( TRUE == found_target)
+            {
+                break;
+            }
+
+            /* The found MAC isn't the target, keep searching or leave
+             * when found the last entry */
+            if (TRUE == _search_end)
+            {
+                return AIR_E_ENTRY_NOT_FOUND;
+            }
+            else
+            {
+                rc = _searchMacEntry(unit, AIR_L2_MAC_MS_NEXT, AIR_L2_MAC_MAT_MAC, &addr, &banks);
+            }
+        }
+
+        if ( FALSE == found_target )
+        {
+            /* Entry not bank */
+            return AIR_E_ENTRY_NOT_FOUND;
+        }
+        else
+        {
+            /* Found the target MAC entry, and try to search the next address */
+            rc = _searchMacEntry(unit, AIR_L2_MAC_MS_NEXT, AIR_L2_MAC_MAT_MAC, &addr, &banks);
+            if (AIR_E_OK == rc)
+            {
+                AIR_PRINT("banks=(%d)\n", banks);
+                if (0 == banks)
+                {
+                    return AIR_E_ENTRY_NOT_FOUND;
+                }
+                for (i = 0; i < AIR_L2_MAC_SET_NUM; i++)
+                {
+                    if (!!BITS_OFF_R(banks, i, 1))
+                    {
+                        /* Found a valid MAC entry */
+                        /* Select bank */
+                        _fill_MAC_ATRDS(unit, i);
+
+                        /* Read MAC entry */
+                        memset(&mt_read, 0, sizeof(AIR_MAC_ENTRY_T));
+                        rc = _read_MAC_ATRD(unit, &mt_read);
+                        if (AIR_E_OK != rc)
+                        {
+                            AIR_PRINT("rc=(%d)\n", rc);
+                            continue;
+                        }
+                        memcpy(&ptr_mac_entry[(*ptr_count)], &mt_read, sizeof(AIR_MAC_ENTRY_T));
+                        /* Translate port bitmap type */
+                        (*ptr_count)++;
+                    }
+                }
+                return AIR_E_OK;
+            }
+            else
+            {
+                AIR_PRINT("rc=(%d)\n", rc);
+                return AIR_E_ENTRY_NOT_FOUND;
+            }
+        }
+    }
+    else
+    {
+        /* MAC address is empty, means to search next entry */
+        rc = _searchMacEntry(unit, AIR_L2_MAC_MS_NEXT, AIR_L2_MAC_MAT_MAC, &addr, &banks);
+        if (AIR_E_OK == rc)
+        {
+            AIR_PRINT("banks=(%d)\n", banks);
+            if (0 == banks)
+            {
+                return AIR_E_ENTRY_NOT_FOUND;
+            }
+            for (i = 0; i < AIR_L2_MAC_SET_NUM; i++)
+            {
+                if (!!BITS_OFF_R(banks, i, 1))
+                {
+                    /* Found a valid MAC entry */
+                    /* Select bank */
+                    _fill_MAC_ATRDS(unit, i);
+
+                    /* Read MAC entry */
+                    memset(&mt_read, 0, sizeof(AIR_MAC_ENTRY_T));
+                    rc = _read_MAC_ATRD(unit, &mt_read);
+                    if (AIR_E_OK != rc)
+                    {
+                        AIR_PRINT("rc=(%d)\n", rc);
+                        continue;
+                    }
+                    memcpy(&ptr_mac_entry[(*ptr_count)], &mt_read, sizeof(AIR_MAC_ENTRY_T));
+                    /* Translate port bitmap type */
+                    (*ptr_count)++;
+                }
+            }
+            return AIR_E_OK;
+        }
+        else
+        {
+            AIR_PRINT("rc=(%d)\n", rc);
+            return AIR_E_ENTRY_NOT_FOUND;
+        }
+    }
+}
+
+/* FUNCTION NAME: air_l2_clearMacAddr
+ * PURPOSE:
+ *      Clear all L2 unicast MAC address entry.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_clearMacAddr(
+    const UI32_T unit)
+{
+    UI32_T u32dat = 0;
+
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    /* Write data by ATC to clear all MAC address entries */
+    u32dat = (ATC_SAT_MAC | ATC_CMD_CLEAN | ATC_START_BUSY);
+    aml_writeReg(unit, ATC, u32dat);
+    if (AIR_E_TIMEOUT == _checkL2Busy(unit))
+    {
+        return AIR_E_TIMEOUT;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_l2_setMacAddrAgeOut
+ * PURPOSE:
+ *      Set the age out time of L2 MAC address entries.
+ * INPUT:
+ *      unit                     -- Device ID
+ *      age_time                 -- Age out time (second)
+ *                                  (1..AIR_L2_MAC_MAX_AGE_OUT_TIME)
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                 -- Operation success.
+ *      AIR_E_BAD_PARAMETER      -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+
+AIR_ERROR_NO_T
+air_l2_setMacAddrAgeOut(
+    const UI32_T    unit,
+    const UI32_T    age_time)
+{
+    
+    UI32_T u32dat = 0;
+    UI32_T age_cnt = 0, age_unit = 0, age_value = 0;
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((age_time > AIR_L2_MAC_MAX_AGE_OUT_TIME) || (age_time < 1)), AIR_E_BAD_PARAMETER);
+
+    /* Read the old register value */
+    aml_readReg(unit, AAC, &u32dat);
+
+    u32dat &= ~ BITS_RANGE(AAC_AGE_UNIT_OFFSET, AAC_AGE_UNIT_LENGTH);
+    u32dat &= ~ BITS_RANGE(AAC_AGE_CNT_OFFSET, AAC_AGE_CNT_LENGTH);
+
+    /* Calcuate the aging count/unit */
+    age_value = age_time * AIR_L2_AGING_1000MS / AIR_L2_AGING_MS_CONSTANT;
+    age_unit = (age_value / BIT(AAC_AGE_CNT_LENGTH) + 1);
+    age_cnt = (age_value / age_unit + 1);
+
+    /* Write the new register value */
+    u32dat |= BITS_OFF_L((age_unit - 1), AAC_AGE_UNIT_OFFSET, AAC_AGE_UNIT_LENGTH);
+    u32dat |= BITS_OFF_L((age_cnt - 1), AAC_AGE_CNT_OFFSET, AAC_AGE_CNT_LENGTH);
+
+    aml_writeReg(unit, AAC, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_l2_getMacAddrAgeOut
+ * PURPOSE:
+ *      Get the age out time of unicast MAC address.
+ * INPUT:
+ *      unit                     -- Device ID
+ * OUTPUT:
+ *      ptr_age_time             -- age out time
+ * RETURN:
+ *      AIR_E_OK                 -- Operation success.
+ *      AIR_E_BAD_PARAMETER      -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_getMacAddrAgeOut(
+    const UI32_T    unit,
+    UI32_T          *ptr_age_time)
+{
+    UI32_T u32dat = 0;
+    UI32_T age_cnt = 0, age_unit = 0;
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_age_time);
+
+    /* Read data from register */
+    aml_readReg(unit, AAC, &u32dat);
+
+    age_cnt = BITS_OFF_R(u32dat, AAC_AGE_CNT_OFFSET, AAC_AGE_CNT_LENGTH);
+    age_unit = BITS_OFF_R(u32dat, AAC_AGE_UNIT_OFFSET, AAC_AGE_UNIT_LENGTH);
+    (*ptr_age_time) = AIR_L2_AGING_TIME(age_cnt, age_unit);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_l2_setAgeEnable
+ * PURPOSE:
+ *      Set aging state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_setAgeEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != state) && (FALSE != state)), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, AGDIS, &u32dat);
+    if (state)
+    {
+        u32dat &= ~BIT(port);
+    }
+    else
+    {
+        u32dat |= BIT(port);
+    }
+    aml_writeReg(unit, AGDIS, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_l2_getAgeEnable
+ * PURPOSE:
+ *      Get age state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_l2_getAgeEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for state checking */
+    AIR_CHECK_PTR(ptr_state);
+
+    /* Read data from register */
+    aml_readReg(unit, AGDIS, &u32dat);
+
+    (*ptr_state) = (u32dat & BIT(port)) ? TRUE : FALSE;
+
+    return AIR_E_OK;
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_lag.c b/feed/app/switch/src/an8855_sdk/api/src/air_lag.c
new file mode 100644
index 0000000..d3f4e14
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_lag.c
@@ -0,0 +1,530 @@
+/* FILE NAME:  air_lag.c
+ * PURPOSE:
+ *      Define the Link Agrregation function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM BODIES
+*/
+
+/* EXPORTED SUBPROGRAM BODIES
+*/
+
+/* FUNCTION NAME: air_lag_setMember
+ * PURPOSE:
+ *      Set LAG member(s) for a specific LAG port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptg_index       --  Port trunk index
+ *      mem_index       --  Member index
+ *      mem_en          --  enable Member
+ *      port_index      --  Member port
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_setMember(
+    const UI32_T        unit,
+    const UI32_T        ptg_index,
+    const UI32_T        mem_index,
+    const UI32_T        mem_en,
+    const UI32_T        port_index)
+{
+    UI32_T val = 0;
+    UI32_T i = 0, offset = 0;
+    UI32_T reg = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((ptg_index >= AIR_LAG_MAX_PTG_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((mem_index > AIR_LAG_MAX_MEM_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((mem_en !=0 && mem_en !=1), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port_index > AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    offset = mem_index;
+    reg = (UI32_T)PTG(ptg_index);
+
+    AIR_PRINT("PTC REG:%x.\n", reg);
+
+    aml_readReg(unit,reg, &val);
+    AIR_PRINT("PTC REG val:%x.---1\n", val);
+    if(mem_en == 0)
+    {
+        val = val & ~(BIT(7 + 8*offset)); //port turnk group ptg_index; port port_index
+    }
+    else
+    {
+        val = val  | (BIT(7 + 8*offset)); //port turnk group ptg_index; port port_index
+    }
+    AIR_PRINT("PTC REG val:%x.----2\n", val);
+    val = val & ~( 0x1F << 8*offset);
+    val = val | AIR_GRP_PORT(port_index,offset); //port turnk group ptg_index; port port_index
+    AIR_PRINT("PTC REG val:%x. port %d----3\n", val,port_index);
+
+    aml_writeReg(unit, reg, val);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_lag_getMember
+ * PURPOSE:
+ *      Get LAG member count.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptg_index       --  Port trunk index
+ *
+ * OUTPUT:
+ *      member      --  Member ports of  one port trunk
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_getMember(
+    const UI32_T unit,
+    const UI32_T ptg_index,
+    AIR_LAG_PTGINFO_T * member)
+{
+    UI32_T val0 = 0, val1 = 0, i = 0, offset = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((ptg_index >= AIR_LAG_MAX_PTG_NUM), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(member);
+    aml_readReg(unit, (UI32_T)PTG(ptg_index), &val0);
+
+    for(i = 0; i < AIR_LAG_MAX_MEM_NUM; i++){
+        member->csr_gp_enable[i] = (UI32_T)BITS_OFF_R(val0, 7 + 8*i, 1);
+        member->csr_gp_port[i] = (UI32_T)BITS_OFF_R(val0, 8*i, 5);
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_lag_set_ptgc_state
+ * PURPOSE:
+ *     set port trunk group control state.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptgc_enable     --  enabble or disable port trunk function
+ *
+ * OUTPUT:
+ *      none
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_set_ptgc_state(
+    const UI32_T unit,
+    const BOOL_T ptgc_enable)
+{
+    /* Mistake proofing */
+    AIR_PARAM_CHK(((TRUE != ptgc_enable) && (FALSE != ptgc_enable)), AIR_E_BAD_PARAMETER);
+
+    aml_writeReg(unit, PTGC, ptgc_enable);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_lag_get_ptgc_state
+ * PURPOSE:
+ *      Get port trunk group control state.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_state        --  port trunk fucntion is enable or disable
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_get_ptgc_state(
+    const UI32_T unit,
+    UI32_T *ptr_state)
+{
+    UI32_T u32dat = 0;
+    
+    AIR_CHECK_PTR(ptr_state);
+    aml_readReg(unit, PTGC, &u32dat);
+    (*ptr_state) = BITS_OFF_R(u32dat, 0, 1);
+
+    return AIR_E_OK;
+}
+
+
+/* FUNCTION NAME: air_lag_setDstInfo
+ * PURPOSE:
+ *      Set information for the packet distribution.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      dstInfo         --  Infomation selection of packet distribution
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_setDstInfo(
+    const UI32_T unit,
+    const AIR_LAG_DISTINFO_T dstInfo)
+{
+    UI32_T val = 0;
+    aml_readReg(unit, (UI32_T)PTC, &val);
+
+    /* Set infomation control bit map */
+    val = val & ~ BITS(0,6);
+    if(dstInfo.sp)
+    {
+        val |= PTC_INFO_SEL_SP;
+    }
+    if(dstInfo.sa)
+    {
+        val |= PTC_INFO_SEL_SA;
+    }
+    if(dstInfo.da)
+    {
+        val |= PTC_INFO_SEL_DA;
+    }
+    if(dstInfo.sip)
+    {
+        val |= PTC_INFO_SEL_SIP;
+    }
+    if(dstInfo.dip)
+    {
+        val |= PTC_INFO_SEL_DIP;
+    }
+    if(dstInfo.sport)
+    {
+        val |= PTC_INFO_SEL_SPORT;
+    }
+    if(dstInfo.dport)
+    {
+        val |= PTC_INFO_SEL_DPORT;
+    }
+
+    /* Write register */
+    aml_writeReg(unit, (UI32_T)PTC, val);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_lag_getDstInfo
+ * PURPOSE:
+ *      Set port trunk hashtype.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_dstInfo     --  Infomation selection of packet distribution
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_TIMEOUT
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_getDstInfo(
+    const UI32_T unit,
+    AIR_LAG_DISTINFO_T *ptr_dstInfo)
+{
+    UI32_T val = 0;
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(ptr_dstInfo);
+
+    /* Get infomation control bit map */
+    aml_readReg(unit, (UI32_T)PTC, &val);
+    if(val & PTC_INFO_SEL_SP)
+    {
+        ptr_dstInfo ->sp = 1;
+    }
+    if(val & PTC_INFO_SEL_SA)
+    {
+        ptr_dstInfo ->sa = 1;
+    }
+    if(val & PTC_INFO_SEL_DA)
+    {
+        ptr_dstInfo ->da = 1;
+    }
+    if(val & PTC_INFO_SEL_SIP)
+    {
+        ptr_dstInfo ->sip = 1;
+    }
+    if(val & PTC_INFO_SEL_DIP)
+    {
+        ptr_dstInfo ->dip = 1;
+    }
+    if(val & PTC_INFO_SEL_SPORT)
+    {
+        ptr_dstInfo ->sport = 1;
+    }
+    if(val & PTC_INFO_SEL_DPORT)
+    {
+        ptr_dstInfo ->dport = 1;
+    }
+
+    return AIR_E_OK;
+}
+
+
+/* FUNCTION NAME: air_lag_setState
+ * PURPOSE:
+ *      Set the enable/disable for a specific LAG port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      hashtype        --  crc32msb/crc32lsb/crc16/xor4
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_sethashtype(
+    const UI32_T unit,
+    const UI32_T hashtype)
+{
+    UI32_T val = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((hashtype > 3), AIR_E_BAD_PARAMETER);
+
+    /* Read data from register */
+    aml_readReg(unit, (UI32_T)PTC, &val);
+    
+    val = val & ~ BITS(8,9);
+    val |= hashtype << 8;
+    
+    aml_writeReg(unit, (UI32_T)PTC, val);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_lag_getState
+ * PURPOSE:
+ *      Get port trunk hashtype.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      hashtype        --  crc32msb/crc32lsb/crc16/xor4
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_gethashtype(
+    const UI32_T unit,
+    UI32_T *hashtype)
+{
+    UI32_T val = 0;
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(hashtype);
+
+    /* Read data from register */
+    aml_readReg(unit, (UI32_T)PTC, &val);
+    (*hashtype) = BITS_OFF_R(val, 8, 9);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_lag_setSpSel
+ * PURPOSE:
+ *      Set the enable/disable for selection source port composition.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      enable          --  enable or disable source port compare
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_setSpSel(
+    const UI32_T unit,
+    const BOOL_T spsel_enable)
+{
+    UI32_T val = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK(((TRUE != spsel_enable) && (FALSE != spsel_enable)), AIR_E_BAD_PARAMETER);
+
+    /* Read data from register */
+    aml_readReg(unit, (UI32_T)PTC, &val);
+    val = val & ~ BIT(20);
+    val |= spsel_enable << 20;
+    aml_writeReg(unit, (UI32_T)PTC, val);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_lag_getSpSel
+ * PURPOSE:
+ *      Get selection source port composition.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_state       --  source port compare is enable or disable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_getSpSel(
+    const UI32_T unit,
+    UI32_T *ptr_state)
+{
+    UI32_T val = 0;
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(ptr_state);
+
+    /* Read data from register */
+    AIR_CHECK_PTR(ptr_state);
+    aml_readReg(unit, PTC, &val);
+    (*ptr_state) = val & BIT(20);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_lag_setPTSeed
+ * PURPOSE:
+ *      Set the enable/disable for a specific LAG port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptseed          --  port trunk rand seed
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_setPTSeed(
+    const UI32_T unit,
+    const UI32_T ptseed)
+{
+    aml_writeReg(unit, (UI32_T)PTSEED, ptseed);
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_lag_getPTSeed
+ * PURPOSE:
+ *      Get port trunk hashtype.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptseed          --  port trunk rand seed
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_lag_getPTSeed(
+    const UI32_T unit,
+    UI32_T *ptseed)
+{
+    UI32_T val = 0;
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(ptseed);
+
+    /* Read data from register */
+    aml_readReg(unit, (UI32_T)PTSEED, ptseed);
+
+    return AIR_E_OK;
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_led.c b/feed/app/switch/src/an8855_sdk/api/src/air_led.c
new file mode 100644
index 0000000..d89caa9
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_led.c
@@ -0,0 +1,528 @@
+/* FILE NAME: air_led.c
+ * PURPOSE:
+ *      Define the LED function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+#define LED_SET_EVT(evt, reg, bit)          \
+    do{                                     \
+        if( TRUE == evt)                    \
+        {                                   \
+            reg |= bit;                     \
+        }                                   \
+    }while(0)
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM BODIES
+*/
+
+/* EXPORTED SUBPROGRAM BODIES
+*/
+/* FUNCTION NAME: air_led_setMode
+ * PURPOSE:
+ *      Set the LED processing mode for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      mode            --  Setting mode of LED
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      The LED control register is shared with all port on AN8855.
+ *      Setting LED on any one port will also set to each other ports.
+ */
+AIR_ERROR_NO_T
+air_led_setMode(
+    const UI32_T unit,
+    const UI8_T port,
+    const AIR_LED_MODE_T mode)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK( ( port >= AIR_MAX_NUM_OF_GIGA_PORTS ), AIR_E_BAD_PARAMETER );
+    AIR_PARAM_CHK( ( mode >= AIR_LED_BLK_DUR_LAST ), AIR_E_BAD_PARAMETER );
+
+    /* Read data from register */
+    aml_readPhyRegCL45( unit, port, 0x1f, LED_BCR, &u32dat );
+
+    /* Set LED mode */
+    switch( mode )
+    {
+        case AIR_LED_MODE_DISABLE:
+            u32dat &= ~LED_BCR_EXT_CTRL;
+            u32dat &= ~LED_BCR_MODE_MASK;
+            u32dat |= LED_BCR_MODE_DISABLE;
+            break;
+        case AIR_LED_MODE_2LED_MODE0:
+            u32dat &= ~LED_BCR_EXT_CTRL;
+            u32dat &= ~LED_BCR_MODE_MASK;
+            u32dat |= LED_BCR_MODE_2LED;
+            break;
+        case AIR_LED_MODE_2LED_MODE1:
+            u32dat &= ~LED_BCR_EXT_CTRL;
+            u32dat &= ~LED_BCR_MODE_MASK;
+            u32dat |= LED_BCR_MODE_3LED_1;
+            break;
+        case AIR_LED_MODE_2LED_MODE2:
+            u32dat &= ~LED_BCR_EXT_CTRL;
+            u32dat &= ~LED_BCR_MODE_MASK;
+            u32dat |= LED_BCR_MODE_3LED_2;
+            break;
+        case AIR_LED_MODE_USER_DEFINE:
+            u32dat |= LED_BCR_EXT_CTRL;
+            break;
+    }
+
+    /* Write data to register */
+    aml_writePhyRegCL45( unit, port, 0x1f, LED_BCR, u32dat );
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:air_led_getMode
+ * PURPOSE:
+ *      Get the LED processing mode for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_mode        --  Setting mode of LED
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_led_getMode(
+    const UI32_T unit,
+    const UI8_T port,
+    AIR_LED_MODE_T *ptr_mode)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK( ( port >= AIR_MAX_NUM_OF_GIGA_PORTS ), AIR_E_BAD_PARAMETER );
+    AIR_CHECK_PTR( ptr_mode );
+
+    /* Read data from register */
+    aml_readPhyRegCL45( unit, port, 0x1f, LED_BCR, &u32dat );
+
+    /* Get LED mode */
+    if( LED_BCR_EXT_CTRL & u32dat )
+    {
+        (*ptr_mode ) = AIR_LED_MODE_USER_DEFINE;
+    }
+    else
+    {
+        switch( u32dat & LED_BCR_MODE_MASK )
+        {
+            case LED_BCR_MODE_DISABLE:
+                (*ptr_mode ) = AIR_LED_MODE_DISABLE;
+                break;
+            case LED_BCR_MODE_2LED:
+                (*ptr_mode ) = AIR_LED_MODE_2LED_MODE0;
+                break;
+            case LED_BCR_MODE_3LED_1:
+                (*ptr_mode ) = AIR_LED_MODE_2LED_MODE1;
+                break;
+            case LED_BCR_MODE_3LED_2:
+                (*ptr_mode ) = AIR_LED_MODE_2LED_MODE2;
+                break;
+            default:
+                return AIR_E_OTHERS;
+        }
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_led_setState
+ * PURPOSE:
+ *      Set the enable state for a specific LED.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      entity          --  Entity of LED
+ *      state           --  TRUE: Enable
+ *                          FALSE: Disable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      The LED control register is shared with all port on AN8855.
+ *      Setting LED on any one port will also set to each other ports.
+ */
+AIR_ERROR_NO_T
+air_led_setState(
+    const UI32_T unit,
+    const UI8_T port,
+    const UI8_T entity,
+    const BOOL_T state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK( ( port >= AIR_MAX_NUM_OF_GIGA_PORTS ), AIR_E_BAD_PARAMETER );
+    AIR_PARAM_CHK( ( entity >= MAX_NUM_LED_ENTITY ), AIR_E_BAD_PARAMETER );
+    AIR_PARAM_CHK( ( ( TRUE != state ) && ( FALSE != state ) ), AIR_E_BAD_PARAMETER );
+
+    /* Read data from register */
+    aml_readPhyRegCL45( unit, port, 0x1f, LED_ON_CTRL(entity), &u32dat );
+
+    /* Set LED state */
+    if( TRUE == state)
+    {
+        u32dat |= LED_ON_EN;
+    }
+    else
+    {
+        u32dat &= ~LED_ON_EN;
+    }
+
+    /* Write data to register */
+    aml_writePhyRegCL45( unit, port, 0x1f, LED_ON_CTRL(entity), u32dat );
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_led_getState
+ * PURPOSE:
+ *      Get the enable state for a specific LED.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      entity          --  Entity of LED
+ *
+ * OUTPUT:
+ *      ptr_state       --  TRUE: Enable
+ *                          FALSE: Disable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_led_getState(
+    const UI32_T unit,
+    const UI8_T port,
+    const UI8_T entity,
+    BOOL_T *ptr_state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK( ( port >= AIR_MAX_NUM_OF_GIGA_PORTS ), AIR_E_BAD_PARAMETER );
+    AIR_PARAM_CHK( ( entity >= MAX_NUM_LED_ENTITY ), AIR_E_BAD_PARAMETER );
+    AIR_CHECK_PTR( ptr_state );
+
+    /* Read data from register */
+    aml_readPhyRegCL45( unit, port, 0x1f, LED_ON_CTRL(entity), &u32dat );
+
+    /* Get LED state */
+    (*ptr_state) = ( LED_ON_EN & u32dat )?TRUE:FALSE;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_led_setUsrDef
+ * PURPOSE:
+ *      Set the user-defined configuration of a speficic LED.
+ *      It only work when air_led_setState() set to AIR_LED_MODE_USER_DEFINE.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      entity          --  Entity of LED
+ *      polar           --  LOW: Active low
+ *                          HIGH: Active high
+ *      on_evt          --  AIR_LED_ON_EVT_T
+ *                          LED turns on if any event is detected
+ *      blk_evt         --  AIR_LED_BLK_EVT_T
+ *                          LED blinks blink if any event is detected
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      The LED control register is shared with all port on AN8855.
+ *      Setting LED on any one port will also set to each other ports.
+ */
+AIR_ERROR_NO_T
+air_led_setUsrDef(
+    const UI32_T unit,
+    const UI8_T port,
+    const UI8_T entity,
+    const BOOL_T polar,
+    const AIR_LED_ON_EVT_T on_evt,
+    const AIR_LED_BLK_EVT_T blk_evt)
+{
+    UI32_T on_reg = 0;
+    UI32_T blk_reg = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK( ( port >= AIR_MAX_NUM_OF_GIGA_PORTS ), AIR_E_BAD_PARAMETER );
+    AIR_PARAM_CHK( ( entity >= MAX_NUM_LED_ENTITY ), AIR_E_BAD_PARAMETER );
+    AIR_PARAM_CHK( ( ( HIGH != polar ) && ( LOW != polar ) ), AIR_E_BAD_PARAMETER );
+
+    /* Read data from register */
+    aml_readPhyRegCL45( unit, port, 0x1f, LED_ON_CTRL(entity), &on_reg );
+    aml_readPhyRegCL45( unit, port, 0x1f, LED_BLK_CTRL(entity), &blk_reg );
+
+    /* Set LED polarity */
+    if( HIGH == polar)
+    {
+        on_reg |= LED_ON_POL;
+    }
+    else
+    {
+        on_reg &= ~LED_ON_POL;
+    }
+
+    /* Set LED On Event */
+    on_reg &= ~LED_ON_EVT_MASK;
+    LED_SET_EVT(on_evt.link_1000m, on_reg, LED_ON_EVT_LINK_1000M);
+    LED_SET_EVT(on_evt.link_100m, on_reg, LED_ON_EVT_LINK_100M);
+    LED_SET_EVT(on_evt.link_10m, on_reg, LED_ON_EVT_LINK_10M);
+    LED_SET_EVT(on_evt.link_dn, on_reg, LED_ON_EVT_LINK_DN);
+    LED_SET_EVT(on_evt.fdx, on_reg, LED_ON_EVT_FDX);
+    LED_SET_EVT(on_evt.hdx, on_reg, LED_ON_EVT_HDX);
+    LED_SET_EVT(on_evt.force, on_reg, LED_ON_EVT_FORCE);
+
+    /* Set LED Blinking Event */
+    blk_reg &= ~LED_BLK_EVT_MASK;
+    LED_SET_EVT(blk_evt.tx_act_1000m, blk_reg, LED_BLK_EVT_1000M_TX_ACT);
+    LED_SET_EVT(blk_evt.rx_act_1000m, blk_reg, LED_BLK_EVT_1000M_RX_ACT);
+    LED_SET_EVT(blk_evt.tx_act_100m, blk_reg, LED_BLK_EVT_100M_TX_ACT);
+    LED_SET_EVT(blk_evt.rx_act_100m, blk_reg, LED_BLK_EVT_100M_RX_ACT);
+    LED_SET_EVT(blk_evt.tx_act_10m, blk_reg, LED_BLK_EVT_10M_TX_ACT);
+    LED_SET_EVT(blk_evt.rx_act_10m, blk_reg, LED_BLK_EVT_10M_RX_ACT);
+    LED_SET_EVT(blk_evt.cls, blk_reg, LED_BLK_EVT_CLS);
+    LED_SET_EVT(blk_evt.rx_crc, blk_reg, LED_BLK_EVT_RX_CRC);
+    LED_SET_EVT(blk_evt.rx_idle, blk_reg, LED_BLK_EVT_RX_IDL);
+    LED_SET_EVT(blk_evt.force, blk_reg, LED_BLK_EVT_FORCE);
+
+    /* Write data to register */
+    aml_writePhyRegCL45( unit, port, 0x1f, LED_ON_CTRL(entity), on_reg );
+    aml_writePhyRegCL45( unit, port, 0x1f, LED_BLK_CTRL(entity), blk_reg );
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_led_getUsrDef
+ * PURPOSE:
+ *      Get the user-defined configuration of a speficic LED.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      entity          --  Entity of LED
+ * OUTPUT:
+ *      ptr_polar       --  LOW: Active low
+ *                          HIGH: Active high
+ *      ptr_on_evt      --  AIR_LED_ON_EVT_T
+ *                          LED turns on if any event is detected
+ *      ptr_blk_evt     --  AIR_LED_BLK_EVT_T
+ *                          LED blinks if any event is detected
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_led_getUsrDef(
+    const UI32_T unit,
+    const UI8_T port,
+    const UI8_T entity,
+    BOOL_T *ptr_polar,
+    AIR_LED_ON_EVT_T *ptr_on_evt,
+    AIR_LED_BLK_EVT_T *ptr_blk_evt)
+{
+    UI32_T on_reg = 0;
+    UI32_T blk_reg = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK( ( port >= AIR_MAX_NUM_OF_GIGA_PORTS ), AIR_E_BAD_PARAMETER );
+    AIR_PARAM_CHK( ( entity >= MAX_NUM_LED_ENTITY ), AIR_E_BAD_PARAMETER );
+    AIR_CHECK_PTR( ptr_polar );
+    AIR_CHECK_PTR( ptr_on_evt );
+    AIR_CHECK_PTR( ptr_blk_evt );
+
+    /* Read data from register */
+    aml_readPhyRegCL45( unit, port, 0x1f, LED_ON_CTRL(entity), &on_reg );
+    aml_readPhyRegCL45( unit, port, 0x1f, LED_BLK_CTRL(entity), &blk_reg );
+
+    /* Get LED polarity */
+    (*ptr_polar) = ( on_reg & LED_ON_POL)?TRUE:FALSE;
+
+    /* Get LED On Event */
+    ptr_on_evt ->link_1000m = (on_reg & LED_ON_EVT_LINK_1000M)?TRUE:FALSE;
+    ptr_on_evt ->link_100m = (on_reg & LED_ON_EVT_LINK_100M)?TRUE:FALSE;
+    ptr_on_evt ->link_10m = (on_reg & LED_ON_EVT_LINK_10M)?TRUE:FALSE;
+    ptr_on_evt ->link_dn = (on_reg & LED_ON_EVT_LINK_DN)?TRUE:FALSE;
+    ptr_on_evt ->fdx = (on_reg & LED_ON_EVT_FDX)?TRUE:FALSE;
+    ptr_on_evt ->hdx = (on_reg & LED_ON_EVT_HDX)?TRUE:FALSE;
+    ptr_on_evt ->force = (on_reg & LED_ON_EVT_FORCE)?TRUE:FALSE;
+
+    /* Set LED Blinking Event */
+    ptr_blk_evt ->tx_act_1000m = (blk_reg & LED_BLK_EVT_1000M_TX_ACT)?TRUE:FALSE;
+    ptr_blk_evt ->rx_act_1000m = (blk_reg & LED_BLK_EVT_1000M_RX_ACT)?TRUE:FALSE;
+    ptr_blk_evt ->tx_act_100m = (blk_reg & LED_BLK_EVT_100M_TX_ACT)?TRUE:FALSE;
+    ptr_blk_evt ->rx_act_100m = (blk_reg & LED_BLK_EVT_100M_RX_ACT)?TRUE:FALSE;
+    ptr_blk_evt ->tx_act_10m = (blk_reg & LED_BLK_EVT_10M_TX_ACT)?TRUE:FALSE;
+    ptr_blk_evt ->rx_act_10m = (blk_reg & LED_BLK_EVT_10M_RX_ACT)?TRUE:FALSE;
+    ptr_blk_evt ->cls = (blk_reg & LED_BLK_EVT_CLS)?TRUE:FALSE;
+    ptr_blk_evt ->rx_crc = (blk_reg & LED_BLK_EVT_RX_CRC)?TRUE:FALSE;
+    ptr_blk_evt ->rx_idle = (blk_reg & LED_BLK_EVT_RX_IDL)?TRUE:FALSE;
+    ptr_blk_evt ->force = (blk_reg & LED_BLK_EVT_FORCE)?TRUE:FALSE;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_led_setBlkTime
+ * PURPOSE:
+ *      Set the Blinking duration of a speficic LED.
+ *      It only work when air_led_setState() set to AIR_LED_MODE_USER_DEFINE.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      dur             --  Blink duration
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      The LED control register is shared with all port on AN8855.
+ *      Setting LED on any one port will also set to each other ports.
+ */
+AIR_ERROR_NO_T
+air_led_setBlkTime(
+    const UI32_T unit,
+    const UI8_T port,
+    const AIR_LED_BLK_DUR_T dur)
+{
+    UI32_T on_dur = 0;
+    UI32_T blk_dur = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK( ( port >= AIR_MAX_NUM_OF_GIGA_PORTS ), AIR_E_BAD_PARAMETER );
+    AIR_PARAM_CHK( ( dur >= AIR_LED_BLK_DUR_LAST ), AIR_E_BAD_PARAMETER );
+
+    /* Read data from register */
+    aml_readPhyRegCL45( unit, port, 0x1f, LED_ON_DUR, &on_dur );
+    aml_readPhyRegCL45( unit, port, 0x1f, LED_BLK_DUR, &blk_dur );
+
+    /* Set LED Blinking duration */
+    /* Setting unit = 32ms, register unit = 32.768 us */
+    blk_dur = UNIT_LED_BLINK_DURATION << dur;
+    /* On duration should be half of blinking duration */
+    on_dur  = blk_dur >> 1;
+
+    /* Write data to register */
+    aml_writePhyRegCL45( unit, port, 0x1f, LED_ON_DUR, on_dur );
+    aml_writePhyRegCL45( unit, port, 0x1f, LED_BLK_DUR, blk_dur );
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_led_getBlkTime
+ * PURPOSE:
+ *      Get the Blinking duration of a speficic LED.
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_dur         --  Blink duration
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_led_getBlkTime(
+    const UI32_T unit,
+    const UI8_T port,
+    AIR_LED_BLK_DUR_T *ptr_dur)
+{
+    UI32_T blk_dur = 0;
+    UI32_T u32dat = 0;
+    I8_T i = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK( ( port >= AIR_MAX_NUM_OF_GIGA_PORTS ), AIR_E_BAD_PARAMETER );
+    AIR_CHECK_PTR( ptr_dur );
+
+    /* Read data from register */
+    aml_readPhyRegCL45( unit, port, 0x1f, LED_BLK_DUR, &blk_dur );
+
+    /* Get LED Blinking duration */
+    u32dat = blk_dur / UNIT_LED_BLINK_DURATION;
+    for(i = AIR_LED_BLK_DUR_LAST; i>=0; i--)
+    {
+        if( (u32dat >> i) & 0x1 )
+        {
+            break;
+        }
+    }
+    (*ptr_dur) = i;
+
+    return AIR_E_OK;
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_mib.c b/feed/app/switch/src/an8855_sdk/api/src/air_mib.c
new file mode 100644
index 0000000..67088d1
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_mib.c
@@ -0,0 +1,366 @@
+/* FILE NAME: air_mib.c
+ * PURPOSE:
+ *      Define the MIB counter function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+#define MIB_READ_DATA(unit, port, mib, reg, val)    \
+    do{                                             \
+        aml_readReg(unit, MIB_##reg(port), &val );  \
+        mib -> reg = val;                           \
+    }while(0)
+
+
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM BODIES
+*/
+
+/* EXPORTED SUBPROGRAM BODIES
+*/
+/* FUNCTION NAME: air_mib_setEnable
+ * PURPOSE:
+ *      Enable or Disable mib count fucntion.
+ *
+ * INPUT:
+ *      unit           --   Device ID
+ *      mib_en         --   enable or disable mib_en
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_setEnable(
+    const UI32_T unit,
+    const BOOL_T mib_en)
+{
+    UI32_T u32dat = 0;
+    AIR_PARAM_CHK(((TRUE != mib_en) && (FALSE != mib_en)), AIR_E_BAD_PARAMETER);
+
+    /* Write data to register */
+    aml_readReg(unit, MIB_CCR, &u32dat);
+    if(mib_en)
+    {
+        u32dat |= MIB_CCR_MIB_ENABLE;
+    }
+    else
+    {
+        u32dat &= ~MIB_CCR_MIB_ENABLE;
+    }
+    aml_writeReg(unit, MIB_CCR, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_mib_getEnable
+ * PURPOSE:
+ *      Enable or Disable mib count fucntion.
+ *
+ * INPUT:
+ *      unit           --   Device ID
+ *
+ * OUTPUT:
+ *      mib_en         --   enable or disable mib_en
+
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_getEnable(
+    const UI32_T unit,
+    BOOL_T *mib_en)
+{
+    UI32_T u32dat = 0;
+    /* Mistake proofing */
+    AIR_CHECK_PTR(mib_en);
+
+
+    /* Write data to register */
+    aml_readReg(unit, MIB_CCR, &u32dat);
+    (*mib_en) = BITS_OFF_R(u32dat, MIB_CCR_MIB_ENABLE_OFFSET, MIB_CCR_MIB_ENABLE_LENGTH);
+
+
+    return AIR_E_OK;
+}
+/* FUNCTION NAME: air_mib_clear
+ * PURPOSE:
+ *      Clear all counters of all MIB counters.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_clear(
+    const UI32_T unit)
+{
+    UI32_T u32dat = 0;
+
+    /* Write data to register */
+    aml_readReg(unit, MIB_CCR, &u32dat);
+    /* Restart MIB counter */
+    u32dat &= ~MIB_CCR_MIB_ENABLE;
+    aml_writeReg(unit, MIB_CCR, u32dat);
+    u32dat |= MIB_CCR_MIB_ENABLE;
+    aml_writeReg(unit, MIB_CCR, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* EXPORTED SUBPROGRAM BODIES
+*/
+/* FUNCTION NAME: air_mib_clear_by_port
+ * PURPOSE:
+ *      Clear all counters of all MIB counters.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  clear port number
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_clear_by_port(
+    const UI32_T unit,
+    const UI32_T port)
+{
+    /* Mistake proofing */
+    AIR_PARAM_CHK(port > AIR_MAX_NUM_OF_PORTS, AIR_E_BAD_PARAMETER);
+
+    /* Write data to register */
+    aml_writeReg(unit, MIB_PCLR, 1 << port);
+    aml_writeReg(unit, MIB_PCLR, 0);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_mib_get
+ * PURPOSE:
+ *      Get the structure of MIB counter for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_rx_mib      --  MIB Counters of Rx Event
+ *      ptr_tx_mib      --  MIB Counters of Tx Event
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_get(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_MIB_CNT_RX_T *ptr_rx_mib,
+    AIR_MIB_CNT_TX_T *ptr_tx_mib)
+{
+    UI32_T u32dat = 0, u32dat_h = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_rx_mib);
+    AIR_CHECK_PTR(ptr_tx_mib);
+
+    /* Read data from register */
+
+    /* Read Tx MIB Counter */
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TDPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TCRC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TUPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TMPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TBPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TCEC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TSCEC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TMCEC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TDEC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TLCEC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TXCEC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TPPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TL64PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TL65PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TL128PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TL256PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TL512PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TL1024PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TL1519PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_tx_mib, TODPC, u32dat);
+    aml_readReg(unit, MIB_TOCL(port), &u32dat);
+    aml_readReg(unit, MIB_TOCH(port), &u32dat_h);
+    ptr_tx_mib->TOC = u32dat | ((UI64_T)(u32dat_h) << 32);
+    u32dat = 0;
+    u32dat_h = 0;
+    aml_readReg(unit, MIB_TOCL2(port), &u32dat);
+    aml_readReg(unit, MIB_TOCH2(port), &u32dat_h);
+    ptr_tx_mib->TOC2 = u32dat | ((UI64_T)(u32dat_h) << 32);
+
+    /* Read Rx MIB Counter */
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RDPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RFPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RUPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RMPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RBPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RAEPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RCEPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RUSPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RFEPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, ROSPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RJEPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RPPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RL64PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RL65PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RL128PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RL256PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RL512PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RL1024PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RL1519PC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RCDPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RIDPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RADPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, FCDPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, WRDPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, MRDPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, SFSPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, SFTPC, u32dat);
+    MIB_READ_DATA(unit, port, ptr_rx_mib, RXC_DPC, u32dat);
+    u32dat = 0;
+    u32dat_h = 0;
+    aml_readReg(unit, MIB_ROCL(port), &u32dat);
+    aml_readReg(unit, MIB_ROCH(port), &u32dat_h);
+    ptr_rx_mib->ROC = u32dat | ((UI64_T)(u32dat_h) << 32);
+    u32dat = 0;
+    u32dat_h = 0;
+    aml_readReg(unit, MIB_ROCL2(port), &u32dat);
+    aml_readReg(unit, MIB_ROCH2(port), &u32dat_h);
+    ptr_rx_mib->ROC2 = u32dat | ((UI64_T)(u32dat_h) << 32);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_mib_clearAclEvent
+ * PURPOSE:
+ *      Clear all counters of ACL event
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_clearAclEvent(
+    const UI32_T unit)
+{
+    UI32_T u32dat = 0;
+
+    aml_readReg(unit, ACL_MIB_CNT_CFG, &u32dat);
+    u32dat |= CSR_ACL_MIB_CLEAR;
+    aml_writeReg(unit, ACL_MIB_CNT_CFG, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_mib_getAclEvent
+ * PURPOSE:
+ *      Get the total number of ACL event occurred.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      idx             --  Index of ACL event
+ *
+ * OUTPUT:
+ *      ptr_cnt         --  The total number of ACL event occured
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mib_getAclEvent(
+    const UI32_T unit,
+    const UI32_T idx,
+    UI32_T *ptr_cnt)
+{
+    UI32_T reg = 0;
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((idx >= AIR_MIB_MAX_ACL_EVENT_NUM), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_cnt);
+
+    aml_readReg(unit, ACL_MIB_CNT_CFG, &u32dat);
+    u32dat = u32dat | (idx << CSR_ACL_MIB_SEL_OFFSET);
+    aml_writeReg(unit, ACL_MIB_CNT_CFG, u32dat);
+
+    aml_readReg(unit, ACL_MIB_CNT, &u32dat);
+    (*ptr_cnt) = u32dat;
+
+    return AIR_E_OK;
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_mirror.c b/feed/app/switch/src/an8855_sdk/api/src/air_mirror.c
new file mode 100644
index 0000000..00a72e4
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_mirror.c
@@ -0,0 +1,391 @@
+/* FILE NAME: air_mirror.c
+ * PURPOSE:
+ *      Define the port mirror function in ECNT SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM BODIES
+*/
+/* FUNCTION NAME:   air_mir_addSession
+ * PURPOSE:
+ *      This API is used to add or set a mirror session.
+ * INPUT:
+ *      unit                 -- Device unit number
+ *      session_id           -- Session id
+ *      ptr_session          -- Session information
+ *                              AIR_MIR_SESSION_T
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK             -- Operation success.
+ *      AIR_E_BAD_PARAMETER  -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mir_addSession(
+    const UI32_T    unit,
+    const UI32_T    session_id,
+    const AIR_MIR_SESSION_T   *ptr_session)
+{
+    UI32_T regMIR = 0, regPCR = 0;
+    UI32_T dst_mac_port = 0, src_mac_port = 0;
+    BOOL_T enable=FALSE, tx_tag_enable=FALSE;
+    
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((session_id >= AIR_MAX_MIRROR_SESSION), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_session);
+    AIR_PARAM_CHK((ptr_session->src_port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((ptr_session->dst_port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((ptr_session->dst_port == ptr_session->src_port), AIR_E_BAD_PARAMETER);
+
+    src_mac_port = ptr_session->src_port;
+    dst_mac_port = ptr_session->dst_port;
+    /* Read MIR */
+    aml_readReg(unit, MIR, &regMIR);
+
+    /* Set mirroring port */
+    regMIR &= ~ BITS_RANGE(MIR_MIRROR_PORT_OFFSER(session_id), MIR_MIRROR_PORT_LEN);
+    regMIR |= BITS_OFF_L(dst_mac_port, MIR_MIRROR_PORT_OFFSER(session_id), MIR_MIRROR_PORT_LEN);
+
+    /* Set mirroring port tx tag state */
+    if(ptr_session->flags & AIR_MIR_SESSION_FLAGS_TX_TAG_OBEY_CFG)
+    {
+        tx_tag_enable = TRUE;
+    }
+    regMIR &= ~ BITS_RANGE(MIR_MIRROR_TAG_TX_EN_OFFSER(session_id), MIR_MIRROR_TAG_TX_EN_LEN);
+    regMIR |= BITS_OFF_L(tx_tag_enable, MIR_MIRROR_TAG_TX_EN_OFFSER(session_id), MIR_MIRROR_TAG_TX_EN_LEN);
+
+    /* Set mirroring port state */
+    if(ptr_session->flags & AIR_MIR_SESSION_FLAGS_ENABLE)
+    {
+        enable = TRUE;
+    }
+    regMIR &= ~ BITS_RANGE(MIR_MIRROR_EN_OFFSER(session_id), MIR_MIRROR_EN_LEN);
+    regMIR |= BITS_OFF_L(enable, MIR_MIRROR_EN_OFFSER(session_id), MIR_MIRROR_EN_LEN);
+
+    /* Write MIR */
+    aml_writeReg(unit, MIR, regMIR);
+
+    /* Read PCR */
+    aml_readReg(unit, PCR(src_mac_port), &regPCR);
+
+    /* Set mirroring source port */
+    regPCR &= ~ BIT(PCR_PORT_TX_MIR_OFFT + session_id);
+    regPCR &= ~ BIT(PCR_PORT_RX_MIR_OFFT + session_id);
+    if(ptr_session->flags & AIR_MIR_SESSION_FLAGS_DIR_TX)
+    {
+        regPCR |= BIT(PCR_PORT_TX_MIR_OFFT + session_id);
+    }
+
+    if(ptr_session->flags & AIR_MIR_SESSION_FLAGS_DIR_RX)
+    {
+        regPCR |= BIT(PCR_PORT_RX_MIR_OFFT + session_id);
+    }
+
+    /* Write PCR */
+    aml_writeReg(unit, PCR(src_mac_port), regPCR);
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_mir_delSession
+ * PURPOSE:
+ *      This API is used to delete a mirror session.
+ * INPUT:
+ *      unit                 -- Device unit number
+ *      session_id           -- Session id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK             -- Operation success.
+ *      AIR_E_BAD_PARAMETER  -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mir_delSession(
+    const UI32_T    unit,
+    const UI32_T    session_id)
+{
+    UI32_T regMIR = 0;
+
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((session_id >= AIR_MAX_MIRROR_SESSION), AIR_E_BAD_PARAMETER);
+
+    /* Read MIR */
+    aml_readReg(unit, MIR, &regMIR);
+
+    /* Set mirroring port */
+    regMIR &= ~ BITS_RANGE(MIR_MIRROR_PORT_OFFSER(session_id), MIR_MIRROR_PORT_LEN);
+    regMIR |= BITS_OFF_L(AIR_DST_DEFAULT_PORT, MIR_MIRROR_PORT_OFFSER(session_id), MIR_MIRROR_PORT_LEN);
+    /* Set mirroring port tx tag state */
+    regMIR &= ~ BITS_RANGE(MIR_MIRROR_TAG_TX_EN_OFFSER(session_id), MIR_MIRROR_TAG_TX_EN_LEN);
+    /* Set mirroring port state */
+    regMIR &= ~ BITS_RANGE(MIR_MIRROR_EN_OFFSER(session_id), MIR_MIRROR_EN_LEN);
+
+    /* Write MIR */
+    aml_writeReg(unit, MIR, regMIR);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_mir_getSession
+ * PURPOSE:
+ *      This API is used to get mirror session information.
+ * INPUT:
+ *      unit                 -- Device unit number
+ *      session_id           -- Session id
+ * OUTPUT:
+ *      ptr_session          -- The information of the session to be
+ *                              obtained
+ *                              AIR_MIR_SESSION_T
+ * RETURN:
+ *      AIR_E_OK             -- Operation success.
+ *      AIR_E_BAD_PARAMETER  -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mir_getSession(
+    const UI32_T        unit,
+    const UI32_T        session_id,
+    AIR_MIR_SESSION_T   *ptr_session)
+{
+    UI32_T regMIR = 0;
+    UI32_T dst_mac_port = 0;
+    BOOL_T enable = FALSE, tx_tag_enable = FALSE;
+
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((session_id >= AIR_MAX_MIRROR_SESSION), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_session);
+
+    /* Read MIR */
+    aml_readReg(unit, MIR, &regMIR);
+    /* Get mirroring port */
+    dst_mac_port = BITS_OFF_R(regMIR, MIR_MIRROR_PORT_OFFSER(session_id), MIR_MIRROR_PORT_LEN);
+    /* Get mirroring port state */
+    enable = BITS_OFF_R(regMIR, MIR_MIRROR_EN_OFFSER(session_id), MIR_MIRROR_EN_LEN);
+    /* Get mirroring tx tag state*/
+    tx_tag_enable = BITS_OFF_R(regMIR, MIR_MIRROR_TAG_TX_EN_OFFSER(session_id), MIR_MIRROR_TAG_TX_EN_LEN);
+    ptr_session->dst_port = dst_mac_port;
+    if(enable)
+    {
+        ptr_session->flags |= AIR_MIR_SESSION_FLAGS_ENABLE;
+    }
+    if(tx_tag_enable)
+    {
+        ptr_session->flags |= AIR_MIR_SESSION_FLAGS_TX_TAG_OBEY_CFG;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_mir_setSessionAdminMode
+ * PURPOSE:
+ *      This API is used to set mirror session state.
+ * INPUT:
+ *      unit                 -- Device unit number
+ *      session_id           -- Session id
+ *      enable               -- State of session
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK             -- Operation success.
+ *      AIR_E_BAD_PARAMETER  -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mir_setSessionAdminMode(
+    const UI32_T    unit,
+    const UI32_T    session_id,
+    const BOOL_T    enable)
+{
+    UI32_T regMIR = 0;
+
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((session_id >= AIR_MAX_MIRROR_SESSION), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((enable != TRUE && enable != FALSE), AIR_E_BAD_PARAMETER);
+
+    /* Read MIR */
+    aml_readReg(unit, MIR, &regMIR);
+
+    /* Set mirroring port state */
+    regMIR &= ~ BITS_RANGE(MIR_MIRROR_EN_OFFSER(session_id), MIR_MIRROR_EN_LEN);
+    regMIR |= BITS_OFF_L(enable, MIR_MIRROR_EN_OFFSER(session_id), MIR_MIRROR_EN_LEN);
+
+    /* Write MIR */
+    aml_writeReg(unit, MIR, regMIR);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_mir_getSessionAdminMode
+ * PURPOSE:
+ *      This API is used to get mirror session state.
+ * INPUT:
+ *      unit                 -- Device unit number
+ *      session_id           -- mirror session id
+ * OUTPUT:
+ *      ptr_enable           -- State of session
+ * RETURN:
+ *      AIR_E_OK             -- Operation success.
+ *      AIR_E_BAD_PARAMETER  -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mir_getSessionAdminMode(
+    const UI32_T    unit,
+    const UI32_T    session_id,
+    BOOL_T          *ptr_enable)
+{
+    UI32_T regMIR = 0;
+    BOOL_T enable = FALSE;
+
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((session_id >= AIR_MAX_MIRROR_SESSION), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_enable);
+
+    /* Read MIR */
+    aml_readReg(unit, MIR, &regMIR);
+
+    /* Get mirroring port state */
+    enable = BITS_OFF_R(regMIR, MIR_MIRROR_EN_OFFSER(session_id), MIR_MIRROR_EN_LEN);
+
+    *ptr_enable = enable;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_mir_setMirrorPort
+ * PURPOSE:
+ *      This API is used to set mirror port mirroring type.
+ * INPUT:
+ *      unit                 -- Device unit number
+ *      session_id           -- Session id
+ *      ptr_session          -- Session information
+ *                              AIR_MIR_SESSION_T
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK             -- Operation success.
+ *      AIR_E_BAD_PARAMETER  -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mir_setMirrorPort(
+    const UI32_T            unit,
+    const UI32_T            session_id,
+    const AIR_MIR_SESSION_T *ptr_session)
+{
+    UI32_T regPCR = 0;
+    UI32_T src_mac_port = 0;
+
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((session_id >= AIR_MAX_MIRROR_SESSION), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_session);
+    AIR_PARAM_CHK((ptr_session->src_port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    src_mac_port = ptr_session->src_port;
+    /* Read data from register */
+    aml_readReg(unit, PCR(src_mac_port), &regPCR);
+
+    regPCR &= ~ BIT(PCR_PORT_TX_MIR_OFFT + session_id);
+    regPCR &= ~ BIT(PCR_PORT_RX_MIR_OFFT + session_id);
+
+    if(ptr_session->flags & AIR_MIR_SESSION_FLAGS_DIR_TX)
+    {
+        regPCR |= BIT(PCR_PORT_TX_MIR_OFFT + session_id);
+    }
+
+    if(ptr_session->flags & AIR_MIR_SESSION_FLAGS_DIR_RX)
+    {
+        regPCR |= BIT(PCR_PORT_RX_MIR_OFFT + session_id);
+    }
+    /* Write data to register */
+    aml_writeReg(unit, PCR(src_mac_port), regPCR);
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_mir_getMirrorPort
+ * PURPOSE:
+ *      This API is used to get mirror port mirroring type.
+ * INPUT:
+ *      unit                 -- Device unit number
+ *      session_id           -- Session id
+ * OUTPUT:
+ *      ptr_session          -- The information of this session to be
+ *                              obtained.
+ *                              AIR_MIR_SESSION_T
+ * RETURN:
+ *      AIR_E_OK             -- Operation success.
+ *      AIR_E_BAD_PARAMETER  -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_mir_getMirrorPort(
+    const UI32_T        unit,
+    const UI32_T        session_id,
+    AIR_MIR_SESSION_T   *ptr_session)
+{
+    UI32_T regPCR = 0;
+    UI32_T src_mac_port = 0;
+
+    /* parameter sanity check */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((session_id >= AIR_MAX_MIRROR_SESSION), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_session);
+    AIR_PARAM_CHK((ptr_session->src_port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    
+    src_mac_port = ptr_session->src_port;
+    /* Read data from register */
+    aml_readReg(unit, PCR(src_mac_port), &regPCR);
+
+    if(regPCR & BIT(PCR_PORT_TX_MIR_OFFT + session_id))
+    {
+        ptr_session->flags |= AIR_MIR_SESSION_FLAGS_DIR_TX;
+    }
+
+    if(regPCR & BIT(PCR_PORT_RX_MIR_OFFT + session_id))
+    {
+        ptr_session->flags |= AIR_MIR_SESSION_FLAGS_DIR_RX;
+    }
+
+    return AIR_E_OK;
+}
+
+
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_port.c b/feed/app/switch/src/an8855_sdk/api/src/air_port.c
new file mode 100644
index 0000000..09dcef1
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_port.c
@@ -0,0 +1,2456 @@
+/* FILE NAME: air_port.c
+ * PURPOSE:
+ *      Define the port function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+ */
+#include "air.h"
+#include "air_port.h"
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+#define AIR_SET_REG_BIT(cond, reg, bit)    \
+    do{                                     \
+        if(TRUE == (cond))                  \
+        {                                   \
+            (reg) |= (bit);                 \
+        }                                   \
+        else                                \
+        {                                   \
+            (reg) &= ~(bit);                \
+        }                                   \
+    }while(0)
+
+/* DATA TYPE DECLARATIONS
+ */
+
+/* GLOBAL VARIABLE DECLARATIONS
+ */
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+ */
+
+/* STATIC VARIABLE DECLARATIONS
+ */
+
+/* LOCAL SUBPROGRAM BODIES
+ */
+
+/* FUNCTION NAME: air_port_setAnMode
+ * PURPOSE:
+ *      Set the auto-negotiation mode for a specific port.(Auto or Forced)
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setAnMode(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state)
+{
+    UI32_T u32CtrlReg = 0;
+    UI32_T u32Pmcr = 0;
+    UI32_T i = 0;
+    UI32_T mii_port = 0;
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != state) && (FALSE != state)), AIR_E_BAD_PARAMETER);
+
+    /* Read data from phy register */
+    aml_readPhyReg(unit, port, 0x0, &u32CtrlReg);
+
+    if(TRUE == state)
+    {
+        /* Enable AN mode of PHY port */
+        u32CtrlReg |= BIT(12);
+    }
+    else
+    {
+        /* Disable AN mode of PHY port */
+        u32CtrlReg &= ~BIT(12);
+    }
+
+    /* Restart AN */
+    u32CtrlReg |= BIT(9);
+
+    /* Write data to register */
+    aml_writePhyReg(unit, port, 0x00, u32CtrlReg);
+
+    return ret;
+}
+
+/* FUNCTION NAME: air_port_getAnMode
+ * PURPOSE:
+ *      Get the auto-negotiation mode for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getAnMode(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *ptr_state)
+{
+    UI32_T u32dat = 0;
+    UI32_T i = 0, mii_port = 0;
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_state);
+
+    /* Read data from register */
+    aml_readPhyReg(unit, port, 0x0, &u32dat);
+    (*ptr_state) = BITS_OFF_R(u32dat, 12, 1);
+
+    return ret;
+}
+
+/* FUNCTION NAME: air_port_setLocalAdvAbility
+ * PURPOSE:
+ *      Set the auto-negotiation advertisement for a
+ *      specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      adv             --  AN advertisement setting
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setLocalAdvAbility(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_AN_ADV_T adv)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Read AN Advertisement from register */
+    aml_readPhyReg(unit, port, PHY_AN_ADV, &u32dat);
+
+    /* Modify AN Advertisement */
+    AIR_SET_REG_BIT(adv.advCap10HDX, u32dat, AN_ADV_CAP_10_HDX);
+    AIR_SET_REG_BIT(adv.advCap10FDX, u32dat, AN_ADV_CAP_10_FDX);
+    AIR_SET_REG_BIT(adv.advCap100HDX, u32dat, AN_ADV_CAP_100_HDX);
+    AIR_SET_REG_BIT(adv.advCap100FDX, u32dat, AN_ADV_CAP_100_FDX);
+    AIR_SET_REG_BIT(adv.advPause, u32dat, AN_ADV_CAP_PAUSE);
+
+    /* Write AN Advertisement to register */
+    aml_writePhyReg(unit, port, PHY_AN_ADV, u32dat);
+
+    /* Write 1000BASE-T duplex capbility to  register */
+    aml_readPhyReg(unit, port, PHY_CR1G, &u32dat);
+    AIR_SET_REG_BIT(adv.advCap1000FDX, u32dat, CR1G_ADV_CAP1000_FDX);
+    aml_writePhyReg(unit, port, PHY_CR1G, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_getLocalAdvAbility
+ * PURPOSE:
+ *      Get the auto-negotiation advertisement for a
+ *      specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_adv         --  AN advertisement setting
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getLocalAdvAbility(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_AN_ADV_T *ptr_adv)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+    /* Mistake proofing checking */
+    AIR_CHECK_PTR(ptr_adv);
+
+    /* Read AN Advertisement from register */
+    aml_readPhyReg(unit, port, PHY_AN_ADV, &u32dat);
+    ptr_adv ->advCap10HDX = (u32dat & AN_ADV_CAP_10_HDX)?TRUE:FALSE;
+    ptr_adv ->advCap10FDX = (u32dat & AN_ADV_CAP_10_FDX)?TRUE:FALSE;
+    ptr_adv ->advCap100HDX = (u32dat & AN_ADV_CAP_100_HDX)?TRUE:FALSE;
+    ptr_adv ->advCap100FDX = (u32dat & AN_ADV_CAP_100_FDX)?TRUE:FALSE;
+    ptr_adv ->advPause = (u32dat & AN_ADV_CAP_PAUSE)?TRUE:FALSE;
+
+    /* Read 1000BASE-T duplex capalibity from register */
+    aml_readPhyReg(unit, port, PHY_CR1G, &u32dat);
+    ptr_adv ->advCap1000FDX = (u32dat & CR1G_ADV_CAP1000_FDX)?TRUE:FALSE;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_getRemoteAdvAbility
+ * PURPOSE:
+ *      Get the auto-negotiation remote advertisement for a
+ *      specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_lp_adv      --  AN advertisement of link partner
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getRemoteAdvAbility(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_AN_ADV_T *ptr_lp_adv)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_lp_adv);
+
+    /* Read AN LP Advertisement from register */
+    aml_readPhyReg(unit, port, PHY_AN_LP_ADV, &u32dat);
+    ptr_lp_adv ->advCap10HDX = (u32dat & AN_LP_CAP_10_HDX)?TRUE:FALSE;
+    ptr_lp_adv ->advCap10FDX = (u32dat & AN_LP_CAP_10_FDX)?TRUE:FALSE;
+    ptr_lp_adv ->advCap100HDX = (u32dat & AN_LP_CAP_100_HDX)?TRUE:FALSE;
+    ptr_lp_adv ->advCap100FDX = (u32dat & AN_LP_CAP_100_FDX)?TRUE:FALSE;
+    ptr_lp_adv ->advPause = (u32dat & AN_LP_CAP_PAUSE)?TRUE:FALSE;
+
+    /* Read LP 1000BASE-T duplex capalibity from register */
+    aml_readPhyReg(unit, port, PHY_SR1G, &u32dat);
+    ptr_lp_adv ->advCap1000FDX = (u32dat & SR1G_CAP1000_FDX)?TRUE:FALSE;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_setSpeed
+ * PURPOSE:
+ *      Set the speed for a specific port.
+ *      This setting is used on force mode only.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      speed           --  AIR_PORT_SPEED_10M:  10Mbps
+ *                          AIR_PORT_SPEED_100M: 100Mbps
+ *                          AIR_PORT_SPEED_1000M:1Gbps
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *      AIR_E_OTHERS
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setSpeed(
+    const UI32_T unit,
+    const UI32_T port,
+    const UI32_T speed)
+{
+    UI32_T u32dat = 0;
+    UI32_T mii_port = 0;
+    BOOL_T an = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for speed checking */
+    AIR_PARAM_CHK((speed >= AIR_PORT_SPEED_2500M), AIR_E_BAD_PARAMETER);
+
+    /* Read data from register */
+    aml_readPhyReg(unit, port, 0x0, &u32dat);
+
+    u32dat &= ~(BIT(13) | BIT(6));
+    switch(speed)
+    {
+        case AIR_PORT_SPEED_10M:
+            /* (bit6, bit13) = 2b'00 means 10M */
+            break;
+        case AIR_PORT_SPEED_100M:
+            /* (bit6, bit13) = 2b'01 means 100M */
+            u32dat |= BIT(13);
+            break;
+        case AIR_PORT_SPEED_1000M:
+            /* (bit6, bit13) = 2b'10 means 1000M */
+            u32dat |= BIT(6);
+            break;
+        default:
+            /* (bit6, bit13) = 2b'11 means reverse,
+             * other value is invalid */
+            AIR_PRINT("argument 3: speed(%u) is invalid.\n", speed);
+            return AIR_E_BAD_PARAMETER;
+    }
+
+    /* Write data to register */
+    aml_writePhyReg(unit, port, 0x00, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_getSpeed
+ * PURPOSE:
+ *      Get the speed for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_speed       --  AIR_PORT_SPEED_10M:  10Mbps
+ *                          AIR_PORT_SPEED_100M: 100Mbps
+ *                          AIR_PORT_SPEED_1000M:1Gbps
+ *                          AIR_PORT_SPEED_2500M:2.5Gbps
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getSpeed(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_speed)
+{
+    UI32_T u32dat = 0;
+    UI32_T mii_port = 0, sp = 0;
+    UI32_T ret = AIR_E_OK;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for speed checking */
+    AIR_CHECK_PTR(ptr_speed);
+
+    /* Read data from register */
+    aml_readPhyReg(unit, port, 0x0, &u32dat);
+    (*ptr_speed) = (BITS_OFF_R(u32dat, 6, 1) << 1) | BITS_OFF_R(u32dat, 13, 1);
+
+    return ret;
+}
+
+/* FUNCTION NAME: air_port_setDuplex
+ * PURPOSE:
+ *      Get the duplex for a specific port.
+ *      This setting is used on force mode only.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      duplex          --  AIR_PORT_DUPLEX_HALF
+ *                          AIR_PORT_DUPLEX_FULL
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setDuplex(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T duplex)
+{
+    UI32_T ret = AIR_E_OK;
+    UI32_T u32dat = 0;
+    UI32_T mii_port = 0, speed = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for duplex checking */
+    AIR_PARAM_CHK(((AIR_PORT_DUPLEX_HALF != duplex) && (AIR_PORT_DUPLEX_FULL != duplex)), AIR_E_BAD_PARAMETER);
+
+    /* Read data from register */
+    aml_readPhyReg(unit, port, 0x0, &u32dat);
+    speed = (BITS_OFF_R(u32dat, 6, 1) << 1) | BITS_OFF_R(u32dat, 13, 1);
+    if(AIR_PORT_SPEED_100M >= speed)
+    {
+        if(TRUE == duplex)
+        {
+            u32dat |= BIT(8);
+        }
+        else
+        {
+            u32dat &= ~BIT(8);
+        }
+    }
+    else
+    {
+        /* 1G support full duplex only */
+        u32dat |= BIT(8);
+    }
+
+    /* Write data to register */
+    aml_writePhyReg(unit, port, 0x0, u32dat);
+
+    return ret;
+}
+
+/* FUNCTION NAME: air_port_getDuplex
+ * PURPOSE:
+ *      Get the duplex for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_duplex      --  AIR_PORT_DUPLEX_HALF
+ *                          AIR_PORT_DUPLEX_FULL
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getDuplex(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *ptr_duplex)
+{
+    UI32_T u32dat = 0;
+    UI32_T mii_port = 0, duplex = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+    /* Mistake proofing for duplex checking */
+    AIR_CHECK_PTR(ptr_duplex);
+
+    /* Read data from register */
+    aml_readPhyReg(unit, port, 0x0, &u32dat);
+    (*ptr_duplex) = BITS_OFF_R(u32dat, 8, 1);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_getLink
+ * PURPOSE:
+ *      Get the physical link status for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_ps          --  AIR_PORT_STATUS_T
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getLink(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_PORT_STATUS_T *ptr_ps)
+{
+    UI32_T ret = AIR_E_OK;
+    UI32_T u32dat = 0;
+    UI32_T mii_port = 0;
+    BOOL_T an = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+    /* Mistake proofing for duplex checking */
+    AIR_CHECK_PTR(ptr_ps);
+
+    /* Read data from register */
+    aml_readReg(unit, PMSR(port), &u32dat);
+    ptr_ps->link = BITS_OFF_R(u32dat, 24, 1);
+    ptr_ps->duplex = BITS_OFF_R(u32dat, 25, 1);
+    ptr_ps->speed = BITS_OFF_R(u32dat, 28, 3);
+
+    return ret;
+}
+
+/* FUNCTION NAME: air_port_setBckPres
+ * PURPOSE:
+ *      Set the back pressure configuration for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      bckPres         --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setBckPres(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T bckPres)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    /* Mistake proofing for speed checking */
+    AIR_PARAM_CHK(((TRUE != bckPres) && (FALSE != bckPres)), AIR_E_BAD_PARAMETER);
+
+    /* Read data from register */
+    aml_readReg(unit, PMCR(port), &u32dat);
+    if(TRUE == bckPres)
+    {
+        u32dat |= BIT(11);
+    }
+    else
+    {
+        u32dat &= ~BIT(11);
+    }
+
+    /* Write data to register */
+    aml_writeReg(unit, PMCR(port), u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_getBckPres
+ * PURPOSE:
+ *      Get the back pressure configuration for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_bckPres     --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getBckPres(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *ptr_bckPres)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for speed checking */
+    AIR_CHECK_PTR(ptr_bckPres);
+
+    /* Read data from register */
+    aml_readReg(unit, PMCR(port), &u32dat);
+    (*ptr_bckPres) = BITS_OFF_R(u32dat, 11, 1);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_setFlowCtrl
+ * PURPOSE:
+ *      Set the flow control configuration for specific port.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number (0 - 6)
+ *      dir             --  Directions of AIR_PORT_TX or AIR_PORT_RX
+ *      fc_en           --  TRUE: Enable select port flow control
+ *                          FALSE:Disable select port flow control
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setFlowCtrl(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T dir,
+    const BOOL_T fc_en)
+{
+    UI32_T u32dat = 0;
+
+    /* Check port range */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Check directions */
+    if(dir != AIR_PORT_TX && dir != AIR_PORT_RX)
+        return AIR_E_BAD_PARAMETER;;
+
+    /* Check fc_en */
+    AIR_PARAM_CHK(((TRUE != fc_en) && (FALSE != fc_en)), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, PMCR(port), &u32dat);
+    if(TRUE == fc_en)
+    {
+        /* Enable port flow control */
+        if(dir == AIR_PORT_TX)
+        {
+            u32dat |= FORCE_TX_FC;
+        }
+        else
+        {
+            u32dat |= FORCE_RX_FC;
+        }
+    }
+    else
+    {
+        /* Disable port flow control */
+        if(dir == AIR_PORT_TX)
+        {
+            u32dat &= ~(FORCE_TX_FC);
+        }
+        else
+        {
+            u32dat &= ~(FORCE_RX_FC);
+        }
+    }
+    aml_writeReg(unit, PMCR(port), u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_getFlowCtrl
+ * PURPOSE:
+ *      Get the flow control configuration for specific port.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number (0..6)
+ *      dir             --  AIR_PORT_TX
+ *                          AIR_PORT_RX
+ * OUTPUT:
+ *      ptr_fc_en       --  FALSE: Port flow control disable
+ *                          TRUE: Port flow control enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getFlowCtrl(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T dir,
+    BOOL_T *ptr_fc_en)
+{
+    UI32_T u32dat = 0;
+
+    /* Check port range */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_fc_en);
+
+    /* Check directions */
+    if(dir != AIR_PORT_TX && dir != AIR_PORT_RX)
+        return AIR_E_BAD_PARAMETER;
+
+    /* Read port flow control status*/
+    aml_readReg(unit, PMCR(port), &u32dat);
+    if(dir == AIR_PORT_TX)
+    {
+        if((u32dat & FORCE_TX_FC) == FORCE_TX_FC)
+            *ptr_fc_en = TRUE;
+        else
+            *ptr_fc_en = FALSE;
+    }
+    else
+    {
+        if((u32dat & FORCE_RX_FC) == FORCE_RX_FC)
+            *ptr_fc_en = TRUE;
+        else
+            *ptr_fc_en = FALSE;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_setJumbo
+ * PURPOSE:
+ *      Set accepting jumbo frmes with specificied size.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      pkt_len         --  Select max packet length
+ *                          RX_PKT_LEN_1518
+ *                          RX_PKT_LEN_1536
+ *                          RX_PKT_LEN_1552
+ *                          RX_PKT_LEN_MAX_JUMBO
+ *      frame_len       --  Select max lenght of jumbo frames
+ *                          Range : 2 - 16
+ *                          Units : K Bytes
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setJumbo(
+    const UI32_T unit,
+    const UI32_T pkt_len,
+    const UI32_T frame_len)
+{
+    UI32_T u32dat = 0;
+
+    /* Check packet length */
+    AIR_PARAM_CHK((pkt_len > 3), AIR_E_BAD_PARAMETER);
+
+    /* Check frame length */
+    AIR_PARAM_CHK((frame_len < 2), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((frame_len > 16), AIR_E_BAD_PARAMETER);
+
+    /* Read and clear jumbo frame info */
+    aml_readReg(unit, GMACCR, &u32dat);
+    u32dat &= ~0x00F3;
+
+    /* Set max packet length */
+    u32dat |= pkt_len;
+
+    /* Set jumbo frames max length */
+    u32dat |= (frame_len << 4);
+
+    aml_writeReg(unit, GMACCR, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_getJumbo
+ * PURPOSE:
+ *      Get accepting jumbo frmes with specificied size.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *
+ * OUTPUT:
+ *      ptr_pkt_len     --  Select max packet length
+ *                          RX_PKT_LEN_1518
+ *                          RX_PKT_LEN_1536
+ *                          RX_PKT_LEN_1552
+ *                          RX_PKT_LEN_MAX_JUMBO
+ *      ptr_frame_len   --  Select max lenght of jumbo frames
+ *                          Range : 2 - 16
+ *                          Units : K Bytes
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getJumbo(
+    const UI32_T unit,
+    UI32_T *ptr_pkt_len,
+    UI32_T *ptr_frame_len)
+{
+    UI32_T u32dat = 0;
+
+    AIR_CHECK_PTR(ptr_pkt_len);
+    AIR_CHECK_PTR(ptr_frame_len);
+
+    /* Read and clear jumbo frame info */
+    aml_readReg(unit, GMACCR, &u32dat);
+
+    /* Set max packet length */
+    *ptr_pkt_len = (0x03 & u32dat);
+
+    /* Set jumbo frames max length */
+    *ptr_frame_len = (0x0F & (u32dat >> 4));
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_setPsMode
+ * PURPOSE:
+ *      Set the power saving mode for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      mode            --  Bit-map:
+ *                          AIR_PORT_PS_LINKSTATUS
+ *                          AIR_PORT_PS_EEE
+ *                          FALSE: Disable / TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setPsMode(
+    const UI32_T unit,
+    const UI32_T port,
+    const UI32_T mode)
+{
+    UI32_T u32dat = 0;
+    UI32_T u32cl45_1e_3c = 0;
+    UI32_T u32cl45_1e_3d = 0;
+    UI32_T u32cl45_1e_3e = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((mode & (~AIR_PORT_PS_MASK)), AIR_E_BAD_PARAMETER);
+
+    /* Read data from register */
+    aml_readPhyRegCL45(unit, port, PHY_DEV_1EH, BYPASS_POWER_DOWN_REG0, &u32cl45_1e_3c);
+    aml_readPhyRegCL45(unit, port, PHY_DEV_1EH, BYPASS_POWER_DOWN_REG1, &u32cl45_1e_3d);
+    aml_readPhyRegCL45(unit, port, PHY_DEV_1EH, BYPASS_POWER_DOWN_REG2, &u32cl45_1e_3e);
+
+    if(mode & AIR_PORT_PS_LINKSTATUS)
+    {
+        /* Set Link Status
+         * Disable bypass function to enable */
+        u32cl45_1e_3c &= ~BITS(12, 15);
+        aml_writePhyRegCL45(unit, port, PHY_DEV_1EH, BYPASS_POWER_DOWN_REG0, u32cl45_1e_3c);
+        u32cl45_1e_3d &= ~BITS(12, 15);
+        aml_writePhyRegCL45(unit, port, PHY_DEV_1EH, BYPASS_POWER_DOWN_REG1, u32cl45_1e_3d);
+        u32cl45_1e_3e &= ~BITS(11, 15);
+        aml_writePhyRegCL45(unit, port, PHY_DEV_1EH, BYPASS_POWER_DOWN_REG2, u32cl45_1e_3e);
+    }
+    else
+    {
+        /* Set Link Status
+         * Enable bypass function to disable */
+        u32cl45_1e_3c |= BITS(12, 15);
+        aml_writePhyRegCL45(unit, port, PHY_DEV_1EH, BYPASS_POWER_DOWN_REG0, u32cl45_1e_3c);
+        u32cl45_1e_3d |= BITS(12, 15);
+        aml_writePhyRegCL45(unit, port, PHY_DEV_1EH, BYPASS_POWER_DOWN_REG1, u32cl45_1e_3d);
+        u32cl45_1e_3e |= BITS(11, 15);
+        aml_writePhyRegCL45(unit, port, PHY_DEV_1EH, BYPASS_POWER_DOWN_REG2, u32cl45_1e_3e);
+    }
+
+    if(mode & AIR_PORT_PS_EEE)
+    {
+        /* Enable EEE */
+        u32dat = (EEE_ADV_1000BT | EEE_ADV_100BT );
+        aml_writePhyRegCL45(unit, port, PHY_DEV_07H, EEE_ADV_REG, u32dat);
+    }
+    else
+    {
+        /* Disable EEE */
+        aml_writePhyRegCL45(unit, port, PHY_DEV_07H, EEE_ADV_REG, 0);
+    }
+    return AIR_E_OK;
+
+}
+
+/* FUNCTION NAME: air_port_getPsMode
+ * PURPOSE:
+ *      Get the power saving mode for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ * OUTPUT:
+ *      ptr_mode        --  Bit-map:
+ *                          AIR_PORT_PS_LINKSTATUS
+ *                          AIR_PORT_PS_EEE
+ *                          FALSE: Disable / TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getPsMode(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_mode)
+{
+    UI32_T u32cl45_1e_3e = 0;
+    UI32_T u32cl45_07_3c = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for mode checking */
+    AIR_CHECK_PTR(ptr_mode);
+
+    (*ptr_mode) = 0;
+
+    /* Check link-status power saving */
+    aml_readPhyRegCL45(unit, port, PHY_DEV_1EH, BYPASS_POWER_DOWN_REG2, &u32cl45_1e_3e);
+    if(!BITS_OFF_R(u32cl45_1e_3e, 11, 5))
+    {
+        /* Read Bypass the power-down TXVLD to check link-status
+         * power saving function state */
+        (*ptr_mode) |= AIR_PORT_PS_LINKSTATUS;
+    }
+
+    /* Check EEE */
+    aml_readPhyRegCL45(unit, port, PHY_DEV_07H, EEE_ADV_REG, &u32cl45_07_3c);
+    if( (u32cl45_07_3c & EEE_ADV_1000BT) && (u32cl45_07_3c & EEE_ADV_100BT) )
+    {
+        /* Read PMCR to check EEE ability */
+        (*ptr_mode) |= AIR_PORT_PS_EEE;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_setSmtSpdDwn
+ * PURPOSE:
+ *      Set Smart speed down feature for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ *      time            --  AIR_PORT_SSD_2T
+ *                          AIR_PORT_SSD_3T
+ *                          AIR_PORT_SSD_4T
+ *                          AIR_PORT_SSD_5T
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setSmtSpdDwn(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state,
+    const UI32_T time)
+{
+    UI32_T u32ext14 = 0;
+    UI32_T page = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for state checking */
+    AIR_PARAM_CHK(((TRUE != state) && (FALSE != state)), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for time checking */
+    AIR_PARAM_CHK((time >= AIR_PORT_SSD_LAST), AIR_E_BAD_PARAMETER);
+
+    /* Backup page */
+    aml_readPhyReg(unit, port, 0x1F, &page);
+
+    /* Switch to page 1*/
+    aml_writePhyReg(unit, port, 0x1F, 0x1);
+    /* Read data from register */
+    aml_readPhyReg(unit, port, 0x14, &u32ext14);
+
+    /* Write data to register */
+    if(TRUE == state)
+    {
+        u32ext14 |= BIT(4);
+    }
+    else
+    {
+        u32ext14 &= ~BIT(4);
+    }
+    u32ext14 &= ~BITS(2,3);
+    u32ext14 |= time << 2;
+
+    /* Switch to page 1*/
+    aml_writePhyReg(unit, port, 0x1F, 0x1);
+    /* Read data from register */
+    aml_writePhyReg(unit, port, 0x14, u32ext14);
+
+    /* Restore page */
+    aml_writePhyReg(unit, port, 0x1F, page);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_getSmtSpdDwn
+ * PURPOSE:
+ *      Get Smart speed down feature for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ *      ptr_time        --  AIR_PORT_SSD_2T
+ *                          AIR_PORT_SSD_3T
+ *                          AIR_PORT_SSD_4T
+ *                          AIR_PORT_SSD_5T
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getSmtSpdDwn(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_state,
+    UI32_T *ptr_time)
+{
+    UI32_T u32ext14 = 0;
+    UI32_T page = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for state checking */
+    AIR_CHECK_PTR(ptr_state);
+
+    /* Mistake proofing for time checking */
+    AIR_CHECK_PTR(ptr_time);
+
+    /* Backup page */
+    aml_readPhyReg(unit, port, 0x1F, &page);
+
+    /* Switch to page 1*/
+    aml_writePhyReg(unit, port, 0x1F, 0x1);
+    /* Read data from register */
+    aml_readPhyReg(unit, port, 0x14, &u32ext14);
+
+    (*ptr_state) = BITS_OFF_R(u32ext14, 4, 1);
+    (*ptr_time) = BITS_OFF_R(u32ext14, 2, 2);
+
+    /* Restore page */
+    aml_writePhyReg(unit, port, 0x1F, page);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_setEnable
+ * PURPOSE:
+ *      Set powerdown state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      state           --  FALSE:Disable
+ *                          TRUE: Enable
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != state) && (FALSE != state)), AIR_E_BAD_PARAMETER);
+
+    /* Read data from register */
+    aml_readPhyReg(unit, port, 0x0, &u32dat);
+
+    if(TRUE == state)
+    {
+        /* Enable port, so disable powerdown bit */
+        u32dat &= ~BIT(11);
+    }
+    else
+    {
+        /* Disable port, so enable powerdown bit */
+        u32dat |= BIT(11);
+    }
+
+    /* Write data to register */
+    aml_writePhyReg(unit, port, 0x0, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_getEnable
+ * PURPOSE:
+ *      Get powerdown state for a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *
+ * OUTPUT:
+ *      ptr_state       --  FALSE:Disable
+ *                          TRUE: Enable
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_GIGA_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for state checking */
+    AIR_CHECK_PTR(ptr_state);
+
+    /* Read data from register */
+    aml_readPhyReg(unit, port, 0x0, &u32dat);
+
+    (*ptr_state) = (~BITS_OFF_R(u32dat, 11, 1))&BIT(0);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_setPortMatrix
+ * PURPOSE:
+ *      Set port matrix from the specified device.
+ *
+ * INPUT:
+ *      unit            --  Unit id
+ *      port            --  Port id
+ *      port_bitmap     --  Matrix port bitmap
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_port_setPortMatrix(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const UI32_T    port_bitmap)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port_bitmap & (~AIR_ALL_PORT_BITMAP)), AIR_E_BAD_PARAMETER);
+
+    aml_writeReg(unit, PORTMATRIX(port), port_bitmap);
+
+    return rc;
+}
+
+/* FUNCTION NAME: air_port_getPortMatrix
+ * PURPOSE:
+ *      Get port matrix from the specified device.
+ *
+ * INPUT:
+ *      unit            --  Unit id
+ *      port            --  Port id
+ *
+ * OUTPUT:
+ *      p_port_bitmap   --  Matrix port bitmap
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_port_getPortMatrix(
+    const UI32_T    unit,
+    const UI32_T    port,
+    UI32_T          *p_port_bitmap)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(p_port_bitmap);
+
+    aml_readReg(unit, PORTMATRIX(port), &val);
+    *p_port_bitmap = val;
+
+    return rc;
+}
+
+/* FUNCTION NAME: air_port_setVlanMode
+ * PURPOSE:
+ *      Set port-based vlan mechanism from the specified device.
+ *
+ * INPUT:
+ *      unit            --  Unit id
+ *      port            --  Port id
+ *      mode            --  Port vlan mode
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_port_setVlanMode(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const AIR_PORT_VLAN_MODE_T mode)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((mode >= AIR_PORT_VLAN_MODE_LAST), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, PCR(port), &val);
+    val &= ~PCR_PORT_VLAN_MASK;
+    val |= (mode & PCR_PORT_VLAN_RELMASK) << PCR_PORT_VLAN_OFFT;
+    aml_writeReg(unit, PCR(port), val);
+
+    return rc;
+}
+
+/* FUNCTION NAME: air_port_getVlanMode
+ * PURPOSE:
+ *      Get port-based vlan mechanism from the specified device.
+ *
+ * INPUT:
+ *      unit            --  Unit id
+ *      port            --  Port id
+ *
+ * OUTPUT:
+ *      p_mode          --  Port vlan mode
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_OTHERS
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_port_getVlanMode(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_PORT_VLAN_MODE_T *p_mode)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(p_mode);
+
+    aml_readReg(unit, PCR(port), &val);
+    *p_mode = (val >> PCR_PORT_VLAN_OFFT) & PCR_PORT_VLAN_RELMASK;
+
+    return rc;
+}
+
+/* FUNCTION NAME: air_port_setSpTag
+ * PURPOSE:
+ *      Set special tag state of a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      sptag_en        --  TRUE:  Enable special tag
+ *                          FALSE: Disable special tag
+ * OUTPUT:
+ *        None
+ *
+ * RETURN:
+ *        AIR_E_OK
+ *        AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setSpTag(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T sptag_en)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != sptag_en) && (FALSE != sptag_en)), AIR_E_BAD_PARAMETER);
+
+    /* Read data from register */
+    aml_readReg(unit, PVC(port), &u32dat);
+
+    /* Write data to register */
+    if(TRUE == sptag_en)
+    {
+        u32dat |= PVC_SPTAG_EN_MASK;
+    }
+    else
+    {
+        u32dat &= ~PVC_SPTAG_EN_MASK;
+    }
+    aml_writeReg(unit, PVC(port), u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_getSpTag
+ * PURPOSE:
+ *      Get special tag state of a specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ * OUTPUT:
+ *      ptr_sptag_en    --  TRUE:  Special tag enable
+ *                          FALSE: Special tag disable
+ *
+ * RETURN:
+ *        AIR_E_OK
+ *        AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_getSpTag(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *ptr_sptag_en)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for state checking */
+    AIR_CHECK_PTR(ptr_sptag_en);
+
+    /* Read data from register */
+    aml_readReg(unit, PVC(port), &u32dat);
+
+    *ptr_sptag_en = (u32dat & PVC_SPTAG_EN_MASK) >> PVC_SPTAG_EN_OFFT;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_port_set5GBaseRModeEnable
+ * PURPOSE:
+ *      Set the port5 5GBase-R mode enable
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_set5GBaseRModeEn(
+    const UI32_T unit)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T u32dat = 0;
+
+    /* PHYA Cal Enable (EFUSE) */
+    aml_readReg(unit, INTF_CTRL_8, &u32dat);
+    u32dat |= BIT(7);
+    aml_writeReg(unit, INTF_CTRL_8, u32dat);
+
+    aml_readReg(unit, INTF_CTRL_9, &u32dat);
+    u32dat |= BIT(31);
+    aml_writeReg(unit, INTF_CTRL_9, u32dat);
+
+    /* PMA Init */
+    /* PLL */
+    aml_readReg(unit, RX_CTRL_26, &u32dat);
+    u32dat |= BIT(23);
+    u32dat &= (~BIT(24));
+    u32dat |= BIT(26);
+    aml_writeReg(unit, RX_CTRL_26, u32dat);
+
+    aml_readReg(unit, QP_DIG_MODE_CTRL_1, &u32dat);
+    u32dat |= BITS(2, 3);
+    aml_writeReg(unit, QP_DIG_MODE_CTRL_1, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat |= BITS(0, 1);
+    u32dat &= ~(0x7 << 2);
+    u32dat |= (0x5 << 2);
+    u32dat &= ~(0x3 << 6);
+    u32dat |= (0x1 << 6);
+    u32dat &= ~(0x7 << 8);
+    u32dat |= (0x3 << 8);
+    u32dat |= BIT(29);
+    u32dat &= ~BITS(12, 13);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_4, &u32dat);
+    u32dat &= ~BIT(2);
+    aml_writeReg(unit, PLL_CTRL_4, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~BIT(14);
+    u32dat &= ~(0xf << 16);
+    u32dat |= (0x8 << 16);
+    u32dat &= ~BITS(20, 21);
+    u32dat &= ~(0x3 << 24);
+    u32dat |= (0x1 << 24);
+    u32dat &= ~BIT(26);
+    u32dat |= BIT(22);
+    u32dat |= BIT(27);
+    u32dat |= BIT(28);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_4, &u32dat);
+    u32dat &= ~(0x3 << 3);
+    u32dat |= (0x1 << 3);
+    aml_writeReg(unit, PLL_CTRL_4, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~BIT(30);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    aml_readReg(unit, SS_LCPLL_PWCTL_SETTING_2, &u32dat);
+    u32dat |= BITS(16, 17);
+    aml_writeReg(unit, SS_LCPLL_PWCTL_SETTING_2, u32dat);
+
+    aml_writeReg(unit, SS_LCPLL_TDC_FLT_2, 0x1c800000);
+    aml_writeReg(unit, SS_LCPLL_TDC_PCW_1, 0x1c800000);
+
+    aml_readReg(unit, SS_LCPLL_TDC_FLT_5, &u32dat);
+    u32dat &= ~BIT(24);
+    aml_writeReg(unit, SS_LCPLL_TDC_FLT_5, u32dat);
+
+    aml_readReg(unit, PLL_CK_CTRL_0, &u32dat);
+    u32dat &= ~BIT(8);
+    aml_writeReg(unit, PLL_CK_CTRL_0, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_3, &u32dat);
+    u32dat &= ~BITS(0, 15);
+    aml_writeReg(unit, PLL_CTRL_3, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_4, &u32dat);
+    u32dat &= ~BITS(0, 1);
+    aml_writeReg(unit, PLL_CTRL_4, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_3, &u32dat);
+    u32dat &= ~BITS(16, 31);
+    aml_writeReg(unit, PLL_CTRL_3, u32dat);
+
+    aml_readReg(unit, PLL_CK_CTRL_0, &u32dat);
+    u32dat &= ~BIT(9);
+    aml_writeReg(unit, PLL_CK_CTRL_0, u32dat);
+
+    aml_readReg(unit, RG_QP_PLL_IPLL_DIG_PWR_SEL, &u32dat);
+    u32dat &= ~(0x3 << 25);
+    u32dat |= (0x1 << 25);
+    aml_writeReg(unit, RG_QP_PLL_IPLL_DIG_PWR_SEL, u32dat);
+
+    aml_readReg(unit, RG_QP_PLL_SDM_ORD, &u32dat);
+    u32dat |= BIT(3);
+    u32dat |= BIT(4);
+    aml_writeReg(unit, RG_QP_PLL_SDM_ORD, u32dat);
+
+    aml_readReg(unit, RG_QP_RX_DAC_EN, &u32dat);
+    u32dat &= ~(0x3 << 16);
+    u32dat |= (0x2 << 16);
+    aml_writeReg(unit, RG_QP_RX_DAC_EN, u32dat);
+
+    aml_readReg(unit, PON_RXFEDIG_CTRL_0, &u32dat);
+    u32dat &= ~BIT(12);
+    aml_writeReg(unit, PON_RXFEDIG_CTRL_0, u32dat);
+
+    /* RX Control */
+    aml_readReg(unit, RG_QP_CDR_LPF_MJV_LIM, &u32dat);
+    u32dat &= ~BITS(4, 5);
+    aml_writeReg(unit, RG_QP_CDR_LPF_MJV_LIM, u32dat);
+
+    aml_readReg(unit, RG_QP_RXAFE_RESERVE, &u32dat);
+    u32dat |= BIT(11);
+    aml_writeReg(unit, RG_QP_RXAFE_RESERVE, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_PR_CKREF_DIV1, &u32dat);
+    u32dat &= ~(0x1f << 8);
+    u32dat |= (0xc << 8);
+    aml_writeReg(unit, RG_QP_CDR_PR_CKREF_DIV1, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_FORCE_IBANDLPF_R_OFF, &u32dat);
+    u32dat |= BIT(13);
+    aml_writeReg(unit, RG_QP_CDR_FORCE_IBANDLPF_R_OFF, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_PR_KBAND_DIV_PCIE, &u32dat);
+    u32dat |= BIT(30);
+    aml_writeReg(unit, RG_QP_CDR_PR_KBAND_DIV_PCIE, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_0, &u32dat);
+    u32dat |= BIT(0);
+    aml_writeReg(unit, PLL_CTRL_0, u32dat);
+
+    aml_readReg(unit, RX_DLY_0, &u32dat);
+    u32dat &= ~(0xff << 0);
+    u32dat |= (0x6f << 0);
+    u32dat |= BITS(8, 13);
+    aml_writeReg(unit, RX_DLY_0, u32dat);
+
+    aml_readReg(unit, RX_CTRL_42, &u32dat);
+    u32dat &= ~(0x1fff << 0);
+    u32dat |= (0x150 << 0);
+    aml_writeReg(unit, RX_CTRL_42, u32dat);
+
+    aml_readReg(unit, RX_CTRL_2, &u32dat);
+    u32dat &= ~(0x1fff << 16);
+    u32dat |= (0x150 << 16);
+    aml_writeReg(unit, RX_CTRL_2, u32dat);
+
+    aml_readReg(unit, PON_RXFEDIG_CTRL_9, &u32dat);
+    u32dat |= BITS(0, 2);
+    aml_writeReg(unit, PON_RXFEDIG_CTRL_9, u32dat);
+
+    aml_readReg(unit, RX_CTRL_8, &u32dat);
+    u32dat &= ~(0xfff << 16);
+    u32dat |= (0x200 << 16);
+    aml_writeReg(unit, RX_CTRL_8, u32dat);
+
+    /* Frequency memter */
+    aml_readReg(unit, RX_CTRL_5, &u32dat);
+    u32dat &= ~(0xfffff << 10);
+    u32dat |= (0x9 << 10);
+    aml_writeReg(unit, RX_CTRL_5, u32dat);
+
+    aml_readReg(unit, RX_CTRL_6, &u32dat);
+    u32dat &= ~(0xfffff << 0);
+    u32dat |= (0x64 << 0);
+    aml_writeReg(unit, RX_CTRL_6, u32dat);
+
+    aml_readReg(unit, RX_CTRL_7, &u32dat);
+    u32dat &= ~(0xfffff << 0);
+    u32dat |= (0x2710 << 0);
+    aml_writeReg(unit, RX_CTRL_7, u32dat);
+
+    /* PCS Init */
+    aml_readReg(unit, RG_USXGMII_AN_CONTROL_0, &u32dat);
+    u32dat &= ~BIT(0);
+    aml_writeReg(unit, RG_USXGMII_AN_CONTROL_0, u32dat);
+
+    aml_readReg(unit, USGMII_CTRL_0, &u32dat);
+    u32dat |= BIT(2);
+    aml_writeReg(unit, USGMII_CTRL_0, u32dat);
+
+    aml_readReg(unit, MSG_RX_CTRL_0, &u32dat);
+    u32dat |= BIT(28);
+    aml_writeReg(unit, MSG_RX_CTRL_0, u32dat);
+
+    aml_readReg(unit, QP_CK_RST_CTRL_4, &u32dat);
+    u32dat |= BITS(14, 20);
+    aml_writeReg(unit, QP_CK_RST_CTRL_4, u32dat);
+
+    /* bypass flow control to MAC */
+    aml_writeReg(unit, MSG_RX_LIK_STS_0, 0x01010107);
+    aml_writeReg(unit, MSG_RX_LIK_STS_2, 0x00000EEF);
+
+    return ret;
+}
+
+/* FUNCTION NAME: air_port_setHsgmiiModeEnable
+ * PURPOSE:
+ *      Set the port5 HSGMII mode enable
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setHsgmiiModeEn(
+    const UI32_T unit)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T u32dat = 0;
+
+    /* PLL */
+    aml_readReg(unit, QP_DIG_MODE_CTRL_1, &u32dat);
+    u32dat &= ~(0x3 << 2);
+    u32dat |= (0x1 << 2);
+    aml_writeReg(unit, QP_DIG_MODE_CTRL_1, u32dat);
+
+    /* PLL - LPF */
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~(0x3 << 0);
+    u32dat |= (0x1 << 0);
+    u32dat &= ~(0x7 << 2);
+    u32dat |= (0x5 << 2);
+    u32dat &= ~BITS(6, 7);
+    u32dat &= ~(0x7 << 8);
+    u32dat |= (0x3 << 8);
+    u32dat |= BIT(29);
+    u32dat &= ~BITS(12, 13);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    /* PLL - ICO */
+    aml_readReg(unit, PLL_CTRL_4, &u32dat);
+    u32dat |= BIT(2);
+    aml_writeReg(unit, PLL_CTRL_4, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~BIT(14);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    /* PLL - CHP */
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~(0xf << 16);
+    u32dat |= (0x6 << 16);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+
+    /* PLL - PFD */
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~(0x3 << 20);
+    u32dat |= (0x1 << 20);
+    u32dat &= ~(0x3 << 24);
+    u32dat |= (0x1 << 24);
+    u32dat &= ~BIT(26);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    /* PLL - POSTDIV */
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat |= BIT(22);
+    u32dat &= ~BIT(27);
+    u32dat &= ~BIT(28);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    /* PLL - SDM */
+    aml_readReg(unit, PLL_CTRL_4, &u32dat);
+    u32dat &= ~BITS(3, 4);
+    aml_writeReg(unit, PLL_CTRL_4, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~BIT(30);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    aml_readReg(unit, SS_LCPLL_PWCTL_SETTING_2, &u32dat);
+    u32dat &= ~(0x3 << 16);
+    u32dat |= (0x1 << 16);
+    aml_writeReg(unit, SS_LCPLL_PWCTL_SETTING_2, u32dat);
+
+    aml_writeReg(unit, SS_LCPLL_TDC_FLT_2, 0x7a000000);
+    aml_writeReg(unit, SS_LCPLL_TDC_PCW_1, 0x7a000000);
+
+    aml_readReg(unit, SS_LCPLL_TDC_FLT_5, &u32dat);
+    u32dat &= ~BIT(24);
+    aml_writeReg(unit, SS_LCPLL_TDC_FLT_5, u32dat);
+
+    aml_readReg(unit, PLL_CK_CTRL_0, &u32dat);
+    u32dat &= ~BIT(8);
+    aml_writeReg(unit, PLL_CK_CTRL_0, u32dat);
+
+    /* PLL - SS */
+    aml_readReg(unit, PLL_CTRL_3, &u32dat);
+    u32dat &= ~BITS(0, 15);
+    aml_writeReg(unit, PLL_CTRL_3, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_4, &u32dat);
+    u32dat &= ~BITS(0, 1);
+    aml_writeReg(unit, PLL_CTRL_4, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_3, &u32dat);
+    u32dat &= ~BITS(16, 31);
+    aml_writeReg(unit, PLL_CTRL_3, u32dat);
+
+    /* PLL - TDC */
+    aml_readReg(unit, PLL_CK_CTRL_0, &u32dat);
+    u32dat &= ~BIT(9);
+    aml_writeReg(unit, PLL_CK_CTRL_0, u32dat);
+
+    aml_readReg(unit, RG_QP_PLL_SDM_ORD, &u32dat);
+    u32dat |= BIT(3);
+    u32dat |= BIT(4);
+    aml_writeReg(unit, RG_QP_PLL_SDM_ORD, u32dat);
+
+    aml_readReg(unit, RG_QP_RX_DAC_EN, &u32dat);
+    u32dat &= ~(0x3 << 16);
+    u32dat |= (0x2 << 16);
+    aml_writeReg(unit, RG_QP_RX_DAC_EN, u32dat);
+
+    /* TCL Disable (only for Co-SIM) */
+    aml_readReg(unit, PON_RXFEDIG_CTRL_0, &u32dat);
+    u32dat &= ~BIT(12);
+    aml_writeReg(unit, PON_RXFEDIG_CTRL_0, u32dat);
+
+    /* TX Init */
+    aml_readReg(unit, RG_QP_TX_MODE_16B_EN, &u32dat);
+    u32dat &= ~BIT(0);
+    u32dat &= ~(0xffff << 16);
+    u32dat |= (0x4 << 16);
+    aml_writeReg(unit, RG_QP_TX_MODE_16B_EN, u32dat);
+
+    /* RX Control */
+    aml_readReg(unit, RG_QP_RXAFE_RESERVE, &u32dat);
+    u32dat |= BIT(11);
+    aml_writeReg(unit, RG_QP_RXAFE_RESERVE, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_LPF_MJV_LIM, &u32dat);
+    u32dat &= ~(0x3 << 4);
+    u32dat |= (0x1 << 4);
+    aml_writeReg(unit, RG_QP_CDR_LPF_MJV_LIM, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_LPF_SETVALUE, &u32dat);
+    u32dat &= ~(0xf << 25);
+    u32dat |= (0x1 << 25);
+    u32dat &= ~(0x7 << 29);
+    u32dat |= (0x3 << 29);
+    aml_writeReg(unit, RG_QP_CDR_LPF_SETVALUE, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_PR_CKREF_DIV1, &u32dat);
+    u32dat &= ~(0x1f << 8);
+    u32dat |= (0xf << 8);
+    aml_writeReg(unit, RG_QP_CDR_PR_CKREF_DIV1, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_PR_KBAND_DIV_PCIE, &u32dat);
+    u32dat &= ~(0x3f << 0);
+    u32dat |= (0x19 << 0);
+    u32dat &= ~BIT(6);
+    aml_writeReg(unit, RG_QP_CDR_PR_KBAND_DIV_PCIE, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_FORCE_IBANDLPF_R_OFF, &u32dat);
+    u32dat &= ~(0x7f << 6);
+    u32dat |= (0x21 << 6);
+    u32dat &= ~(0x3 << 16);
+    u32dat |= (0x2 << 16);
+    u32dat &= ~BIT(13);
+    aml_writeReg(unit, RG_QP_CDR_FORCE_IBANDLPF_R_OFF, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_PR_KBAND_DIV_PCIE, &u32dat);
+    u32dat &= ~BIT(30);
+    aml_writeReg(unit, RG_QP_CDR_PR_KBAND_DIV_PCIE, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_PR_CKREF_DIV1, &u32dat);
+    u32dat &= ~(0x7 << 24);
+    u32dat |= (0x4 << 24);
+    aml_writeReg(unit, RG_QP_CDR_PR_CKREF_DIV1, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_0, &u32dat);
+    u32dat |= BIT(0);
+    aml_writeReg(unit, PLL_CTRL_0, u32dat);
+
+    aml_readReg(unit, RX_CTRL_26, &u32dat);
+    u32dat &= ~BIT(23);
+    u32dat |= BIT(26);
+    aml_writeReg(unit, RX_CTRL_26, u32dat);
+
+    aml_readReg(unit, RX_DLY_0, &u32dat);
+    u32dat &= ~(0xff << 0);
+    u32dat |= (0x6f << 0);
+    u32dat |= BITS(8, 13);
+    aml_writeReg(unit, RX_DLY_0, u32dat);
+
+    aml_readReg(unit, RX_CTRL_42, &u32dat);
+    u32dat &= ~(0x1fff << 0);
+    u32dat |= (0x150 << 0);
+    aml_writeReg(unit, RX_CTRL_42, u32dat);
+
+    aml_readReg(unit, RX_CTRL_2, &u32dat);
+    u32dat &= ~(0x1fff << 16);
+    u32dat |= (0x150 << 16);
+    aml_writeReg(unit, RX_CTRL_2, u32dat);
+
+    aml_readReg(unit, PON_RXFEDIG_CTRL_9, &u32dat);
+    u32dat &= ~(0x7 << 0);
+    u32dat |= (0x1 << 0);
+    aml_writeReg(unit, PON_RXFEDIG_CTRL_9, u32dat);
+
+    aml_readReg(unit, RX_CTRL_8, &u32dat);
+    u32dat &= ~(0xfff << 16);
+    u32dat |= (0x200 << 16);
+    u32dat &= ~(0x7fff << 14);
+    u32dat |= (0xfff << 14);
+    aml_writeReg(unit, RX_CTRL_8, u32dat);
+
+    /* Frequency memter */
+    aml_readReg(unit, RX_CTRL_5, &u32dat);
+    u32dat &= ~(0xfffff << 10);
+    u32dat |= (0x10 << 10);
+    aml_writeReg(unit, RX_CTRL_5, u32dat);
+
+    aml_readReg(unit, RX_CTRL_6, &u32dat);
+    u32dat &= ~(0xfffff << 0);
+    u32dat |= (0x64 << 0);
+    aml_writeReg(unit, RX_CTRL_6, u32dat);
+
+    aml_readReg(unit, RX_CTRL_7, &u32dat);
+    u32dat &= ~(0xfffff << 0);
+    u32dat |= (0x2710 << 0);
+    aml_writeReg(unit, RX_CTRL_7, u32dat);
+
+    /* PCS Init */
+    aml_readReg(unit, RG_HSGMII_PCS_CTROL_1, &u32dat);
+    u32dat &= ~BIT(30);
+    aml_writeReg(unit, RG_HSGMII_PCS_CTROL_1, u32dat);
+
+    /* Rate Adaption */
+    aml_readReg(unit, RATE_ADP_P0_CTRL_0, &u32dat);
+    u32dat &= ~BIT(31);
+    aml_writeReg(unit, RATE_ADP_P0_CTRL_0, u32dat);
+
+    aml_readReg(unit, RG_RATE_ADAPT_CTRL_0, &u32dat);
+    u32dat |= BIT(0);
+    u32dat |= BIT(4);
+    u32dat |= BITS(26, 27);
+    aml_writeReg(unit, RG_RATE_ADAPT_CTRL_0, u32dat);
+
+    /* Disable AN */
+    aml_readReg(unit, SGMII_REG_AN0, &u32dat);
+    u32dat &= ~BIT(12);
+    aml_writeReg(unit, SGMII_REG_AN0, u32dat);
+
+    /* Force Speed */
+    aml_readReg(unit, SGMII_STS_CTRL_0, &u32dat);
+    u32dat |= BIT(2);
+    u32dat |= BITS(4, 5);
+    aml_writeReg(unit, SGMII_STS_CTRL_0, u32dat);
+
+    /* bypass flow control to MAC */
+    aml_writeReg(unit, MSG_RX_LIK_STS_0, 0x01010107);
+    aml_writeReg(unit, MSG_RX_LIK_STS_2, 0x00000EEF);
+
+    return ret;
+}
+
+/* FUNCTION NAME: air_port_setSgmiiMode
+ * PURPOSE:
+ *      Set the port5 SGMII mode for AN or force
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      mode            --  AIR_PORT_SGMII_MODE_AN
+ *                          AIR_PORT_SGMII_MODE_FORCE
+ *      speed           --  AIR_PORT_SPEED_10M:   10Mbps
+ *                          AIR_PORT_SPEED_100M:  100Mbps
+ *                          AIR_PORT_SPEED_1000M: 1Gbps
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setSgmiiMode(
+    const UI32_T unit,
+    const UI32_T mode,
+    const UI32_T speed)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T u32dat = 0;
+
+    AIR_PARAM_CHK(((AIR_PORT_SGMII_MODE_AN != mode) && (AIR_PORT_SGMII_MODE_FORCE != mode)), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((speed >= AIR_PORT_SPEED_2500M), AIR_E_BAD_PARAMETER);
+
+    /* PMA Init */
+    /* PLL */
+    aml_readReg(unit, QP_DIG_MODE_CTRL_1, &u32dat);
+    u32dat &= ~BITS(2, 3);
+    aml_writeReg(unit, QP_DIG_MODE_CTRL_1, u32dat);
+
+    /* PLL - LPF */
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~(0x3 << 0);
+    u32dat |= (0x1 << 0);
+    u32dat &= ~(0x7 << 2);
+    u32dat |= (0x5 << 2);
+    u32dat &= ~BITS(6, 7);
+    u32dat &= ~(0x7 << 8);
+    u32dat |= (0x3 << 8);
+    u32dat |= BIT(29);
+    u32dat &= ~BITS(12, 13);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    /* PLL - ICO */
+    aml_readReg(unit, PLL_CTRL_4, &u32dat);
+    u32dat |= BIT(2);
+    aml_writeReg(unit, PLL_CTRL_4, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~BIT(14);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    /* PLL - CHP */
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~(0xf << 16);
+    u32dat |= (0x4 << 16);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+
+    /* PLL - PFD */
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~(0x3 << 20);
+    u32dat |= (0x1 << 20);
+    u32dat &= ~(0x3 << 24);
+    u32dat |= (0x1 << 24);
+    u32dat &= ~BIT(26);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    /* PLL - POSTDIV */
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat |= BIT(22);
+    u32dat &= ~BIT(27);
+    u32dat &= ~BIT(28);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    /* PLL - SDM */
+    aml_readReg(unit, PLL_CTRL_4, &u32dat);
+    u32dat &= ~BITS(3, 4);
+    aml_writeReg(unit, PLL_CTRL_4, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_2, &u32dat);
+    u32dat &= ~BIT(30);
+    aml_writeReg(unit, PLL_CTRL_2, u32dat);
+
+    aml_readReg(unit, SS_LCPLL_PWCTL_SETTING_2, &u32dat);
+    u32dat &= ~(0x3 << 16);
+    u32dat |= (0x1 << 16);
+    aml_writeReg(unit, SS_LCPLL_PWCTL_SETTING_2, u32dat);
+
+    aml_writeReg(unit, SS_LCPLL_TDC_FLT_2, 0x48000000);
+    aml_writeReg(unit, SS_LCPLL_TDC_PCW_1, 0x48000000);
+
+    aml_readReg(unit, SS_LCPLL_TDC_FLT_5, &u32dat);
+    u32dat &= ~BIT(24);
+    aml_writeReg(unit, SS_LCPLL_TDC_FLT_5, u32dat);
+
+    aml_readReg(unit, PLL_CK_CTRL_0, &u32dat);
+    u32dat &= ~BIT(8);
+    aml_writeReg(unit, PLL_CK_CTRL_0, u32dat);
+
+    /* PLL - SS */
+    aml_readReg(unit, PLL_CTRL_3, &u32dat);
+    u32dat &= ~BITS(0, 15);
+    aml_writeReg(unit, PLL_CTRL_3, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_4, &u32dat);
+    u32dat &= ~BITS(0, 1);
+    aml_writeReg(unit, PLL_CTRL_4, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_3, &u32dat);
+    u32dat &= ~BITS(16, 31);
+    aml_writeReg(unit, PLL_CTRL_3, u32dat);
+
+    /* PLL - TDC */
+    aml_readReg(unit, PLL_CK_CTRL_0, &u32dat);
+    u32dat &= ~BIT(9);
+    aml_writeReg(unit, PLL_CK_CTRL_0, u32dat);
+
+    aml_readReg(unit, RG_QP_PLL_SDM_ORD, &u32dat);
+    u32dat |= BIT(3);
+    u32dat |= BIT(4);
+    aml_writeReg(unit, RG_QP_PLL_SDM_ORD, u32dat);
+
+    aml_readReg(unit, RG_QP_RX_DAC_EN, &u32dat);
+    u32dat &= ~(0x3 << 16);
+    u32dat |= (0x2 << 16);
+    aml_writeReg(unit, RG_QP_RX_DAC_EN, u32dat);
+
+    /* PLL - TCL Disable (only for Co-SIM) */
+    aml_readReg(unit, PON_RXFEDIG_CTRL_0, &u32dat);
+    u32dat &= ~BIT(12);
+    aml_writeReg(unit, PON_RXFEDIG_CTRL_0, u32dat);
+
+    /* TX Init */
+    aml_readReg(unit, RG_QP_TX_MODE_16B_EN, &u32dat);
+    u32dat &= ~BIT(0);
+    u32dat &= ~BITS(16, 31);
+    aml_writeReg(unit, RG_QP_TX_MODE_16B_EN, u32dat);
+
+    /* RX Init */
+    aml_readReg(unit, RG_QP_RXAFE_RESERVE, &u32dat);
+    u32dat |= BIT(11);
+    aml_writeReg(unit, RG_QP_RXAFE_RESERVE, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_LPF_MJV_LIM, &u32dat);
+    u32dat &= ~(0x3 << 4);
+    u32dat |= (0x2 << 4);
+    aml_writeReg(unit, RG_QP_CDR_LPF_MJV_LIM, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_LPF_SETVALUE, &u32dat);
+    u32dat &= ~(0xf << 25);
+    u32dat |= (0x1 << 25);
+    u32dat &= ~(0x7 << 29);
+    u32dat |= (0x6 << 29);
+    aml_writeReg(unit, RG_QP_CDR_LPF_SETVALUE, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_PR_CKREF_DIV1, &u32dat);
+    u32dat &= ~(0x1f << 8);
+    u32dat |= (0xc << 8);
+    aml_writeReg(unit, RG_QP_CDR_PR_CKREF_DIV1, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_PR_KBAND_DIV_PCIE, &u32dat);
+    u32dat &= ~(0x3f << 0);
+    u32dat |= (0x19 << 0);
+    u32dat &= ~BIT(6);
+    aml_writeReg(unit, RG_QP_CDR_PR_KBAND_DIV_PCIE, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_FORCE_IBANDLPF_R_OFF, &u32dat);
+    u32dat &= ~(0x7f << 6);
+    u32dat |= (0x21 << 6);
+    u32dat &= ~(0x3 << 16);
+    u32dat |= (0x2 << 16);
+    u32dat &= ~BIT(13);
+    aml_writeReg(unit, RG_QP_CDR_FORCE_IBANDLPF_R_OFF, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_PR_KBAND_DIV_PCIE, &u32dat);
+    u32dat &= ~BIT(30);
+    aml_writeReg(unit, RG_QP_CDR_PR_KBAND_DIV_PCIE, u32dat);
+
+    aml_readReg(unit, RG_QP_CDR_PR_CKREF_DIV1, &u32dat);
+    u32dat &= ~(0x7 << 24);
+    u32dat |= (0x4 << 24);
+    aml_writeReg(unit, RG_QP_CDR_PR_CKREF_DIV1, u32dat);
+
+    aml_readReg(unit, PLL_CTRL_0, &u32dat);
+    u32dat |= BIT(0);
+    aml_writeReg(unit, PLL_CTRL_0, u32dat);
+
+    aml_readReg(unit, RX_CTRL_26, &u32dat);
+    u32dat &= ~BIT(23);
+    if(AIR_PORT_SGMII_MODE_AN == mode)
+    {
+        u32dat |= BIT(26);
+    }
+    aml_writeReg(unit, RX_CTRL_26, u32dat);
+
+    aml_readReg(unit, RX_DLY_0, &u32dat);
+    u32dat &= ~(0xff << 0);
+    u32dat |= (0x6f << 0);
+    u32dat |= BITS(8, 13);
+    aml_writeReg(unit, RX_DLY_0, u32dat);
+
+    aml_readReg(unit, RX_CTRL_42, &u32dat);
+    u32dat &= ~(0x1fff << 0);
+    u32dat |= (0x150 << 0);
+    aml_writeReg(unit, RX_CTRL_42, u32dat);
+
+    aml_readReg(unit, RX_CTRL_2, &u32dat);
+    u32dat &= ~(0x1fff << 16);
+    u32dat |= (0x150 << 16);
+    aml_writeReg(unit, RX_CTRL_2, u32dat);
+
+    aml_readReg(unit, PON_RXFEDIG_CTRL_9, &u32dat);
+    u32dat &= ~(0x7 << 0);
+    u32dat |= (0x1 << 0);
+    aml_writeReg(unit, PON_RXFEDIG_CTRL_9, u32dat);
+
+    aml_readReg(unit, RX_CTRL_8, &u32dat);
+    u32dat &= ~(0xfff << 16);
+    u32dat |= (0x200 << 16);
+    u32dat &= ~(0x7fff << 0);
+    u32dat |= (0xfff << 0);
+    aml_writeReg(unit, RX_CTRL_8, u32dat);
+
+    /* Frequency memter */
+    aml_readReg(unit, RX_CTRL_5, &u32dat);
+    u32dat &= ~(0xfffff << 10);
+    u32dat |= (0x28 << 10);
+    aml_writeReg(unit, RX_CTRL_5, u32dat);
+
+    aml_readReg(unit, RX_CTRL_6, &u32dat);
+    u32dat &= ~(0xfffff << 0);
+    u32dat |= (0x64 << 0);
+    aml_writeReg(unit, RX_CTRL_6, u32dat);
+
+    aml_readReg(unit, RX_CTRL_7, &u32dat);
+    u32dat &= ~(0xfffff << 0);
+    u32dat |= (0x2710 << 0);
+    aml_writeReg(unit, RX_CTRL_7, u32dat);
+
+    if(AIR_PORT_SGMII_MODE_FORCE == mode)
+    {
+        /* PCS Init */
+        aml_readReg(unit, QP_DIG_MODE_CTRL_0, &u32dat);
+        u32dat &= ~BIT(0);
+        if(AIR_PORT_SPEED_1000M == speed)
+        {
+            u32dat &= ~BITS(4, 5);
+        }
+        else if(AIR_PORT_SPEED_100M == speed)
+        {
+            u32dat &= ~(0x3 << 4);
+            u32dat |= (0x1 << 4);
+        }
+        else
+        {
+            u32dat &= ~(0x3 << 4);
+            u32dat |= (0x2 << 4);
+        }
+        aml_writeReg(unit, QP_DIG_MODE_CTRL_0, u32dat);
+
+        aml_readReg(unit, RG_HSGMII_PCS_CTROL_1, &u32dat);
+        u32dat &= ~BIT(30);
+        aml_writeReg(unit, RG_HSGMII_PCS_CTROL_1, u32dat);
+
+        /* Rate Adaption - GMII path config. */
+        aml_readReg(unit, RG_AN_SGMII_MODE_FORCE, &u32dat);
+        u32dat |= BIT(0);
+        if(AIR_PORT_SPEED_1000M == speed)
+        {
+            u32dat &= ~BITS(4, 5);
+        }
+        else if(AIR_PORT_SPEED_100M == speed)
+        {
+            u32dat &= ~(0x3 << 4);
+            u32dat |= (0x1 << 4);
+        }
+        else
+        {
+            u32dat &= ~(0x3 << 4);
+            u32dat |= (0x2 << 4);
+        }
+        aml_writeReg(unit, RG_AN_SGMII_MODE_FORCE, u32dat);
+
+        aml_readReg(unit, SGMII_STS_CTRL_0, &u32dat);
+        u32dat |= BIT(2);
+        if(AIR_PORT_SPEED_1000M == speed)
+        {
+            u32dat &= ~(0x3 << 4);
+            u32dat |= (0x2 << 4);
+        }
+        else if(AIR_PORT_SPEED_100M == speed)
+        {
+            u32dat &= ~(0x3 << 4);
+            u32dat |= (0x1 << 4);
+        }
+        else
+        {
+            u32dat &= ~BITS(4, 5);
+        }
+        aml_writeReg(unit, SGMII_STS_CTRL_0, u32dat);
+
+        aml_readReg(unit, SGMII_REG_AN0, &u32dat);
+        u32dat &= ~BIT(12);
+        aml_writeReg(unit, SGMII_REG_AN0, u32dat);
+
+        aml_readReg(unit, PHY_RX_FORCE_CTRL_0, &u32dat);
+        u32dat |= BIT(4);
+        aml_writeReg(unit, PHY_RX_FORCE_CTRL_0, u32dat);
+
+        aml_readReg(unit, RATE_ADP_P0_CTRL_0, &u32dat);
+        if(AIR_PORT_SPEED_1000M == speed)
+        {
+            u32dat &= ~BITS(0, 3);
+        }
+        else if(AIR_PORT_SPEED_100M == speed)
+        {
+            u32dat &= ~(0xf << 0);
+            u32dat |= (0xc << 0);
+        }
+        else
+        {
+            u32dat |= BITS(0, 3);
+        }
+        u32dat |= BIT(28);
+        aml_writeReg(unit, RATE_ADP_P0_CTRL_0, u32dat);
+
+        aml_readReg(unit, RG_RATE_ADAPT_CTRL_0, &u32dat);
+        u32dat |= BIT(0);
+        u32dat |= BIT(4);
+        if(AIR_PORT_SPEED_1000M == speed)
+        {
+            u32dat |= BITS(26, 27);
+        }
+        else
+        {
+            u32dat &= ~BITS(26, 27);
+        }
+        aml_writeReg(unit, RG_RATE_ADAPT_CTRL_0, u32dat);
+
+    }
+    else
+    {
+        /* PCS Init */
+        aml_readReg(unit, RG_HSGMII_PCS_CTROL_1, &u32dat);
+        u32dat &= ~BIT(30);
+        aml_writeReg(unit, RG_HSGMII_PCS_CTROL_1, u32dat);
+
+        /* Set AN Ability - Interrupt */
+        aml_readReg(unit, SGMII_REG_AN_FORCE_CL37, &u32dat);
+        u32dat |= BIT(0);
+        aml_writeReg(unit, SGMII_REG_AN_FORCE_CL37, u32dat);
+
+        aml_readReg(unit, SGMII_REG_AN_13, &u32dat);
+        u32dat &= ~(0x3f << 0);
+        u32dat |= (0xb << 0);
+        u32dat |= BIT(8);
+        aml_writeReg(unit, SGMII_REG_AN_13, u32dat);
+
+        /* Rate Adaption - GMII path config. */
+        aml_readReg(unit, SGMII_REG_AN0, &u32dat);
+        u32dat |= BIT(12);
+        aml_writeReg(unit, SGMII_REG_AN0, u32dat);
+
+        aml_readReg(unit, MII_RA_AN_ENABLE, &u32dat);
+        u32dat |= BIT(0);
+        aml_writeReg(unit, MII_RA_AN_ENABLE, u32dat);
+
+        aml_readReg(unit, RATE_ADP_P0_CTRL_0, &u32dat);
+        u32dat |= BIT(28);
+        aml_writeReg(unit, RATE_ADP_P0_CTRL_0, u32dat);
+
+        aml_readReg(unit, RG_RATE_ADAPT_CTRL_0, &u32dat);
+        u32dat |= BIT(0);
+        u32dat |= BIT(4);
+        u32dat |= BITS(26, 27);
+        aml_writeReg(unit, RG_RATE_ADAPT_CTRL_0, u32dat);
+
+        /* Only for Co-SIM */
+
+        /* AN Speed up (Only for Co-SIM) */
+
+        /* Restart AN */
+        aml_readReg(unit, SGMII_REG_AN0, &u32dat);
+        u32dat |= BIT(9);
+        u32dat |= BIT(15);
+        aml_writeReg(unit, SGMII_REG_AN0, u32dat);
+    }
+
+    /* bypass flow control to MAC */
+    aml_writeReg(unit, MSG_RX_LIK_STS_0, 0x01010107);
+    aml_writeReg(unit, MSG_RX_LIK_STS_2, 0x00000EEF);
+
+    return ret;
+}
+
+/* FUNCTION NAME: air_port_setRmiiMode
+ * PURPOSE:
+ *      Set the port5 RMII mode for 100Mbps or 10Mbps
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      speed           --  AIR_PORT_SPEED_10M:  10Mbps
+ *                          AIR_PORT_SPEED_100M: 100Mbps
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setRmiiMode(
+    const UI32_T unit,
+    const UI32_T speed)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for speed checking */
+    AIR_PARAM_CHK((speed >= AIR_PORT_SPEED_1000M), AIR_E_BAD_PARAMETER);
+
+    if(AIR_PORT_SPEED_100M == speed)
+    {
+        aml_writeReg(unit, PMCR(5), 0x93159000);
+        aml_writeReg(unit, RG_P5MUX_MODE, 0x301);
+        aml_writeReg(unit, RG_FORCE_CKDIR_SEL, 0x101);
+        aml_writeReg(unit, RG_SWITCH_MODE, 0x101);
+        aml_writeReg(unit, RG_FORCE_MAC5_SB, 0x1010101);
+        aml_writeReg(unit, CSR_RMII, 0x420102);
+        aml_writeReg(unit, RG_RGMII_TXCK_C, 0x1100910);
+    }
+    else
+    {
+        aml_writeReg(unit, PMCR(5), 0x83159000);
+        aml_writeReg(unit, RG_P5MUX_MODE, 0x301);
+        aml_writeReg(unit, RG_FORCE_CKDIR_SEL, 0x101);
+        aml_writeReg(unit, RG_SWITCH_MODE, 0x101);
+        aml_writeReg(unit, RG_FORCE_MAC5_SB, 0x1000101);
+        aml_writeReg(unit, CSR_RMII, 0x420102);
+        aml_writeReg(unit, RG_RGMII_TXCK_C, 0x1100910);
+    }
+
+    return ret;
+}
+
+/* FUNCTION NAME: air_port_setRgmiiMode
+ * PURPOSE:
+ *      Set the port5 RGMII mode for 1Gbps or 100Mbps or 10Mbps
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      speed           --  AIR_PORT_SPEED_10M:   10Mbps
+ *                          AIR_PORT_SPEED_100M:  100Mbps
+ *                          AIR_PORT_SPEED_1000M: 1Gbps
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_port_setRgmiiMode(
+    const UI32_T unit,
+    const UI32_T speed)
+{
+    AIR_ERROR_NO_T ret = AIR_E_OK;
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for speed checking */
+    AIR_PARAM_CHK((speed >= AIR_PORT_SPEED_2500M), AIR_E_BAD_PARAMETER);
+
+    if(AIR_PORT_SPEED_1000M == speed)
+    {
+        aml_writeReg(unit, PMCR(5), 0xa3159000);
+        aml_writeReg(unit, RG_FORCE_MAC5_SB, 0x20101);
+    }
+    else if(AIR_PORT_SPEED_100M == speed)
+    {
+        aml_writeReg(unit, PMCR(5), 0x93159000);
+        aml_writeReg(unit, RG_FORCE_MAC5_SB, 0x10101);
+    }
+    else
+    {
+        aml_writeReg(unit, PMCR(5), 0x83159000);
+        aml_writeReg(unit, RG_FORCE_MAC5_SB, 0x101);
+    }
+
+    return ret;
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_qos.c b/feed/app/switch/src/an8855_sdk/api/src/air_qos.c
new file mode 100644
index 0000000..c3829c8
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_qos.c
@@ -0,0 +1,1495 @@
+/* FILE NAME: air_qos.c
+ * PURPOSE:
+ *      Define the Quailty of Service function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+ /* INCLUDE FILE DECLARATIONS
+ */
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+
+/* GLOBAL VARIABLE DECLARATIONS
+ */
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+ */
+
+/* STATIC VARIABLE DECLARATIONS
+ */
+
+/* LOCAL SUBPROGRAM BODIES
+ */
+
+/* EXPORTED SUBPROGRAM BODIES
+ */
+
+/* FUNCTION NAME:   air_qos_setScheduleAlgo
+ * PURPOSE:
+ *      Set schedule mode of a port queue.
+ * INPUT:
+ *      unit                 -- Device unit number
+ *      port                 -- Port id
+ *      queue                -- Queue id
+ *      sch_mode             -- AIR_QOS_SCH_MODE_T
+ *      weight               -- weight for WRR/WFQ
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK             -- Operation success.
+ *      AIR_E_BAD_PARAMETER  -- Parameter is wrong.
+ * NOTES:
+ *      Weight default value is 1, only for WRR/WFQ mode
+ */
+AIR_ERROR_NO_T
+air_qos_setScheduleAlgo(
+    const UI32_T unit,
+    const UI32_T port,
+    const UI32_T                queue,
+    const AIR_QOS_SCH_MODE_T    sch_mode,
+    const UI32_T                weight)
+{
+    UI32_T rc = AIR_E_OK;
+    UI32_T mac_port = 0;
+    AIR_QOS_SHAPER_MIN_T min_v;
+    AIR_QOS_SHAPER_MAX_T max_v;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((queue >= AIR_QOS_QUEUE_MAX_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((sch_mode >= AIR_QOS_SCH_MODE_LAST), AIR_E_BAD_PARAMETER);
+    if (AIR_QOS_SHAPER_NOSETTING != weight)
+    {
+        AIR_PARAM_CHK(((weight >  AIR_QOS_SHAPER_RATE_MAX_WEIGHT) || 
+            (weight <  AIR_QOS_SHAPER_RATE_MIN_WEIGHT)), AIR_E_BAD_PARAMETER);
+    }
+    mac_port = port;
+    min_v.byte = 0;
+    max_v.byte = 0;
+     /*Read register data*/
+    switch(queue)
+    {
+        case AIR_QOS_QUEUE_0:
+            rc += aml_readReg(unit, MMSCR0_Q0(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q0(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_1:
+            rc += aml_readReg(unit, MMSCR0_Q1(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q1(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_2:
+            rc += aml_readReg(unit, MMSCR0_Q2(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q2(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_3:
+            rc += aml_readReg(unit, MMSCR0_Q3(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q3(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_4:
+            rc += aml_readReg(unit, MMSCR0_Q4(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q4(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_5:
+            rc += aml_readReg(unit, MMSCR0_Q5(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q5(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_6:
+            rc += aml_readReg(unit, MMSCR0_Q6(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q6(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_7:
+            rc += aml_readReg(unit, MMSCR0_Q7(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q7(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        default:
+            AIR_PRINT("Not Support this queue %d num, please check again\n", queue);
+            return AIR_E_BAD_PARAMETER;
+    }
+
+    /*Get para*/
+    switch(sch_mode)
+    {
+        case AIR_QOS_SCH_MODE_SP:
+            min_v.raw.min_sp_wrr_q = 1;
+            min_v.raw.min_rate_en = 0;
+            break;
+
+        case AIR_QOS_SCH_MODE_WRR:
+            min_v.raw.min_sp_wrr_q = 0;
+            min_v.raw.min_rate_en = 0;
+            min_v.raw.min_weight = weight - 1;
+            break;
+
+        case AIR_QOS_SCH_MODE_WFQ:
+            min_v.raw.min_sp_wrr_q = 1;
+            min_v.raw.min_rate_en = 1;
+            min_v.raw.min_rate_man = 0;
+            min_v.raw.min_rate_exp = 0;
+
+            max_v.raw.max_rate_en = 0;
+            max_v.raw.max_sp_wfq_q = 0;
+            max_v.raw.max_weight = weight - 1;
+            break;
+        default:
+            AIR_PRINT("Not Support this mode %d num, please check again\n", sch_mode);
+            return AIR_E_BAD_PARAMETER;
+    }
+
+    /*Send to driver*/
+    switch(queue)
+    {
+        case AIR_QOS_QUEUE_0:
+            rc += aml_writeReg(unit, MMSCR0_Q0(mac_port), min_v.byte);
+            rc += aml_writeReg(unit, MMSCR1_Q0(mac_port), max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Set port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_1:
+            rc += aml_writeReg(unit, MMSCR0_Q1(mac_port), min_v.byte);
+            rc += aml_writeReg(unit, MMSCR1_Q1(mac_port), max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Set port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_2:
+            rc += aml_writeReg(unit, MMSCR0_Q2(mac_port), min_v.byte);
+            rc += aml_writeReg(unit, MMSCR1_Q2(mac_port), max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Set port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_3:
+            rc += aml_writeReg(unit, MMSCR0_Q3(mac_port), min_v.byte);
+            rc += aml_writeReg(unit, MMSCR1_Q3(mac_port), max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Set port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_4:
+            rc += aml_writeReg(unit, MMSCR0_Q4(mac_port), min_v.byte);
+            rc += aml_writeReg(unit, MMSCR1_Q4(mac_port), max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Set port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_5:
+            rc += aml_writeReg(unit, MMSCR0_Q5(mac_port), min_v.byte);
+            rc += aml_writeReg(unit, MMSCR1_Q5(mac_port), max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Set port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_6:
+            rc += aml_writeReg(unit, MMSCR0_Q6(mac_port), min_v.byte);
+            rc += aml_writeReg(unit, MMSCR1_Q6(mac_port), max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Set port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_7:
+            rc += aml_writeReg(unit, MMSCR0_Q7(mac_port), min_v.byte);
+            rc += aml_writeReg(unit, MMSCR1_Q7(mac_port), max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Set port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        default:
+            AIR_PRINT("Not Support this queue %d num, please check again\n", queue);
+            return AIR_E_BAD_PARAMETER;
+    }
+    AIR_PRINT("Set schedule mode success,port is %d, queue is %d, min hex is %x, max hex is %x\n", port, queue, min_v.byte, max_v.byte);
+
+    return rc;
+}
+
+/* FUNCTION NAME: air_qos_getScheduleAlgo
+ * PURPOSE:
+ *      Get schedule mode of a port queue.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Port id
+ *      queue           --  Queue id
+ * OUTPUT:
+ *      ptr_sch_mode    --  AIR_QOS_SCH_MODE_T
+ *      ptr_weight      --  weight for WRR/WFQ
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *     None
+ */
+AIR_ERROR_NO_T
+air_qos_getScheduleAlgo(
+    const UI32_T          unit,
+    const UI32_T          port,
+    const UI32_T          queue,
+    AIR_QOS_SCH_MODE_T    *ptr_sch_mode,
+    UI32_T                *ptr_weight)
+{
+    UI32_T rc = AIR_E_OK;
+    UI32_T mac_port = 0;
+    AIR_QOS_SHAPER_MIN_T min_v;
+    AIR_QOS_SHAPER_MAX_T max_v;
+
+    /*Read register data*/
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((queue >= AIR_QOS_QUEUE_MAX_NUM), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_sch_mode);
+    AIR_CHECK_PTR(ptr_weight);
+    
+    mac_port = port;
+    min_v.byte = 0;
+    max_v.byte = 0;
+
+    switch(queue)
+    {
+        case AIR_QOS_QUEUE_0:
+            rc += aml_readReg(unit, MMSCR0_Q0(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q0(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_1:
+            rc += aml_readReg(unit, MMSCR0_Q1(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q1(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_2:
+            rc += aml_readReg(unit, MMSCR0_Q2(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q2(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_3:
+            rc += aml_readReg(unit, MMSCR0_Q3(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q3(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_4:
+            rc += aml_readReg(unit, MMSCR0_Q4(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q4(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_5:
+            rc += aml_readReg(unit, MMSCR0_Q5(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q5(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_6:
+            rc += aml_readReg(unit, MMSCR0_Q6(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q6(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        case AIR_QOS_QUEUE_7:
+            rc += aml_readReg(unit, MMSCR0_Q7(mac_port), &min_v.byte);
+            rc += aml_readReg(unit, MMSCR1_Q7(mac_port), &max_v.byte);
+            if(AIR_E_OK != rc)
+            {
+                AIR_PRINT("Get port %d queue %d failed, rc is %d", port, queue, rc);
+                return AIR_E_OTHERS;
+            }
+            break;
+
+        default:
+            AIR_PRINT("Not Support this queue %d num, please check again", queue);
+            return AIR_E_BAD_PARAMETER;
+    }
+
+    /*Send para*/
+    if ((min_v.raw.min_rate_en) && AIR_QOS_MAX_TRAFFIC_ARBITRATION_SCHEME_WFQ == max_v.raw.max_sp_wfq_q)
+    {
+        *ptr_sch_mode = AIR_QOS_SCH_MODE_WFQ;
+        *ptr_weight = max_v.raw.max_weight + 1;
+    }
+    else
+    {
+        if(AIR_QOS_MIN_TRAFFIC_ARBITRATION_SCHEME_WRR == min_v.raw.min_sp_wrr_q)
+        {
+            *ptr_sch_mode = AIR_QOS_SCH_MODE_WRR;
+            *ptr_weight = min_v.raw.min_weight + 1;
+        }
+        else if(AIR_QOS_MIN_TRAFFIC_ARBITRATION_SCHEME_SP == min_v.raw.min_sp_wrr_q)
+        {
+            *ptr_sch_mode = AIR_QOS_SCH_MODE_SP;
+            *ptr_weight = AIR_QOS_SHAPER_NOSETTING;
+        }
+    }
+    AIR_PRINT("Get schedule mode success,port is %d, queue is %d, min hex is %x, max hex is %x\n", port, queue, min_v.byte, max_v.byte);
+
+    return rc;
+}
+
+/* FUNCTION NAME:   air_qos_setTrustMode
+ * PURPOSE:
+ *      Set qos trust mode value.
+ * INPUT:
+ *      unit                 -- Device unit number
+ *      port                  -.Select port number
+ *      mode                 -- Qos support mode
+ *                              AIR_QOS_TRUST_MODE_T
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK             -- Operation success.
+ *      AIR_E_BAD_PARAMETER  -- Parameter is wrong.
+ * NOTES:
+ *      None
+ */
+
+AIR_ERROR_NO_T
+air_qos_setTrustMode(
+    const UI32_T                    unit,
+    const UI32_T                    port,
+    const AIR_QOS_TRUST_MODE_T      mode)
+
+{
+    UI32_T rc = AIR_E_OTHERS;
+    AIR_QOS_QUEUE_UPW_T stat;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((mode >= AIR_QOS_TRUST_MODE_LAST), AIR_E_BAD_PARAMETER);
+
+    stat.byte = 0;
+    /*get register val*/
+    rc = aml_readReg(unit, PUPW(port), &(stat.byte));
+    AIR_PRINT("[Dbg]: get port %d rate trust weight success, UPW hex is %x\n", port, stat.byte);
+    stat.byte = AIR_QOS_QUEUE_DEFAULT_VAL;
+    if(AIR_E_OK == rc)
+    {
+        switch(mode)
+        {
+            case AIR_QOS_TRUST_MODE_PORT:
+                stat.raw.csr_port_weight = AIR_QOS_QUEUE_TRUST_HIGH_WEIGHT;
+                break;
+
+            case AIR_QOS_TRUST_MODE_1P_PORT:
+                stat.raw.csr_1p_weight = AIR_QOS_QUEUE_TRUST_HIGH_WEIGHT;
+                stat.raw.csr_port_weight = AIR_QOS_QUEUE_TRUST_MID_WEIGHT;
+                break;
+
+            case AIR_QOS_TRUST_MODE_DSCP_PORT:
+                stat.raw.csr_dscp_weight = AIR_QOS_QUEUE_TRUST_HIGH_WEIGHT;
+                stat.raw.csr_port_weight = AIR_QOS_QUEUE_TRUST_MID_WEIGHT;
+                break;
+
+            case AIR_QOS_TRUST_MODE_DSCP_1P_PORT:
+                stat.raw.csr_dscp_weight = AIR_QOS_QUEUE_TRUST_HIGH_WEIGHT;
+                stat.raw.csr_1p_weight = AIR_QOS_QUEUE_TRUST_MID_WEIGHT;
+                stat.raw.csr_port_weight = AIR_QOS_QUEUE_TRUST_LOW_WEIGHT;
+                break;
+
+            default:
+                AIR_PRINT("Not Support this mode %d yet\n", mode);
+                return AIR_E_BAD_PARAMETER;
+
+        }
+    }
+
+    /*set register val*/
+    rc = aml_writeReg(unit, PUPW(port), stat.byte);
+    if(AIR_E_OK != rc)
+    {
+        AIR_PRINT("[Dbg]: set port %d rate trust mode failed  rc is %d\n", port, rc);
+    }
+    else
+    {
+        AIR_PRINT("[Dbg]: set port %d rate trust mode %d weight success, UPW hex is %x\n", port, mode, stat.byte);
+    }
+    return rc;
+}
+
+/* FUNCTION NAME: air_qos_getTrustMode
+ * PURPOSE:
+ *      Get qos trust mode value.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port              -.Select port number
+ * OUTPUT:
+ *      ptr_weight      --  All Qos weight value
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getTrustMode(
+    const UI32_T unit,
+    const UI32_T                    port,
+    AIR_QOS_TRUST_MODE_T *const ptr_mode)
+
+{
+    UI32_T rc = AIR_E_OTHERS;
+    AIR_QOS_QUEUE_UPW_T stat;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_mode);
+
+    /*get register val*/
+    stat.byte = 0;
+    *ptr_mode = AIR_QOS_TRUST_MODE_1P_PORT;
+    rc = aml_readReg(unit, PUPW(port), &(stat.byte));
+    if(AIR_E_OK != rc)
+    {
+        AIR_PRINT("[Dbg]: get port %d rate trust mode failed  rc is %d\n",port, rc);
+    }
+    else
+    {
+        if (AIR_QOS_QUEUE_TRUST_HIGH_WEIGHT == stat.raw.csr_1p_weight)
+        {
+            *ptr_mode = AIR_QOS_TRUST_MODE_1P_PORT;
+        }
+        else if (AIR_QOS_QUEUE_TRUST_HIGH_WEIGHT == stat.raw.csr_dscp_weight)
+        {
+            if (AIR_QOS_QUEUE_TRUST_MID_WEIGHT == stat.raw.csr_1p_weight)
+            {
+                *ptr_mode = AIR_QOS_TRUST_MODE_DSCP_1P_PORT;
+            }
+            else if (AIR_QOS_QUEUE_TRUST_MID_WEIGHT == stat.raw.csr_port_weight)
+            {
+                *ptr_mode = AIR_QOS_TRUST_MODE_DSCP_PORT;
+            }
+        }
+        else if (AIR_QOS_QUEUE_TRUST_HIGH_WEIGHT == stat.raw.csr_port_weight)
+        {
+            *ptr_mode = AIR_QOS_TRUST_MODE_PORT;
+        }
+        else
+        {
+            AIR_PRINT("[Dbg]: port %d Not support this trust mode, UPW hex is %x\n", port, stat.byte);
+        }
+    }
+    AIR_PRINT("[Dbg]: port %d get trust mode success, UPW hex is %x\n", port, stat.byte);
+    return rc;
+}
+
+/* FUNCTION NAME: air_qos_setPri2Queue
+ * PURPOSE:
+ *      Set per port priority to out queue.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      pri             --  Qos pri value
+ *      queue           --  Qos Queue value
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setPri2Queue(
+    const UI32_T unit,
+    const UI32_T pri,
+    const UI32_T queue)
+{
+    UI32_T rc = AIR_E_OTHERS;
+    AIR_QOS_QUEUE_PEM_T stat;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((queue >= AIR_QOS_QUEUE_MAX_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((pri >= AIR_QOS_QUEUE_MAX_NUM), AIR_E_BAD_PARAMETER);
+
+    stat.byte = 0;
+    /*get register val*/
+    switch(pri / 2)
+    {
+        case 0:
+            rc = aml_readReg(unit, PEM1, &stat.byte);
+            if(AIR_E_OK == rc)
+            {
+                if (1 == pri % 2)
+                {
+                    stat.raw.csr_que_cpu_h = queue;
+                }
+                else
+                {
+                     stat.raw.csr_que_cpu_l = queue;
+                }
+            }
+            rc = aml_writeReg(unit, PEM1, stat.byte);
+            break;
+
+        case 1:
+            rc = aml_readReg(unit, PEM2, &stat.byte);
+            if(AIR_E_OK == rc)
+            {
+                if (1 == pri % 2)
+                {
+                    stat.raw.csr_que_cpu_h = queue;
+                }
+                else
+                {
+                    stat.raw.csr_que_cpu_l = queue;
+                }
+            }
+            rc = aml_writeReg(unit, PEM2, stat.byte);
+            break;
+
+        case 2:
+            rc = aml_readReg(unit, PEM3, &stat.byte);
+            if(AIR_E_OK == rc)
+            {
+                if (1 == pri % 2)
+                {
+                    stat.raw.csr_que_cpu_h = queue;
+                }
+                else
+                {
+                    stat.raw.csr_que_cpu_l = queue;
+                }
+            }
+            rc = aml_writeReg(unit, PEM3, stat.byte);
+            break;
+
+        case 3:
+            rc = aml_readReg(unit, PEM4, &stat.byte);
+            if(AIR_E_OK == rc)
+            {
+                if (1 == pri % 2)
+                {
+                    stat.raw.csr_que_cpu_h = queue;
+                }
+                else
+                {
+                    stat.raw.csr_que_cpu_l = queue;
+                }
+            }
+            rc = aml_writeReg(unit, PEM4, stat.byte);
+            break;
+
+        default:
+            AIR_PRINT("[Dbg]: Not Support this pri %d yet\n", pri);
+            return AIR_E_BAD_PARAMETER;
+    }
+    AIR_PRINT("[Dbg]: set pri %d to queue %d success, PEM hex is %x\n"
+        , pri, queue, stat.byte);
+    return rc;
+}
+
+/* FUNCTION NAME: air_qos_getPri2Queue
+ * PURPOSE:
+ *      Get per port priority to out queue.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      pri             --  Qos pri value
+ *
+ * OUTPUT:
+ *      ptr_queue       --  Select out queue (0..7)
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getPri2Queue(
+    const UI32_T unit,
+    const UI32_T pri,
+    UI32_T *const ptr_queue)
+{
+    UI32_T rc = AIR_E_OTHERS;
+    AIR_QOS_QUEUE_PEM_T stat;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((pri >= AIR_QOS_QUEUE_MAX_NUM), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_queue);
+
+   /*get register val*/
+    stat.byte = 0;
+    switch(pri / 2)
+    {
+        case 0:
+            rc = aml_readReg(unit, PEM1, &stat.byte);
+            if(AIR_E_OK == rc)
+            {
+                if (1 == pri % 2)
+                {
+                    *ptr_queue = stat.raw.csr_que_cpu_h;
+                }
+                else
+                {
+                    *ptr_queue = stat.raw.csr_que_cpu_l;
+                }
+            }
+            break;
+
+        case 1:
+            rc = aml_readReg(unit, PEM2, &stat.byte);
+            if(AIR_E_OK == rc)
+            {
+                if (1 == pri % 2)
+                {
+                    *ptr_queue = stat.raw.csr_que_cpu_h;
+                }
+                else
+                {
+                    *ptr_queue = stat.raw.csr_que_cpu_l;
+                }
+            }
+            break;
+
+        case 2:
+            rc = aml_readReg(unit, PEM3, &stat.byte);
+            if(AIR_E_OK == rc)
+            {
+                if (1 == pri % 2)
+                {
+                    *ptr_queue = stat.raw.csr_que_cpu_h;
+                }
+                else
+                {
+                    *ptr_queue = stat.raw.csr_que_cpu_l;
+                }
+            }
+            break;
+
+        case 3:
+            rc = aml_readReg(unit, PEM4, &stat.byte);
+            if(AIR_E_OK == rc)
+            {
+                if (1 == pri % 2)
+                {
+                    *ptr_queue = stat.raw.csr_que_cpu_h;
+                }
+                else
+                {
+                    *ptr_queue = stat.raw.csr_que_cpu_l;
+                }
+            }
+            break;
+
+        default:
+            AIR_PRINT("[Dbg]: Not Support this pri %d yet\n", pri);
+            return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK != rc)
+    {
+        AIR_PRINT("[Dbg]: get pri to queue failed  rc is %d\n", rc);
+    }
+
+    AIR_PRINT("[Dbg]: get pri %d to queue %d mode success, PEM hex is %x\n"
+        , pri, *ptr_queue, stat.byte);
+    return rc;
+}
+
+/* FUNCTION NAME: air_qos_setDscp2Pri
+ * PURPOSE:
+ *      Set DSCP mapping to priority.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      dscp            --  Select DSCP value (0..63)
+ *      priority        --  Select priority (0..7)
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setDscp2Pri(
+    const UI32_T unit,
+    const UI32_T dscp,
+    const UI32_T pri)
+{
+    UI32_T rc = AIR_E_OTHERS;
+    UI32_T reg = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((dscp >= AIR_QOS_QUEUE_DSCP_MAX_NUM), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((pri >= AIR_QOS_QUEUE_MAX_NUM), AIR_E_BAD_PARAMETER);
+
+    /*get register val*/
+    switch (dscp/10)
+    {
+        case 0:
+            rc = aml_readReg(unit, PIM1, &reg);
+            if(AIR_E_OK == rc)
+            {
+                reg &= ~(AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10));
+                reg |= pri << 3 * (dscp % 10);
+                rc = aml_writeReg(unit, PIM1, reg);
+            }
+            break;
+
+        case 1:
+            rc = aml_readReg(unit, PIM2, &reg);
+            if(AIR_E_OK == rc)
+            {
+                reg &= ~(AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10));
+                reg |= pri << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+                rc = aml_writeReg(unit, PIM2, reg);
+            }
+            break;
+
+        case 2:
+            rc = aml_readReg(unit, PIM3, &reg);
+            if(AIR_E_OK == rc)
+            {
+                reg &= ~(AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10));
+                reg |= pri << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+                rc = aml_writeReg(unit, PIM3, reg);
+            }
+            break;
+
+        case 3:
+            rc = aml_readReg(unit, PIM4, &reg);
+            if(AIR_E_OK == rc)
+            {
+                reg &= ~(AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10));
+                reg |= pri << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+                rc = aml_writeReg(unit, PIM4, reg);
+            }
+            break;
+
+        case 4:
+            rc = aml_readReg(unit, PIM5, &reg);
+            if(AIR_E_OK == rc)
+            {
+                reg &= ~(AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10));
+                reg |= pri << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+                rc = aml_writeReg(unit, PIM5, reg);
+            }
+            break;
+
+        case 5:
+            rc = aml_readReg(unit, PIM6, &reg);
+            if(AIR_E_OK == rc)
+            {
+                reg &= ~(AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10));
+                reg |= pri << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+                rc = aml_writeReg(unit, PIM6, reg);
+            }
+            break;
+
+        case 6:
+            rc = aml_readReg(unit, PIM7, &reg);
+            if(AIR_E_OK == rc)
+            {
+                reg &= ~(AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10));
+                reg |= pri << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+                rc = aml_writeReg(unit, PIM7, reg);
+            }
+            break;
+
+        default:
+            AIR_PRINT("Not Support this dscp %d to pri, rc is %d\n", dscp, rc);
+            return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK != rc)
+    {
+        AIR_PRINT("set dscp to pri failed ,rc is %d\n", rc);
+    }
+    else
+    {
+        AIR_PRINT("set dscp  %u to pri %u success, PIM hex is %x\n", dscp, pri, reg);
+    }
+    return rc;
+}
+
+/* FUNCTION NAME: air_qos_getDscp2Pri
+ * PURPOSE:
+ *      Get DSCP mapping priority.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      dscp            --  Select DSCP value (0..63)
+ *
+ * OUTPUT:
+ *      ptr_pri         --  Priority value (0..7)
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getDscp2Pri(
+    const UI32_T unit,
+    const UI32_T dscp,
+    UI32_T * const ptr_pri)
+{
+    UI32_T rc = AIR_E_OTHERS;
+    UI32_T reg = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((dscp >= AIR_QOS_QUEUE_DSCP_MAX_NUM), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_pri);
+
+    /*get register val*/
+    switch (dscp/10)
+    {
+        case 0:
+            rc = aml_readReg(unit, PIM1, &reg);
+            if(AIR_E_OK == rc)
+            {
+                *ptr_pri = (reg & (AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10)))
+                    >> AIR_QOS_QUEUE_PIM_WIDTH  * (dscp % 10);
+            }
+            break;
+
+        case 1:
+            rc = aml_readReg(unit, PIM2, &reg);
+            if(AIR_E_OK == rc)
+            {
+                *ptr_pri = (reg & (AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10)))
+                    >> AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+            }
+            break;
+
+        case 2:
+            rc = aml_readReg(unit, PIM3, &reg);
+            if(AIR_E_OK == rc)
+            {
+                *ptr_pri = (reg & (AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10)))
+                    >> AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+            }
+            break;
+
+        case 3:
+            rc = aml_readReg(unit, PIM4, &reg);
+            if(AIR_E_OK == rc)
+            {
+                *ptr_pri = (reg & (AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10)))
+                    >> AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+            }
+            break;
+
+        case 4:
+            rc = aml_readReg(unit, PIM5, &reg);
+            if(AIR_E_OK == rc)
+            {
+                *ptr_pri = (reg & (AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10)))
+                    >> AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+            }
+            break;
+
+        case 5:
+            rc = aml_readReg(unit, PIM6, &reg);
+            if(AIR_E_OK == rc)
+            {
+                *ptr_pri = (reg & (AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10)))
+                    >> AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+            }
+            break;
+
+        case 6:
+            rc = aml_readReg(unit, PIM7, &reg);
+            if(AIR_E_OK == rc)
+            {
+                *ptr_pri = (reg & (AIR_QOS_QUEUE_PIM_MASK << AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10)))
+                    >> AIR_QOS_QUEUE_PIM_WIDTH * (dscp % 10);
+            }
+            break;
+
+        default:
+            AIR_PRINT("Not Support this dscp %d to pri, rc is %d\n", dscp, rc);
+            return AIR_E_BAD_PARAMETER;
+    }
+
+    if(AIR_E_OK != rc)
+    {
+        AIR_PRINT("[Dbg]: get dscp %d to pri failed, rc is %d\n", dscp, rc);
+    }
+
+    AIR_PRINT("[Dbg]: get dscp %u to pri %d success, PIM hex is %d \n", dscp, *ptr_pri, reg);
+    return rc;
+}
+
+/* FUNCTION NAME: air_qos_setRateLimitEnable
+ * PURPOSE:
+ *      Enable or disable port rate limit.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number (0..6)
+ *      dir             --  AIR_QOS_RATE_DIR_INGRESS
+ *                          AIR_QOS_RATE_DIR_EGRESS
+ *      rate_en         --  TRUE: eanble rate limit
+ *                          FALSE: disable rate limit
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setRateLimitEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_QOS_RATE_DIR_T dir,
+    const BOOL_T enable)
+{
+    UI32_T u32dat = 0, reg = 0;
+    UI32_T u32glo = 0, greg = 0;
+    UI32_T mac_port = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((dir >= AIR_QOS_RATE_DIR_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((enable != TRUE && enable != FALSE), AIR_E_BAD_PARAMETER);
+
+    mac_port = port;
+    if(AIR_QOS_RATE_DIR_EGRESS == dir)
+    {
+        reg = ERLCR(mac_port);
+        greg = GERLCR;
+    }
+    else if (AIR_QOS_RATE_DIR_INGRESS == dir)
+    {
+        reg = IRLCR(mac_port);
+        greg = GIRLCR;
+    }
+    else
+    {
+        AIR_PRINT("Not Support this dir %d yet\n", dir);
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    aml_readReg(unit, reg, &u32dat);
+    if(TRUE == enable)
+    {
+        u32dat |= BIT(REG_RATE_EN_OFFT);
+        /* Enable tobke bucket mode */
+        u32dat |= BIT(REG_TB_EN_OFFT);
+    }
+    else
+    {
+        u32dat &= ~(BIT(REG_RATE_EN_OFFT));
+        /* Disable tobke bucket mode */
+        u32dat &= ~(BIT(REG_TB_EN_OFFT));
+    }
+    aml_writeReg(unit, reg, u32dat);
+
+    /* Rate include preamble/IPG/CRC */
+    aml_readReg(unit, greg, &u32glo);
+    u32glo &= ~(BITS_RANGE(REG_IPG_BYTE_OFFT, REG_IPG_BYTE_LENG));
+    u32glo |= AIR_QOS_L1_RATE_LIMIT;
+    aml_writeReg(unit, greg, u32glo);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_qos_getRateLimitEnable
+ * PURPOSE:
+ *      Get port rate limit state.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number (0..6)
+ *      dir              -- AIR_QOS_RATE_DIR_T
+ * OUTPUT:
+ *      ptr_enable        --  TRUE: eanble rate limit
+ *                          FALSE: disable rate limit
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getRateLimitEnable(
+    const UI32_T                unit,
+    const UI32_T                port,
+    const AIR_QOS_RATE_DIR_T    dir,
+    BOOL_T                      *ptr_enable)
+{
+    UI32_T u32dat = 0, reg = 0, ret = 0;
+    UI32_T mac_port = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((dir >= AIR_QOS_RATE_DIR_LAST), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_enable);
+
+    mac_port = port;
+    /* Get ingress / egress register value */
+    if(AIR_QOS_RATE_DIR_EGRESS == dir)
+    {
+        reg = ERLCR(mac_port);
+    }
+    else
+    {
+        reg = IRLCR(mac_port);
+    }
+    aml_readReg(unit, reg, &u32dat);
+
+    ret = (u32dat & BIT(REG_RATE_EN_OFFT));
+    if(!ret)
+    {
+        *ptr_enable = FALSE;
+    }
+    else
+    {
+        *ptr_enable = TRUE;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_qos_setRateLimit
+ * PURPOSE:
+ *      Set per port rate limit.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      ptr_cfg         --  AIR_QOS_RATE_LIMIT_CFG_T
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setRateLimit(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_QOS_RATE_LIMIT_CFG_T    *ptr_cfg)
+{
+    UI32_T u32dat = 0;
+    UI32_T mac_port = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_cfg);
+    AIR_PARAM_CHK((ptr_cfg->egress_cbs >= AIR_QOS_MAX_TOKEN), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((ptr_cfg->ingress_cbs >= AIR_QOS_MAX_TOKEN), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((ptr_cfg->egress_cir >= AIR_QOS_MAX_CIR), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((ptr_cfg->ingress_cir >= AIR_QOS_MAX_CIR), AIR_E_BAD_PARAMETER);
+
+    mac_port = port;
+    /* For Egress rate setting */
+    /* Set egress rate CIR */
+    aml_readReg(unit, ERLCR(mac_port), &u32dat);
+    u32dat &= ~ BITS_RANGE(REG_RATE_CIR_OFFT, REG_RATE_CIR_LENG);
+    u32dat |= ptr_cfg->egress_cir;
+    /* Set egress rate CBS */
+    u32dat &= ~ BITS_RANGE(REG_RATE_CBS_OFFT, REG_RATE_CBS_LENG);
+    u32dat |= BITS_OFF_L(ptr_cfg->egress_cbs, REG_RATE_CBS_OFFT, REG_RATE_CBS_LENG);
+    /* Enable tobke bucket mode */
+    u32dat |= BIT(REG_TB_EN_OFFT);
+    /* Set token period to 4ms */
+    u32dat &= ~ BITS_RANGE(REG_RATE_TB_OFFT, REG_RATE_TB_LENG);
+    u32dat |= BITS_OFF_L(AIR_QOS_TOKEN_PERIOD_4MS, REG_RATE_TB_OFFT, REG_RATE_TB_LENG);
+    if(ptr_cfg->flags & AIR_QOS_RATE_LIMIT_CFG_FLAGS_ENABLE_EGRESS)
+    {
+        /* Enable ratelimit mode*/
+        u32dat |= BIT(REG_RATE_EN_OFFT);
+    }
+    aml_writeReg(unit, ERLCR(mac_port), u32dat);
+
+
+    /* For Ingress rate setting */
+    /* Set ingress rate CIR */
+    aml_readReg(unit, IRLCR(mac_port), &u32dat);
+    u32dat &= ~ BITS_RANGE(REG_RATE_CIR_OFFT, REG_RATE_CIR_LENG);
+    u32dat |= ptr_cfg->ingress_cir;
+    /* Set egress rate CBS */
+    u32dat &= ~ BITS_RANGE(REG_RATE_CBS_OFFT, REG_RATE_CBS_LENG);
+    u32dat |= BITS_OFF_L(ptr_cfg->ingress_cbs, REG_RATE_CBS_OFFT, REG_RATE_CBS_LENG);
+    /* Enable tobke bucket mode */
+    u32dat |= BIT(REG_TB_EN_OFFT);
+    /* Set token period to 4ms */
+    u32dat &= ~ BITS_RANGE(REG_RATE_TB_OFFT, REG_RATE_TB_LENG);
+    u32dat |= BITS_OFF_L(AIR_QOS_TOKEN_PERIOD_4MS, REG_RATE_TB_OFFT, REG_RATE_TB_LENG);
+    if(ptr_cfg->flags & AIR_QOS_RATE_LIMIT_CFG_FLAGS_ENABLE_INGRESS)
+    {
+        /* Enable ratelimit mode*/
+        u32dat |= BIT(REG_RATE_EN_OFFT);
+    }
+    aml_writeReg(unit, IRLCR(mac_port), u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_qos_getRateLimit
+ * PURPOSE:
+ *      Get per port rate limit.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *
+ * OUTPUT:
+ *      ptr_cfg          --  AIR_QOS_RATE_LIMIT_CFG_T
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getRateLimit(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_QOS_RATE_LIMIT_CFG_T *ptr_cfg)
+{
+    UI32_T u32dat = 0;
+    UI32_T mac_port = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_cfg);
+
+    mac_port = port;
+    /* For Egress rate info */
+    aml_readReg(unit, ERLCR(mac_port), &u32dat);
+    ptr_cfg->egress_cir = BITS_OFF_R(u32dat, REG_RATE_CIR_OFFT, REG_RATE_CIR_LENG);
+    ptr_cfg->egress_cbs = BITS_OFF_R(u32dat, REG_RATE_CBS_OFFT, REG_RATE_CBS_LENG);
+
+    /* For Ingress rate info */
+    aml_readReg(unit, IRLCR(mac_port), &u32dat);
+    ptr_cfg->ingress_cir = BITS_OFF_R(u32dat, REG_RATE_CIR_OFFT, REG_RATE_CIR_LENG);
+    ptr_cfg->ingress_cbs = BITS_OFF_R(u32dat, REG_RATE_CBS_OFFT, REG_RATE_CBS_LENG);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_qos_setPortPriority
+ * PURPOSE:
+ *      Get poer port based priority.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      priority        --  Select port priority
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setPortPriority(
+    const UI32_T unit,
+    const UI32_T port,
+    const UI32_T priority)
+{
+    UI32_T regPCR = 0;
+    UI32_T mac_port = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((priority >= AIR_QOS_QUEUE_MAX_NUM), AIR_E_BAD_PARAMETER);
+    mac_port = port;
+    aml_readReg(unit, PCR(mac_port), &regPCR);
+    regPCR &= ~PCR_PORT_PRI_MASK;
+    regPCR |= (priority & PCR_PORT_PRI_RELMASK) << PCR_PORT_PRI_OFFT;
+    aml_writeReg(unit, PCR(mac_port), regPCR);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_qos_getPortPriority
+ * PURPOSE:
+ *      Set per port based priority.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *
+ * OUTPUT:
+ *      ptr_pri         --  Get port based priority
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getPortPriority(
+    const UI32_T unit,
+    const UI32_T port,
+    UI32_T *ptr_pri)
+{
+    UI32_T regPCR = 0;
+    UI32_T mac_port = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_pri);
+    mac_port = port;
+    aml_readReg(unit, PCR(mac_port), &regPCR);
+    *ptr_pri = (regPCR >> PCR_PORT_PRI_OFFT) & PCR_PORT_PRI_RELMASK;
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_qos_setRateLimitExMngFrm
+ * PURPOSE:
+ *      Set rate limit control exclude/include management frames.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      dir             --  AIR_RATE_DIR_INGRESS
+ *                          AIR_RATE_DIR_EGRESS
+ *      exclude         --  TRUE: Exclude management frame
+ *                          FALSE:Include management frame
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_setRateLimitExMngFrm(
+    const UI32_T unit,
+    const AIR_QOS_RATE_DIR_T dir,
+    const BOOL_T exclude)
+{
+    UI32_T u32dat = 0, reg = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((dir != AIR_QOS_RATE_DIR_EGRESS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != exclude) && (FALSE != exclude)), AIR_E_BAD_PARAMETER);
+
+    reg = GERLCR;
+    /* Set to register */
+    aml_readReg(unit, reg, &u32dat);
+    if(TRUE == exclude)
+    {
+        u32dat |= BIT(REG_MFRM_EX_OFFT);
+    }
+    else
+    {
+        u32dat &= ~(BIT(REG_MFRM_EX_OFFT));
+    }
+    aml_writeReg(unit, reg, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_qos_getRateLimitExMngFrm
+ * PURPOSE:
+ *      Get rate limit control exclude/include management frames.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      dir             --  AIR_RATE_DIR_INGRESS
+ *                          AIR_RATE_DIR_EGRESS
+ * OUTPUT:
+ *      ptr_exclude     --  TRUE: Exclude management frame
+ *                          FALSE:Include management frame
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_qos_getRateLimitExMngFrm(
+    const UI32_T unit,
+    const AIR_QOS_RATE_DIR_T dir,
+    BOOL_T *ptr_exclude)
+{
+    UI32_T reg = 0, u32dat = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((unit >= AIR_MAX_NUM_OF_UNIT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((dir >= AIR_QOS_RATE_DIR_LAST), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_exclude);
+    
+
+    if(AIR_QOS_RATE_DIR_EGRESS == dir)
+    {
+        reg = GERLCR;
+    }
+    else
+    {
+        reg = GIRLCR;
+    }
+
+    /* Set to register */
+    aml_readReg(unit, reg, &u32dat);
+    if(BITS_OFF_R(u32dat, REG_MFRM_EX_OFFT, REG_MFRM_EX_LENG))
+    {
+        *ptr_exclude = TRUE;
+    }
+    else
+    {
+        *ptr_exclude = FALSE;
+    }
+
+    return AIR_E_OK;
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_sec.c b/feed/app/switch/src/an8855_sdk/api/src/air_sec.c
new file mode 100644
index 0000000..336a14f
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_sec.c
@@ -0,0 +1,593 @@
+/* FILE NAME: air_sec.c
+ * PURPOSE:
+ *      Define the security function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+ */
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+
+/* GLOBAL VARIABLE DECLARATIONS
+ */
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+ */
+
+/* STATIC VARIABLE DECLARATIONS
+ */
+
+/* LOCAL SUBPROGRAM BODIES
+ */
+
+/* EXPORTED SUBPROGRAM BODIES
+ */
+
+/* FUNCTION NAME: air_sec_setStormEnable
+ * PURPOSE:
+ *      Enable or disable per port storm control for specific type.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      type            --  AIR_STORM_TYPE_BCST
+ *                          AIR_STORM_TYPE_MCST
+ *                          AIR_STORM_TYPE_UCST
+ *      storm_en        --  TRUE
+ *                          FALSE
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_setStormEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_STORM_TYPE_T type,
+    const BOOL_T storm_en)
+{
+    UI32_T u32dat = 0, reg = 0, sp_en = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((type >= AIR_STORM_TYPE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((storm_en != TRUE) && (storm_en != FALSE)), AIR_E_BAD_PARAMETER);
+
+    /* Find register BSR:broadcast, BSR_EXT1:multicast, BSR_EXT2:unicast */
+    switch(type)
+    {
+        case AIR_STORM_TYPE_BCST:
+            reg = BSR(port);
+            sp_en = BSR_STORM_BCST_EN;
+            break;
+        case AIR_STORM_TYPE_MCST:
+            reg = BSR_EXT1(port);
+            sp_en = BSR_STORM_MCST_EN;
+            break;
+        case AIR_STORM_TYPE_UCST:
+            reg = BSR_EXT2(port);
+            sp_en = BSR_STORM_UCST_EN;
+            break;
+        default:
+            break;
+    }
+
+    /* Enable specific type */
+    aml_readReg(unit, reg, &u32dat);
+    if(TRUE == storm_en)
+    {
+        u32dat |= (BSR_STORM_DROP_EN | BSR_STORM_RATE_BASED);
+        u32dat |= sp_en;
+    }
+    else
+    {
+        u32dat &= ~(BSR_STORM_DROP_EN | BSR_STORM_RATE_BASED);
+        u32dat &= ~sp_en;
+    }
+    aml_writeReg(unit, reg, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_sec_getStormEnable
+ * PURPOSE:
+ *      Get per port status of storm control for specific type.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      type            --  AIR_STORM_TYPE_BCST
+ *                          AIR_STORM_TYPE_MCST
+ *                          AIR_STORM_TYPE_UCST
+ * OUTPUT:
+ *      ptr_storm_en    --  TRUE
+ *                          FALSE
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_getStormEnable(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_STORM_TYPE_T type,
+    BOOL_T *ptr_storm_en)
+{
+    UI32_T u32dat = 0, reg = 0, en = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((type >= AIR_STORM_TYPE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_storm_en);
+
+    /* Find register BSR:broadcast, BSR_EXT1:multicast, BSR_EXT2:unicast */
+    switch(type)
+    {
+        case AIR_STORM_TYPE_BCST:
+            reg = BSR(port);
+            break;
+        case AIR_STORM_TYPE_MCST:
+            reg = BSR_EXT1(port);
+            break;
+        case AIR_STORM_TYPE_UCST:
+            reg = BSR_EXT2(port);
+            break;
+        default:
+            break;
+    }
+
+    /* Enable specific type */
+    aml_readReg(unit, reg, &u32dat);
+    en = (u32dat & BSR_STORM_DROP_EN);
+    if(FALSE == en)
+    {
+        *ptr_storm_en = FALSE;
+    }
+    else
+    {
+        *ptr_storm_en = TRUE;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_sec_setStormRate
+ * PURPOSE:
+ *      Set per port storm rate limit control for specific type.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      type            --  AIR_STORM_TYPE_BCST
+ *                          AIR_STORM_TYPE_MCST
+ *                          AIR_STORM_TYPE_UCST
+ *      count           --  Count of the unit
+ *                          Range 0..255
+ *                          Rate = (count * unit) bps
+ *      unit            --  AIR_STORM_UNIT_64K
+ *                          AIR_STORM_UNIT_256K
+ *                          AIR_STORM_UNIT_1M
+ *                          AIR_STORM_UNIT_4M
+ *                          AIR_STORM_UNIT_16M
+                            AIR_STORM_UNIT_32M
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_setStormRate(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_STORM_TYPE_T type,
+    const UI32_T count,
+    const AIR_STORM_UNIT_T storm_unit)
+{
+    UI32_T u32dat = 0, reg = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((type >= AIR_STORM_TYPE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((count > AIR_STORM_MAX_COUNT), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((storm_unit >= AIR_STORM_UNIT_LAST), AIR_E_BAD_PARAMETER);
+
+    /* Find register BSR:broadcast, BSR_EXT1:multicast, BSR_EXT2:unicast */
+    switch(type)
+    {
+        case AIR_STORM_TYPE_BCST:
+            reg = BSR(port);
+            break;
+        case AIR_STORM_TYPE_MCST:
+            reg = BSR_EXT1(port);
+            break;
+        case AIR_STORM_TYPE_UCST:
+            reg = BSR_EXT2(port);
+            break;
+        default:
+            break;
+    }
+    /* Set storm rate limit unit */
+    aml_readReg(unit, reg, &u32dat);
+    u32dat &= ~(BSR_STORM_UNIT_MSK << BSR_STORM_UNIT_OFFT);
+    u32dat |= (storm_unit << BSR_STORM_UNIT_OFFT);
+    aml_writeReg(unit, reg, u32dat);
+
+    /* Find register BSR1:broadcast, BSR1_EXT1:multicast, BSR1_EXT2:unicast */
+    switch(type)
+    {
+        case AIR_STORM_TYPE_BCST:
+            reg = BSR1(port);
+            break;
+        case AIR_STORM_TYPE_MCST:
+            reg = BSR1_EXT1(port);
+            break;
+        case AIR_STORM_TYPE_UCST:
+            reg = BSR1_EXT2(port);
+            break;
+        default:
+            break;
+    }
+    /* Set storm rate limit count */
+    u32dat &= ~(BSR_STORM_COUNT_MSK << BSR1_10M_COUNT_OFFT);
+    u32dat |= (count << BSR1_10M_COUNT_OFFT);
+
+    u32dat &= ~(BSR_STORM_COUNT_MSK << BSR1_100M_COUNT_OFFT);
+    u32dat |= (count << BSR1_100M_COUNT_OFFT);
+
+    u32dat &= ~(BSR_STORM_COUNT_MSK << BSR1_1000M_COUNT_OFFT);
+    u32dat |= (count << BSR1_1000M_COUNT_OFFT);
+
+    u32dat &= ~(BSR_STORM_COUNT_MSK << BSR1_2500M_COUNT_OFFT);
+    u32dat |= (count << BSR1_2500M_COUNT_OFFT);
+    aml_writeReg(unit, reg, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_sec_getStormRate
+ * PURPOSE:
+ *      Get per port storm rate limit control for specific type.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port number
+ *      type            --  AIR_STORM_TYPE_BCST
+ *                          AIR_STORM_TYPE_MCST
+ *                          AIR_STORM_TYPE_UCST
+ * OUTPUT:
+ *      ptr_count       --  Count of the unit
+ *                          Range 0..255
+ *                          Rate = (count * unit) bps
+ *      ptr_unit        --  AIR_STORM_UNIT_64K
+ *                          AIR_STORM_UNIT_256K
+ *                          AIR_STORM_UNIT_1M
+ *                          AIR_STORM_UNIT_4M
+ *                          AIR_STORM_UNIT_16M
+ *                          AIR_STORM_UNIT_32M
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_getStormRate(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_STORM_TYPE_T type,
+    UI32_T *ptr_count,
+    AIR_STORM_UNIT_T *ptr_unit)
+{
+    UI32_T u32dat = 0, reg = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((type >= AIR_STORM_TYPE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_count);
+    AIR_CHECK_PTR(ptr_unit);
+
+    /* Find register BSR:broadcast, BSR_EXT1:multicast, BSR_EXT2:unicast */
+    switch(type)
+    {
+        case AIR_STORM_TYPE_BCST:
+            reg = BSR(port);
+            break;
+        case AIR_STORM_TYPE_MCST:
+            reg = BSR_EXT1(port);
+            break;
+        case AIR_STORM_TYPE_UCST:
+            reg = BSR_EXT2(port);
+            break;
+        default:
+            break;
+    }
+    aml_readReg(unit, reg, &u32dat);
+    /* Get storm rate limit unit */
+    *ptr_unit = (BSR_STORM_UNIT_MSK & (u32dat >> BSR_STORM_UNIT_OFFT));
+
+    /* Find register BSR1:broadcast, BSR1_EXT1:multicast, BSR1_EXT2:unicast */
+    switch(type)
+    {
+        case AIR_STORM_TYPE_BCST:
+            reg = BSR1(port);
+            break;
+        case AIR_STORM_TYPE_MCST:
+            reg = BSR1_EXT1(port);
+            break;
+        case AIR_STORM_TYPE_UCST:
+            reg = BSR1_EXT2(port);
+            break;
+        default:
+            break;
+    }
+    aml_readReg(unit, reg, &u32dat);
+    /* Get storm rate limit count */
+    *ptr_count = (u32dat & BSR_STORM_COUNT_MSK);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_sec_setFldMode
+ * PURPOSE:
+ *      Set per port flooding status for unknown type frame.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port to setting
+ *      type            --  AIR_FLOOD_TYPE_BCST
+ *                          AIR_FLOOD_TYPE_MCST
+ *                          AIR_FLOOD_TYPE_UCST
+ *                          AIR_FLOOD_TYPE_QURY
+ *      fld_en          --  TRUE : flooding specific type frame for specific port
+ *                          FALSE: drop specific type frame for specific port
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_setFldMode(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_FLOOD_TYPE_T type,
+    const BOOL_T fld_en)
+{
+    UI32_T u32dat = 0, reg = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((type >= AIR_FLOOD_TYPE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((fld_en != TRUE) && (fld_en != FALSE)), AIR_E_BAD_PARAMETER);
+
+    /* Find register */
+    switch(type)
+    {
+        case AIR_FLOOD_TYPE_BCST:
+            reg = BCF;
+            break;
+        case AIR_FLOOD_TYPE_MCST:
+            reg = UNMF;
+            break;
+        case AIR_FLOOD_TYPE_UCST:
+            reg = UNUF;
+            break;
+        case AIR_FLOOD_TYPE_QURY:
+            reg = QRYP;
+            break;
+        default:
+            break;
+    }
+
+    aml_readReg(unit, reg, &u32dat);
+    if(TRUE == fld_en)
+    {
+        u32dat |= BIT(port);
+    }
+    else
+    {
+        u32dat &= ~BIT(port);
+    }
+    aml_writeReg(unit, reg, u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_sec_getFldMode
+ * PURPOSE:
+ *      Get per port flooding status for unknown type frame.
+ *
+ * INPUT:
+ *      unit            --  Select device ID
+ *      port            --  Select port to setting
+ *      type            --  AIR_FLOOD_TYPE_BCST
+ *                          AIR_FLOOD_TYPE_MCST
+ *                          AIR_FLOOD_TYPE_UCST
+ *                          AIR_FLOOD_TYPE_QURY
+ * OUTPUT:
+ *      ptr_fld_en      --  TRUE : flooding specific type frame for specific port
+ *                          FALSE: drop specific type frame for specific port
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_getFldMode(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_FLOOD_TYPE_T type,
+    BOOL_T *ptr_fld_en)
+{
+    UI32_T u32dat = 0, reg = 0, value = 0;
+
+    /* Check parameter */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((type >= AIR_FLOOD_TYPE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_fld_en);
+
+    /* Find register */
+    switch(type)
+    {
+        case AIR_FLOOD_TYPE_BCST:
+            reg = BCF;
+            break;
+        case AIR_FLOOD_TYPE_MCST:
+            reg = UNMF;
+            break;
+        case AIR_FLOOD_TYPE_UCST:
+            reg = UNUF;
+            break;
+        case AIR_FLOOD_TYPE_QURY:
+            reg = QRYP;
+            break;
+        default:
+            break;
+    }
+
+    aml_readReg(unit, reg, &u32dat);
+    value = u32dat & BIT(port);
+    if(FALSE == value)
+    {
+        *ptr_fld_en = FALSE;
+    }
+    else
+    {
+        *ptr_fld_en = TRUE;
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_sec_setPortSecPortCfg
+ * PURPOSE:
+ *      Set port security configurations for specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Port ID
+ *      port_config     --  Structure of port configuration.
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sec_setPortSecPortCfg(
+    const UI32_T unit,
+    const UI32_T port,
+    const AIR_SEC_PORTSEC_PORT_CONFIG_T port_config)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T u32dat = 0, value = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != port_config.sa_lrn_en) && (FALSE != port_config.sa_lrn_en)), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != port_config.sa_lmt_en) && (FALSE != port_config.sa_lmt_en)), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port_config.sa_lmt_cnt > AIR_MAX_NUM_OF_MAC), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, PSC(port), &u32dat);
+
+    if(FALSE == port_config.sa_lrn_en)
+    {
+        u32dat |= BITS_RANGE(PSC_DIS_LRN_OFFSET, PSC_DIS_LRN_LENGTH);
+    }
+    else
+    {
+        u32dat &= ~BITS_RANGE(PSC_DIS_LRN_OFFSET, PSC_DIS_LRN_LENGTH);
+    }
+    if(FALSE == port_config.sa_lmt_en)
+    {
+        u32dat &= ~BITS_RANGE(PSC_SA_CNT_EN_OFFSET, PSC_SA_CNT_EN_LENGTH);
+        u32dat &= ~PSC_SA_CNT_LMT_MASK;
+        u32dat |= (PSC_SA_CNT_LMT_MAX << PSC_SA_CNT_LMT_OFFSET);
+    }
+    else
+    {
+        u32dat |= BITS_RANGE(PSC_SA_CNT_EN_OFFSET, PSC_SA_CNT_EN_LENGTH);
+        u32dat &= ~PSC_SA_CNT_LMT_MASK;
+        value = (port_config.sa_lmt_cnt & PSC_SA_CNT_LMT_REALMASK);
+        u32dat |= (((value > PSC_SA_CNT_LMT_MAX) ? PSC_SA_CNT_LMT_MAX : value) << PSC_SA_CNT_LMT_OFFSET);
+    }
+
+    aml_writeReg(unit, PSC(port), u32dat);
+
+    return rc;
+}
+
+/* FUNCTION NAME: air_sec_getPortSecPortCfg
+ * PURPOSE:
+ *      Get port security configurations for specific port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Port ID
+ *
+ * OUTPUT:
+ *      ptr_port_config --  Structure of port configuration.
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+ AIR_ERROR_NO_T
+air_sec_getPortSecPortCfg(
+    const UI32_T unit,
+    const UI32_T port,
+    AIR_SEC_PORTSEC_PORT_CONFIG_T *ptr_port_config)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T u32dat = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_port_config);
+
+    aml_readReg(unit, PSC(port), &u32dat);
+
+    ptr_port_config ->sa_lrn_en = ((~BITS_OFF_R(u32dat, PSC_DIS_LRN_OFFSET, PSC_DIS_LRN_LENGTH)) & BIT(0));
+    ptr_port_config ->sa_lmt_en = BITS_OFF_R(u32dat, PSC_SA_CNT_EN_OFFSET, PSC_SA_CNT_EN_LENGTH);
+    ptr_port_config ->sa_lmt_cnt = (u32dat >> PSC_SA_CNT_LMT_OFFSET) & PSC_SA_CNT_LMT_REALMASK;
+
+    return rc;
+}
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_sptag.c b/feed/app/switch/src/an8855_sdk/api/src/air_sptag.c
new file mode 100644
index 0000000..1f6e4ce
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_sptag.c
@@ -0,0 +1,342 @@
+/* FILE NAME: air_sptag.c
+ * PURPOSE:
+ *      Define the Special Tag function in AIR SDK.
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM BODIES
+*/
+
+/* EXPORTED SUBPROGRAM BODIES
+*/
+/* FUNCTION NAME: air_sptag_setState
+ * PURPOSE:
+ *      Set special tag enable/disable for port
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Special tag Port
+ *      sp_en           --  special tag Enable or Disable
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_setState(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T sp_en)
+{
+    UI32_T udat32 = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK(port > AIR_MAX_NUM_OF_PORTS, AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != sp_en) && (FALSE != sp_en)), AIR_E_BAD_PARAMETER);
+
+    /* Read PVC */
+    aml_readReg(unit, PVC(port), &udat32);
+    AIR_PRINT("PVC REG:%x. val:%x\n", PVC(port),udat32);
+
+    /* Set special tag enable or disable */
+    udat32 &= ~BITS_RANGE(PVC_SPTAG_EN_OFFT, PVC_SPTAG_EN_LENG);
+    udat32 |= (sp_en << PVC_SPTAG_EN_OFFT);
+
+    /* Write PVC */
+    aml_writeReg(unit, PVC(port), udat32);
+    AIR_PRINT("PVC REG:%x. val:%x\n", PVC(port),udat32);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_switch_getCpuPortEn
+ * PURPOSE:
+ *      Get CPU port member
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Special tag Port
+ *
+ * OUTPUT:
+ *      sp_en           --  special tag enable or disable
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_getState(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *sp_en)
+{
+    UI32_T udat32 = 0;
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(sp_en);
+    AIR_PARAM_CHK(port > AIR_MAX_NUM_OF_PORTS, AIR_E_BAD_PARAMETER);
+
+    /* Read PVC */
+    aml_readReg(unit, PVC(port), &udat32);
+
+    /* Get special tag state */
+    (*sp_en) = BITS_OFF_R(udat32, PVC_SPTAG_EN_OFFT, PVC_SPTAG_EN_LENG);
+
+    return AIR_E_OK;
+}
+
+
+/* FUNCTION NAME: air_sptag_setMode
+ * PURPOSE:
+ *      Set special tag enable/disable for port
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Special tag Port
+ *      mode            --  insert mode or replace mode
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_setMode(
+    const UI32_T unit,
+    const UI32_T port,
+    const BOOL_T mode)
+{
+    UI32_T udat32 = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK(port > AIR_MAX_NUM_OF_PORTS, AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != mode) && (FALSE != mode)), AIR_E_BAD_PARAMETER);
+
+    /* Read PVC */
+    aml_readReg(unit, PVC(port), &udat32);
+    AIR_PRINT("PVC REG:%x. val:%x\n", PVC(port),udat32);
+
+    /* Set special tag enable or disable */
+    udat32 &= ~BITS_RANGE(PVC_SPTAG_MODE_OFFT, PVC_SPTAG_MODE_LENG);
+    udat32 |= (mode << PVC_SPTAG_MODE_OFFT);
+
+    /* Write PVC */
+    aml_writeReg(unit, PVC(port), udat32);
+    AIR_PRINT("PVC REG:%x. val:%x\n", PVC(port),udat32);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_sptag_getMode
+ * PURPOSE:
+ *      Get CPU port member
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Special tag Port
+ *
+ * OUTPUT:
+ *      mode            --  insert or replace mode
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_getMode(
+    const UI32_T unit,
+    const UI32_T port,
+    BOOL_T *mode)
+{
+    UI32_T udat32 = 0;
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(mode);
+    AIR_PARAM_CHK(port > AIR_MAX_NUM_OF_PORTS, AIR_E_BAD_PARAMETER);
+
+    /* Read PVC */
+    aml_readReg(unit, PVC(port), &udat32);
+
+    /* Get special tag mode */
+    (*mode) = BITS_OFF_R(udat32, PVC_SPTAG_MODE_OFFT, PVC_SPTAG_MODE_LENG);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_sptag_encodeTx
+ * PURPOSE:
+ *      Encode tx special tag into buffer.
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_sptag_tx    --  Special tag parameters
+ *      ptr_buf         --  Buffer address
+ *      ptr_len         --  Buffer length
+ * OUTPUT:
+ *      ptr_len         --  Written buffer length
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_encodeTx(
+    const UI32_T unit,
+    const AIR_STAG_MODE_T mode,
+    AIR_STAG_TX_PARA_T *ptr_stag_tx,
+    UI8_T *ptr_buf,
+    UI32_T *ptr_len)
+{
+    UI32_T port = 0, byte_off = 0, bit_off = 0;
+    BOOL_T found = FALSE;
+    UI16_T mac_pbmp;
+
+    AIR_PARAM_CHK(((ptr_stag_tx->opc <  AIR_STAG_OPC_PORTMAP) ||(ptr_stag_tx->opc > AIR_STAG_OPC_LOOKUP)),AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((ptr_stag_tx->vpm <  AIR_STAG_VPM_UNTAG) ||(ptr_stag_tx->opc > AIR_STAG_VPM_TPID_PRE_DEFINED)),AIR_E_BAD_PARAMETER);
+
+    mac_pbmp = ptr_stag_tx->pbm;
+
+    /* insert mode only support port map */
+    if ((AIR_STAG_MODE_INSERT == mode)
+        && ((ptr_stag_tx->opc != AIR_STAG_OPC_PORTMAP) && (ptr_stag_tx->opc != AIR_STAG_OPC_LOOKUP)))
+    {
+        return AIR_E_BAD_PARAMETER;
+    }
+
+    /* clear output buffer */
+    memset(ptr_buf, 0, AIR_STAG_BUF_LEN);
+    AIR_PRINT("air_sptag_encode:mac_pbmp=%x\n", mac_pbmp);
+
+    ptr_buf[0] |= BITS_OFF_L(ptr_stag_tx->opc, AIR_STAG_TX_OPC_BIT_OFFSET, AIR_STAG_TX_OPC_BIT_WIDTH);
+    if (AIR_STAG_MODE_INSERT == mode)
+    {   /*insert only support bitmap , opc always 000*/
+        AIR_PORT_FOREACH(mac_pbmp, port)
+        {
+            ptr_buf[1] |= (0x1 << port);
+            AIR_PRINT("air_sptag_encode:port=%d,value = %x\n", port,(0x1 << port));
+        }
+    }
+    else
+    {
+        ptr_buf[0] |= BITS_OFF_L(ptr_stag_tx->vpm, AIR_STAG_TX_VPM_BIT_OFFSET, AIR_STAG_TX_VPM_BIT_WIDTH);
+        ptr_buf[0] |= BITS_OFF_L(ptr_stag_tx->opc, AIR_STAG_TX_OPC_BIT_OFFSET, AIR_STAG_TX_OPC_BIT_WIDTH);
+        if (AIR_STAG_OPC_PORTMAP == ptr_stag_tx->opc)
+        {
+            AIR_PORT_FOREACH(mac_pbmp, port)
+            {
+                ptr_buf[1] |= 0x1 << port;
+
+            }
+        }
+        else if (AIR_STAG_OPC_PORTID == ptr_stag_tx->opc)
+        {
+            AIR_PORT_FOREACH(mac_pbmp, port)
+            {
+                if (TRUE ==found)
+                {
+                    return AIR_E_BAD_PARAMETER;
+                }
+                ptr_buf[1] |= port;
+                found = TRUE;
+            }
+        }
+        AIR_PRINT("air_sptag_encode:pri = %d,cfi = %d,vid = %d\n", ptr_stag_tx->pri,ptr_stag_tx->cfi,ptr_stag_tx->vid);
+
+        ptr_buf[2] |= BITS_OFF_L(ptr_stag_tx->pri, AIR_STAG_TX_PCP_BIT_OFFSET, AIR_STAG_TX_PCP_BIT_WIDTH);
+        ptr_buf[2] |= BITS_OFF_L(ptr_stag_tx->cfi, AIR_STAG_TX_DEI_BIT_OFFSET, AIR_STAG_TX_DEI_BIT_WIDTH);
+        ptr_buf[2] |= BITS_OFF_L((ptr_stag_tx->vid >> AIR_STAG_ALIGN_BIT_WIDTH), 0,
+            (AIR_STAG_ALIGN_BIT_WIDTH - AIR_STAG_TX_PCP_BIT_WIDTH - AIR_STAG_TX_DEI_BIT_WIDTH));
+        AIR_PRINT("air_sptag_encode:pbuf[2] %02x\n", ptr_buf[2]);
+        ptr_buf[3] |= BITS_OFF_L((ptr_stag_tx->vid & 0xFF), 0, AIR_STAG_ALIGN_BIT_WIDTH);
+        AIR_PRINT("air_sptag_encode:pbuf[3] %02x\n", ptr_buf[3]);
+    }
+
+    *ptr_len = AIR_STAG_BUF_LEN;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_sptag_decodeRx
+ * PURPOSE:
+ *      Decode rx special tag from buffer.
+ * INPUT:
+ *      unit            --  Device ID
+ *      ptr_buf         --  Buffer address
+ *      len             --  Buffer length
+ * OUTPUT:
+ *      ptr_sptag_rx    --  Special tag parameters
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_sptag_decodeRx(
+    const UI32_T unit,
+    const UI8_T *ptr_buf,
+    const UI32_T len,
+    AIR_SPTAG_RX_PARA_T *ptr_sptag_rx)
+{
+    AIR_CHECK_PTR(ptr_buf);
+    AIR_CHECK_PTR(ptr_sptag_rx);
+    AIR_PARAM_CHK((len != AIR_STAG_BUF_LEN), AIR_E_BAD_PARAMETER);
+
+    ptr_sptag_rx->vpm  = BITS_OFF_R(ptr_buf[0], 0, 2);
+    ptr_sptag_rx->rsn  = BITS_OFF_R(ptr_buf[0], 2, 3);
+    ptr_sptag_rx->spn  = BITS_OFF_R(ptr_buf[1], 0, 5);
+    ptr_sptag_rx->pri  = BITS_OFF_R(ptr_buf[2], 5, 3);
+    ptr_sptag_rx->cfi  = BITS_OFF_R(ptr_buf[2], 4, 1);
+    ptr_sptag_rx->vid  = BITS_OFF_R(ptr_buf[2], 0, 4);
+    ptr_sptag_rx->vid  = (ptr_sptag_rx->vid << 8) | ptr_buf[3];
+
+    AIR_PARAM_CHK((ptr_sptag_rx->vpm >= AIR_STAG_REASON_CODE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((ptr_sptag_rx->rsn >= AIR_STAG_VPM_LAST), AIR_E_BAD_PARAMETER);
+
+    return AIR_E_OK;
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_stp.c b/feed/app/switch/src/an8855_sdk/api/src/air_stp.c
new file mode 100644
index 0000000..6f69ed5
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_stp.c
@@ -0,0 +1,133 @@
+/* FILE NAME: air_stp.c
+ * PURPOSE:
+ *      Define the STP function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM BODIES
+*/
+
+/* EXPORTED SUBPROGRAM BODIES
+*/
+/* FUNCTION NAME: air_stp_setPortstate
+ * PURPOSE:
+ *      Set the STP port state for a specifiec port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      fid             --  Filter ID for MSTP
+ *      state           --  AIR_STP_STATE_DISABLE
+ *                          AIR_STP_STATE_LISTEN
+ *                          AIR_STP_STATE_LEARN
+ *                          AIR_STP_STATE_FORWARD
+ * OUTPUT:
+ *        None
+ *
+ * RETURN:
+ *        AIR_E_OK
+ *        AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_stp_setPortstate(
+    const UI32_T unit,
+    const UI8_T port,
+    const UI8_T fid,
+    const AIR_STP_STATE_T state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for fid checking */
+    AIR_PARAM_CHK((fid >= AIR_STP_FID_NUMBER), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for state checking */
+    AIR_PARAM_CHK((state >= AIR_STP_STATE_LAST), AIR_E_BAD_PARAMETER);
+
+    /* Read data from register */
+    aml_readReg(unit, SSC(port), &u32dat);
+
+    /* Write data to register */
+    u32dat &= ~BITS(fid*2, (fid*2)+1);
+    u32dat |= BITS_OFF_L(state, (fid*2), 2);
+    aml_writeReg(unit, SSC(port), u32dat);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_stp_getPortstate
+ * PURPOSE:
+ *      Get the STP port state for a specifiec port.
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  Index of port number
+ *      fid             --  Filter ID for MSTP
+ *
+ * OUTPUT:
+ *      ptr_state       --  AIR_STP_STATE_DISABLE
+ *                          AIR_STP_STATE_LISTEN
+ *                          AIR_STP_STATE_LEARN
+ *                          AIR_STP_STATE_FORWARD
+ * RETURN:
+ *        AIR_E_OK
+ *        AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+
+AIR_ERROR_NO_T
+air_stp_getPortstate(
+    const UI32_T unit,
+    const UI32_T port,
+    const UI32_T fid,
+    AIR_STP_STATE_T *ptr_state)
+{
+    UI32_T u32dat = 0;
+
+    /* Mistake proofing for port checking */
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for fid checking */
+    AIR_PARAM_CHK((fid >= AIR_STP_FID_NUMBER), AIR_E_BAD_PARAMETER);
+
+    /* Mistake proofing for state checking */
+    AIR_CHECK_PTR(ptr_state);
+
+    /* Read data from register */
+    aml_readReg(unit, SSC(port), &u32dat);
+    (*ptr_state) = BITS_OFF_R(u32dat, fid*2, 2);
+
+    return AIR_E_OK;
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_switch.c b/feed/app/switch/src/an8855_sdk/api/src/air_switch.c
new file mode 100644
index 0000000..91f689e
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_switch.c
@@ -0,0 +1,369 @@
+/* FILE NAME: air_switch.c
+ * PURPOSE:
+ *      Define the switch function in AIR SDK.
+ *
+ * NOTES:
+ *      None
+ */
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+#define AIR_SYS_RST_WAIT_TIME       (100000)
+
+/* MACRO FUNCTION DECLARATIONS
+*/
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM BODIES
+*/
+
+/* EXPORTED SUBPROGRAM BODIES
+*/
+
+
+/* FUNCTION NAME: air_switch_setCpuPort
+ * PURPOSE:
+ *      Set CPU port member
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      port            --  CPU port index
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_setCpuPort(
+    const UI32_T unit,
+    const UI32_T port)
+{
+    UI32_T regMFC = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK(port > AIR_MAX_NUM_OF_PORTS, AIR_E_BAD_PARAMETER);
+
+    /* Read CFC */
+    aml_readReg(unit, MFC, &regMFC);
+    AIR_PRINT("PTC REG:%x. val:%x\n", MFC,regMFC);
+
+    /* Set CPU portmap */
+    regMFC &= ~BITS_RANGE(MFC_CPU_PORT_OFFSET, MFC_CPU_PORT_LENGTH);
+    regMFC |= (port << MFC_CPU_PORT_OFFSET);
+
+    /* Write CFC */
+    aml_writeReg(unit, MFC, regMFC);
+    AIR_PRINT("PTC REG:%x. val:%x\n", MFC,regMFC);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_switch_getCpuPort
+ * PURPOSE:
+ *      Get CPU port member
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      ptr_port        --  CPU port index
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_getCpuPort(
+    const UI32_T unit,
+    UI32_T *ptr_port)
+{
+    UI32_T regMFC = 0;
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(ptr_port);
+
+    /* Read CFC */
+    aml_readReg(unit, MFC, &regMFC);
+
+    /* Get CPU portmap */
+    (*ptr_port) = BITS_OFF_R(regMFC, MFC_CPU_PORT_OFFSET, MFC_CPU_PORT_LENGTH);
+
+    return AIR_E_OK;
+}
+
+
+/* FUNCTION NAME: air_switch_setCpuPortEN
+ * PURPOSE:
+ *      Set CPU port Enable
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      cpu_en          --  CPU Port Enable
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_setCpuPortEn(
+    const UI32_T unit,
+    const BOOL_T cpu_en)
+{
+    UI32_T regMFC = 0;
+
+    /* Mistake proofing */
+    AIR_PARAM_CHK(((TRUE != cpu_en) && (FALSE != cpu_en)), AIR_E_BAD_PARAMETER);
+
+    /* Read CFC */
+    aml_readReg(unit, MFC, &regMFC);
+
+    /* Set CPU portmap */
+    regMFC &= ~BITS_RANGE(MFC_CPU_EN_OFFSET, MFC_CPU_EN_LENGTH);
+    regMFC |= cpu_en << MFC_CPU_EN_OFFSET ;
+
+    /* Write CFC */
+    aml_writeReg(unit, MFC, regMFC);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_switch_getCpuPortEn
+ * PURPOSE:
+ *      Get CPU port member
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *
+ * OUTPUT:
+ *      cpu_en          --  CPU Port enable
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_getCpuPortEn(
+    const UI32_T unit,
+    BOOL_T *cpu_en)
+{
+    UI32_T regMFC = 0;
+
+    /* Mistake proofing */
+    AIR_CHECK_PTR(cpu_en);
+
+    /* Read CFC */
+    aml_readReg(unit, MFC, &regMFC);
+
+    /* Get CPU portmap */
+    (*cpu_en) = BITS_OFF_R(regMFC, MFC_CPU_EN_OFFSET, MFC_CPU_EN_LENGTH);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_switch_setSysIntrEn
+ * PURPOSE:
+ *      Set system interrupt enable
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      intr            --  system interrupt type
+ *      enable          --  system interrupt enable/disable
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_setSysIntrEn(
+    const UI32_T unit,
+    const AIR_SYS_INTR_TYPE_T intr,
+    const BOOL_T enable)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((intr >= AIR_SYS_INTR_TYPE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((intr > AIR_SYS_INTR_TYPE_PHY7_LC) && (intr < AIR_SYS_INTR_TYPE_MAC_PC)), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((TRUE != enable) && (FALSE != enable)), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, SYS_INT_EN, &val);
+    val &= ~BIT(intr);
+    val |= (TRUE == enable) ? BIT(intr) : 0;
+    aml_writeReg(unit, SYS_INT_EN, val);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_switch_getSysIntrEn
+ * PURPOSE:
+ *      Get system interrupt enable
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      intr            --  system interrupt type
+ *
+ * OUTPUT:
+ *      ptr_enable      --  system interrupt enable/disable
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_getSysIntrEn(
+    const UI32_T unit,
+    const AIR_SYS_INTR_TYPE_T intr,
+    BOOL_T *ptr_enable)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((intr >= AIR_SYS_INTR_TYPE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((intr > AIR_SYS_INTR_TYPE_PHY7_LC) && (intr < AIR_SYS_INTR_TYPE_MAC_PC)), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_enable);
+
+    aml_readReg(unit, SYS_INT_EN, &val);
+    *ptr_enable = (val & BIT(intr)) ? TRUE : FALSE;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_switch_setSysIntrStatus
+ * PURPOSE:
+ *      Set system interrupt status
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      intr            --  system interrupt type
+ *      enable          --  write TRUE to clear interrupt status
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_setSysIntrStatus(
+    const UI32_T unit,
+    const AIR_SYS_INTR_TYPE_T intr,
+    const BOOL_T enable)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((intr >= AIR_SYS_INTR_TYPE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((intr > AIR_SYS_INTR_TYPE_PHY6_LC) && (intr < AIR_SYS_INTR_TYPE_MAC_PC)), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((TRUE != enable), AIR_E_BAD_PARAMETER);
+
+    aml_writeReg(unit, SYS_INT_STS, BIT(intr));
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_switch_getSysIntrStatus
+ * PURPOSE:
+ *      Get system interrupt status
+ *
+ * INPUT:
+ *      unit            --  Device ID
+ *      intr            --  system interrupt type
+ *
+ * OUTPUT:
+ *      ptr_enable      --  system interrupt status
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *      AIR_E_BAD_PARAMETER
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_getSysIntrStatus(
+    const UI32_T unit,
+    const AIR_SYS_INTR_TYPE_T intr,
+    BOOL_T *ptr_enable)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((intr >= AIR_SYS_INTR_TYPE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK(((intr > AIR_SYS_INTR_TYPE_PHY6_LC) && (intr < AIR_SYS_INTR_TYPE_MAC_PC)), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_enable);
+
+    aml_readReg(unit, SYS_INT_STS, &val);
+    *ptr_enable = (val & BIT(intr)) ? TRUE : FALSE;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME: air_switch_reset
+ * PURPOSE:
+ *      Reset whole system
+ *
+ * INPUT:
+ *      None
+ *
+ * OUTPUT:
+ *      None
+ *
+ * RETURN:
+ *      AIR_E_OK
+ *
+ * NOTES:
+ *      None
+ */
+AIR_ERROR_NO_T
+air_switch_reset(
+    const UI32_T unit)
+{
+    UI32_T val = 0;
+
+    aml_writeReg(unit, RST_CTRL1, BIT(SYS_SW_RST_OFFT));
+    AIR_UDELAY(AIR_SYS_RST_WAIT_TIME);
+
+    return AIR_E_OK;
+}
diff --git a/feed/app/switch/src/an8855_sdk/api/src/air_vlan.c b/feed/app/switch/src/an8855_sdk/api/src/air_vlan.c
new file mode 100644
index 0000000..6629165
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/api/src/air_vlan.c
@@ -0,0 +1,1448 @@
+/* FILE NAME:   air_vlan.c
+ * PURPOSE:
+ *      Define the VLAN function in AIR SDK.
+ * NOTES:
+ */
+
+/* INCLUDE FILE DECLARATIONS
+ */
+#include "air.h"
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+ */
+
+/* GLOBAL VARIABLE DECLARATIONS
+ */
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+ */
+
+/* STATIC VARIABLE DECLARATIONS
+ */
+
+/* EXPORTED SUBPROGRAM BODIES
+ */
+
+/* LOCAL SUBPROGRAM BODIES
+*/
+void
+_air_vlan_readEntry(
+    const UI32_T unit,
+    const UI16_T vid,
+    AIR_VLAN_ENTRY_T* vlan_entry)
+{
+    UI32_T val = 0;
+    val = (0x80000000 + vid); //r_vid_cmd
+    aml_writeReg(unit, VTCR, val);
+
+    for (;;)
+    {
+        aml_readReg(unit, VTCR, &val);
+        if ((val & 0x80000000) == 0)
+            break;
+        AIR_UDELAY(10);
+    }
+
+    aml_readReg(unit, VLNRDATA0, &(vlan_entry->vlan_table.vlan_table0));
+    aml_readReg(unit, VLNRDATA1, &(vlan_entry->vlan_table.vlan_table1));
+}
+
+void
+_air_vlan_writeEntry(
+    const UI32_T unit,
+    const UI16_T vid,
+    AIR_VLAN_ENTRY_T* vlan_entry)
+{
+    UI32_T val = 0;
+
+    aml_writeReg(unit, VLNWDATA0, vlan_entry->vlan_table.vlan_table0);
+    aml_writeReg(unit, VLNWDATA1, vlan_entry->vlan_table.vlan_table1);
+    aml_writeReg(unit, VLNWDATA2, 0);
+    aml_writeReg(unit, VLNWDATA3, 0);
+    aml_writeReg(unit, VLNWDATA4, 0);
+
+    val = (0x80001000 + vid); //w_vid_cmd
+    aml_writeReg(unit, VTCR, val);
+
+    for (;;)
+    {
+        aml_readReg(unit, VTCR, &val);
+        if ((val & 0x80000000) == 0)
+            break;
+        AIR_UDELAY(10);
+    }
+}
+
+void
+_air_untagged_vlan_readEntry(
+    const UI32_T unit,
+    const UI16_T vid,
+    AIR_VLAN_ENTRY_ATTR_T* vlan_entry)
+{
+    UI32_T val = 0;
+    val = (0x80000000 + vid); //r_vid_cmd
+    aml_writeReg(unit, VTCR, val);
+
+    for (;;)
+    {
+        aml_readReg(unit, VTCR, &val);
+        if ((val & 0x80000000) == 0)
+            break;
+        AIR_UDELAY(10);
+    }
+
+    aml_readReg(unit, VLNRDATA0, &(vlan_entry->vlan_table.vlan_table0));
+    aml_readReg(unit, VLNRDATA1, &(vlan_entry->vlan_table.vlan_table1));
+    aml_readReg(unit, VLNRDATA2, &(vlan_entry->vlan_table.vlan_table2));
+    aml_readReg(unit, VLNRDATA3, &(vlan_entry->vlan_table.vlan_table3));
+    aml_readReg(unit, VLNRDATA4, &(vlan_entry->vlan_table.vlan_table4));
+}
+
+void
+_air_untagged_vlan_writeEntry(
+    const UI32_T unit,
+    const UI16_T vid,
+    AIR_VLAN_ENTRY_ATTR_T* vlan_entry)
+{
+    UI32_T val = 0;
+
+    aml_writeReg(unit, VLNWDATA0, vlan_entry->vlan_table.vlan_table0);
+    aml_writeReg(unit, VLNWDATA1, vlan_entry->vlan_table.vlan_table1);
+    aml_writeReg(unit, VLNWDATA2, vlan_entry->vlan_table.vlan_table2);
+    aml_writeReg(unit, VLNWDATA3, vlan_entry->vlan_table.vlan_table3);
+    aml_writeReg(unit, VLNWDATA4, vlan_entry->vlan_table.vlan_table4);
+
+    val = (0x80001000 + vid); //w_vid_cmd
+    aml_writeReg(unit, VTCR, val);
+
+    for (;;)
+    {
+        aml_readReg(unit, VTCR, &val);
+        if ((val & 0x80000000) == 0)
+            break;
+        AIR_UDELAY(10);
+    }
+}
+
+/* FUNCTION NAME:   air_vlan_create
+ * PURPOSE:
+ *      Create the vlan in the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      p_attr      -- vlan attr
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Vlan creation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_create(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    AIR_VLAN_ENTRY_ATTR_T *p_attr)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (vlan_entry.valid)
+        return AIR_E_ENTRY_EXISTS;
+
+    if (NULL != p_attr)
+    {
+        p_attr->valid = 1;
+        _air_untagged_vlan_writeEntry(unit, vid, p_attr);
+    }
+    else
+    {
+        memset(&vlan_entry, 0, sizeof(vlan_entry));
+        vlan_entry.valid = 1;
+        _air_untagged_vlan_writeEntry(unit, vid, &vlan_entry);
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_destroy
+ * PURPOSE:
+ *      Destroy the vlan in the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK     -- Successfully read the data.
+ *      AIR_E_OTHERS -- Vlan destroy failed.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_destroy(
+    const UI32_T    unit,
+    const UI16_T    vid)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_destroyAll
+ * PURPOSE:
+ *      Destroy the vlan in the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK     -- Successfully read the data.
+ *      AIR_E_OTHERS -- Vlan destroy failed.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_destroyAll(
+    const UI32_T    unit,
+    const UI32_T    keep_and_restore_default_vlan)
+{
+    UI16_T vid = 0;
+
+    for (vid = AIR_VLAN_ID_MIN; vid <= AIR_VLAN_ID_MAX; vid++)
+    {
+        if (keep_and_restore_default_vlan)
+        {
+            air_vlan_reset(unit, vid);
+        }
+        else
+        {
+            air_vlan_destroy(unit, vid);
+        }
+    }
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_reset
+ * PURPOSE:
+ *      Destroy the vlan in the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK     -- Successfully reset the data.
+ *      AIR_E_OTHERS -- Vlan reset failed.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_reset(
+    const UI32_T    unit,
+    const UI16_T    vid)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+
+    vlan_entry.vlan_entry_format.port_mem = AIR_ALL_PORT_BITMAP;
+    vlan_entry.valid = TRUE;
+
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setFid
+ * PURPOSE:
+ *      Set the filter id of the vlan to the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      fid         -- filter id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setFid(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI8_T     fid)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    /* VID check */
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((fid > AIR_FILTER_ID_MAX), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    vlan_entry.vlan_entry_format.fid = fid;
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getFid
+ * PURPOSE:
+ *      Get the filter id of the vlan from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id to be created
+ * OUTPUT:
+ *      ptr_fid     -- filter id
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getFid(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    UI8_T           *ptr_fid)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_fid);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    *ptr_fid = vlan_entry.vlan_entry_format.fid;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_addMemberPort
+ * PURPOSE:
+ *      Add one vlan member to the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      port        -- port id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_addMemberPort(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI32_T    port)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    vlan_entry.vlan_entry_format.port_mem |= 1 << port;
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_delMemberPort
+ * PURPOSE:
+ *      Delete one vlan member from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      port        -- port id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_delMemberPort(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI32_T    port)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    vlan_entry.vlan_entry_format.port_mem &= ~(1 << port);
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setMemberPort
+ * PURPOSE:
+ *      Replace the vlan members in the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      port_bitmap -- member port bitmap
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setMemberPort(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI32_T    port_bitmap)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port_bitmap & (~AIR_ALL_PORT_BITMAP)), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    vlan_entry.vlan_entry_format.port_mem = port_bitmap;
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getMemberPort
+ * PURPOSE:
+ *      Get the vlan members from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      port_bitmap -- member port bitmap
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getMemberPort(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    UI32_T          *ptr_port_bitmap)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_port_bitmap);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    *ptr_port_bitmap = vlan_entry.vlan_entry_format.port_mem;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setIVL
+ * PURPOSE:
+ *      Set L2 lookup mode IVL/SVL for L2 traffic.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      enable      -- enable IVL
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setIVL(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const BOOL_T    enable)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    vlan_entry.vlan_entry_format.ivl = enable ? 1 : 0;
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getIVL
+ * PURPOSE:
+ *      Get L2 lookup mode IVL/SVL for L2 traffic.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      ptr_enable  -- enable IVL
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getIVL(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    BOOL_T          *ptr_enable)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_enable);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    *ptr_enable = vlan_entry.vlan_entry_format.ivl;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setPortAcceptFrameType
+ * PURPOSE:
+ *      Set vlan accept frame type of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      type        -- accept frame type
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortAcceptFrameType(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const AIR_VLAN_ACCEPT_FRAME_TYPE_T type)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((type >= AIR_VLAN_ACCEPT_FRAME_TYPE_LAST), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, PVC(port), &val);
+    val &= ~PVC_ACC_FRM_MASK;
+    val |= (type & PVC_ACC_FRM_RELMASK) << PVC_ACC_FRM_OFFT;
+    aml_writeReg(unit, PVC(port), val);
+
+    return rc;
+}
+
+/* FUNCTION NAME:   air_vlan_getPortAcceptFrameType
+ * PURPOSE:
+ *      Get vlan accept frame type of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      ptr_type    -- accept frame type
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortAcceptFrameType(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_VLAN_ACCEPT_FRAME_TYPE_T *ptr_type)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_type);
+
+    aml_readReg(unit, PVC(port), &val);
+    *ptr_type = (val >> PVC_ACC_FRM_OFFT) & PVC_ACC_FRM_RELMASK;
+
+    return rc;
+}
+
+/* FUNCTION NAME:   air_vlan_setPortLeakyVlanEnable
+ * PURPOSE:
+ *      Set leaky vlan enable of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      pkt_type    -- packet type
+ *      enable      -- enable leaky
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortLeakyVlanEnable(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_LEAKY_PKT_TYPE_T   pkt_type,
+    const BOOL_T    enable)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((pkt_type >= AIR_LEAKY_PKT_TYPE_LAST), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, PVC(port), &val);
+
+    if (pkt_type == AIR_LEAKY_PKT_TYPE_UNICAST)
+    {
+        if (enable)
+        {
+            val |= PVC_UC_LKYV_EN_MASK;
+        }
+        else
+        {
+            val &= ~PVC_UC_LKYV_EN_MASK;
+        }
+    }
+    else if (pkt_type == AIR_LEAKY_PKT_TYPE_MULTICAST)
+    {
+        if (enable)
+        {
+            val |= PVC_MC_LKYV_EN_MASK;
+        }
+        else
+        {
+            val &= ~PVC_MC_LKYV_EN_MASK;
+        }
+    }
+    else
+    {
+        if (enable)
+        {
+            val |= PVC_BC_LKYV_EN_MASK;
+        }
+        else
+        {
+            val &= ~PVC_BC_LKYV_EN_MASK;
+        }
+    }
+
+    aml_writeReg(unit, PVC(port), val);
+
+    return rc;
+}
+
+/* FUNCTION NAME:   air_vlan_getPortLeakyVlanEnable
+ * PURPOSE:
+ *      Get leaky vlan enable of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      pkt_type    -- packet type
+ * OUTPUT:
+ *      ptr_enable  -- enable leaky
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortLeakyVlanEnable(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_LEAKY_PKT_TYPE_T   pkt_type,
+    BOOL_T          *ptr_enable)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((pkt_type >= AIR_LEAKY_PKT_TYPE_LAST), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_enable);
+
+    aml_readReg(unit, PVC(port), &val);
+
+    if (pkt_type == AIR_LEAKY_PKT_TYPE_UNICAST)
+    {
+        *ptr_enable = val & PVC_UC_LKYV_EN_MASK ? TRUE : FALSE;
+    }
+    else if (pkt_type == AIR_LEAKY_PKT_TYPE_MULTICAST)
+    {
+        *ptr_enable = val & PVC_MC_LKYV_EN_MASK ? TRUE : FALSE;
+    }
+    else
+    {
+        *ptr_enable = val & PVC_BC_LKYV_EN_MASK ? TRUE : FALSE;
+    }
+
+    return rc;
+}
+
+/* FUNCTION NAME:   air_vlan_setPortAttr
+ * PURPOSE:
+ *      Set vlan port attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      attr        -- vlan port attr
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const AIR_VLAN_PORT_ATTR_T attr)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((attr >= AIR_VLAN_PORT_ATTR_LAST), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, PVC(port), &val);
+    val &= ~PVC_VLAN_ATTR_MASK;
+    val |= (attr & PVC_VLAN_ATTR_RELMASK) << PVC_VLAN_ATTR_OFFT;
+    aml_writeReg(unit, PVC(port), val);
+
+    return rc;
+}
+
+/* FUNCTION NAME:   air_vlan_getPortAttr
+ * PURPOSE:
+ *      Get vlan port attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      ptr_attr    -- vlan port attr
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_VLAN_PORT_ATTR_T *ptr_attr)
+{
+    AIR_ERROR_NO_T rc = AIR_E_OK;
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_attr);
+
+    aml_readReg(unit, PVC(port), &val);
+    *ptr_attr = (val >> PVC_VLAN_ATTR_OFFT) & PVC_VLAN_ATTR_RELMASK;
+
+    return rc;
+}
+
+/* FUNCTION NAME:   air_vlan_setIgrPortTagAttr
+ * PURPOSE:
+ *      Set vlan incoming port egress tag attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      attr        -- egress tag attr
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setIgrPortTagAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const AIR_IGR_PORT_EG_TAG_ATTR_T attr)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((attr >= AIR_IGR_PORT_EG_TAG_ATTR_LAST), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, PVC(port), &val);
+    val &= ~PVC_EG_TAG_MASK;
+    val |= (attr & PVC_EG_TAG_RELMASK) << PVC_EG_TAG_OFFT;
+    aml_writeReg(unit, PVC(port), val);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getIgrPortTagAttr
+ * PURPOSE:
+ *      Get vlan incoming port egress tag attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      ptr_attr    -- egress tag attr
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getIgrPortTagAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_IGR_PORT_EG_TAG_ATTR_T *ptr_attr)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_attr);
+
+    aml_readReg(unit, PVC(port), &val);
+    *ptr_attr = (val >> PVC_EG_TAG_OFFT) & PVC_EG_TAG_RELMASK;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setPortEgsTagAttr
+ * PURPOSE:
+ *      Set vlan port egress tag attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      attr        -- egress tag attr
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortEgsTagAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const AIR_PORT_EGS_TAG_ATTR_T attr)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((attr >= AIR_PORT_EGS_TAG_ATTR_LAST), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, PCR(port), &val);
+    val &= ~PCR_EG_TAG_MASK;
+    val |= (attr & PCR_EG_TAG_RELMASK) << PCR_EG_TAG_OFFT;
+    aml_writeReg(unit, PCR(port), val);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getPortEgsTagAttr
+ * PURPOSE:
+ *      Get vlan port egress tag attribute from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      ptr_attr    -- egress tag attr
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortEgsTagAttr(
+    const UI32_T    unit,
+    const UI32_T    port,
+    AIR_PORT_EGS_TAG_ATTR_T *ptr_attr)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_attr);
+
+    aml_readReg(unit, PCR(port), &val);
+    *ptr_attr = (val >> PCR_EG_TAG_OFFT) & PCR_EG_TAG_RELMASK;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setPortOuterTPID
+ * PURPOSE:
+ *      Set stack tag TPID of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      tpid        -- TPID
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortOuterTPID(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const UI16_T    tpid)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, PVC(port), &val);
+    val &= ~PVC_STAG_VPID_MASK;
+    val |= (tpid & PVC_STAG_VPID_RELMASK) << PVC_STAG_VPID_OFFT;
+    aml_writeReg(unit, PVC(port), val);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getPortOuterTPID
+ * PURPOSE:
+ *      Get stack tag TPID of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      ptr_tpid    -- TPID
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortOuterTPID(
+    const UI32_T    unit,
+    const UI32_T    port,
+    UI16_T          *ptr_tpid)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_tpid);
+
+    aml_readReg(unit, PVC(port), &val);
+    *ptr_tpid = (val >> PVC_STAG_VPID_OFFT) & PVC_STAG_VPID_RELMASK;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setPortPVID
+ * PURPOSE:
+ *      Set PVID of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ *      pvid        -- native vlan id
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortPVID(
+    const UI32_T    unit,
+    const UI32_T    port,
+    const UI16_T    pvid)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((pvid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+
+    aml_readReg(unit, PVID(port), &val);
+    val &= ~PVID_PCVID_MASK;
+    val |= (pvid & PVID_PCVID_RELMASK) << PVID_PCVID_OFFT;
+    aml_writeReg(unit, PVID(port), val);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getPortPVID
+ * PURPOSE:
+ *      Get PVID of the port from the specified device.
+ * INPUT:
+ *      unit        -- unit id
+ *      port        -- port id
+ * OUTPUT:
+ *      ptr_pvid    -- native vlan id
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortPVID(
+    const UI32_T    unit,
+    const UI32_T    port,
+    UI16_T          *ptr_pvid)
+{
+    UI32_T val = 0;
+
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_pvid);
+
+    aml_readReg(unit, PVID(port), &val);
+    *ptr_pvid = (val >> PVID_PCVID_OFFT) & PVID_PCVID_RELMASK;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setServiceTag
+ * PURPOSE:
+ *      Set Vlan service tag.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      stag        -- service stag
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setServiceTag(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI16_T    stag)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((stag > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    vlan_entry.vlan_entry_format.stag = stag;
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getServiceTag
+ * PURPOSE:
+ *      Get Vlan service tag.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      ptr_stag    -- service stag
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getServiceTag(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    UI16_T          *ptr_stag)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_stag);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    *ptr_stag = vlan_entry.vlan_entry_format.stag;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setEgsTagCtlEnable
+ * PURPOSE:
+ *      Set per vlan egress tag control.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      enable      -- enable vlan egress tag control
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setEgsTagCtlEnable(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const BOOL_T    enable)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    vlan_entry.vlan_entry_format.eg_ctrl_en = enable ? 1 : 0;
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getEgsTagCtlEnable
+ * PURPOSE:
+ *      Get per vlan egress tag control.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      ptr_enable  -- enable vlan egress tag control
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getEgsTagCtlEnable(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    BOOL_T          *ptr_enable)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_enable);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    *ptr_enable = vlan_entry.vlan_entry_format.eg_ctrl_en;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setEgsTagConsistent
+ * PURPOSE:
+ *      Set per vlan egress tag consistent.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      enable      -- enable vlan egress tag consistent
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setEgsTagConsistent(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const BOOL_T    enable)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    vlan_entry.vlan_entry_format.eg_con = enable;
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getEgsTagConsistent
+ * PURPOSE:
+ *      Get per vlan egress tag consistent.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      ptr_enable  -- enable vlan egress tag consistent
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getEgsTagConsistent(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    BOOL_T          *ptr_enable)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_enable);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    *ptr_enable = vlan_entry.vlan_entry_format.eg_con;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setPortBasedStag
+ * PURPOSE:
+ *      Set vlan port based stag enable.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      enable      -- vlan port based stag enable
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortBasedStag(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const BOOL_T    enable)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    vlan_entry.vlan_entry_format.port_stag = enable;
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getPortBasedStag
+ * PURPOSE:
+ *      Get vlan port based stag enable.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      ptr_enable  -- vlan port based stag enable
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortBasedStag(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    BOOL_T          *ptr_enable)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_enable);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    *ptr_enable = vlan_entry.vlan_entry_format.port_stag;
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_setPortEgsTagCtl
+ * PURPOSE:
+ *      Set vlan port egress tag control.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ *      port        -- port id
+ *      tag_ctl     -- egress tag control
+ * OUTPUT:
+ *      None
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_setPortEgsTagCtl(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI32_T    port,
+    const AIR_VLAN_PORT_EGS_TAG_CTL_TYPE_T    tag_ctl)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((tag_ctl >= AIR_PORT_EGS_TAG_ATTR_LAST), AIR_E_BAD_PARAMETER);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    vlan_entry.vlan_entry_format.eg_ctrl &= ~(0x3 << (port * 2));
+    vlan_entry.vlan_entry_format.eg_ctrl |= (tag_ctl & 0x3) << (port * 2);
+    _air_vlan_writeEntry(unit, vid, &vlan_entry);
+
+    return AIR_E_OK;
+}
+
+/* FUNCTION NAME:   air_vlan_getPortEgsTagCtl
+ * PURPOSE:
+ *      Get vlan port egress tag control.
+ * INPUT:
+ *      unit        -- unit id
+ *      vid         -- vlan id
+ * OUTPUT:
+ *      ptr_tag_ctl -- egress tag control
+ * RETURN:
+ *      AIR_E_OK                -- Successfully read the data.
+ *      AIR_E_OTHERS            -- Operation failed.
+ *      AIR_E_BAD_PARAMETER     -- Invalid parameter.
+ * NOTES:
+ *      none
+ */
+AIR_ERROR_NO_T
+air_vlan_getPortEgsTagCtl(
+    const UI32_T    unit,
+    const UI16_T    vid,
+    const UI32_T    port,
+    AIR_VLAN_PORT_EGS_TAG_CTL_TYPE_T   *ptr_tag_ctl)
+{
+    AIR_VLAN_ENTRY_T vlan_entry = {0};
+
+    AIR_PARAM_CHK((vid > AIR_VLAN_ID_MAX), AIR_E_BAD_PARAMETER);
+    AIR_PARAM_CHK((port >= AIR_MAX_NUM_OF_PORTS), AIR_E_BAD_PARAMETER);
+    AIR_CHECK_PTR(ptr_tag_ctl);
+
+    _air_vlan_readEntry(unit, vid, &vlan_entry);
+    if (!vlan_entry.valid)
+        return AIR_E_ENTRY_NOT_FOUND;
+
+    *ptr_tag_ctl = (vlan_entry.vlan_entry_format.eg_ctrl >> (port * 2)) & 0x3;
+
+    return AIR_E_OK;
+}
diff --git a/feed/app/switch/src/an8855_sdk/core/an8855_init.c b/feed/app/switch/src/an8855_sdk/core/an8855_init.c
new file mode 100644
index 0000000..c754955
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/core/an8855_init.c
@@ -0,0 +1,138 @@
+/* FILE NAME:  an8855_init.c
+ * PURPOSE:
+ *    It provides an8855 switch intialize flow.
+ *
+ * NOTES:
+ *
+ */
+
+/* INCLUDE FILE DECLARATIONS
+ */
+#include "an8855_reg.h"
+#include "an8855_mdio.h"
+#include "an8855_phy.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+
+/* EXPORTED SUBPROGRAM BODIES
+*/
+
+/* FUNCTION NAME:   an8855_hw_reset
+ * PURPOSE:
+ *      This API is used to reset an8855 hw.
+ * INPUT:
+ * OUTPUT:
+ * RETURN:
+ * NOTES:
+ *      Attention!! Customer should implement this func
+ */
+void
+an8855_hw_reset(void)
+{
+    //dbg_print(">>>>> an8855_hw_reset\n");
+    /* set an8855 reset pin to 0 */
+
+    /* delay 100ms */
+
+    /* set an8855 reset pin to 1 */
+
+    /* delay 600ms */
+
+}
+
+/* FUNCTION NAME:   an8855_sw_reset
+ * PURPOSE:
+ *      This API is used to reset an8855 system.
+ * INPUT:
+ * OUTPUT:
+ * RETURN:
+ * NOTES:
+ */
+void
+an8855_sw_reset(void)
+{
+    //dbg_print(">>>>> an8855_sw_reset\n");
+    an8855_reg_write(0x100050c0, 0x80000000);
+    an8855_udelay(100000);
+}
+
+/* FUNCTION NAME:   an8855_phy_calibration_setting
+ * PURPOSE:
+ *      This API is used to set an8855 phy calibration.
+ * INPUT:
+ * OUTPUT:
+ * RETURN:
+ * NOTES:
+ *      None
+ */
+void
+an8855_phy_calibration_setting(void)
+{
+    int i = 0;
+
+    //dbg_print("\nSMI IOMUX initial ...");
+    an8855_reg_write(0x10000070, 0x2);
+    an8855_udelay(10000);
+    //dbg_print("\nGPHY initial ...");
+    an8855_reg_write(0x1028C840, 0x0);
+    for(i = 0; i <= 4; i++)
+    {
+        an8855_phy_write(i, 0, 0x1040);
+    }
+    an8855_udelay(10000);
+    //dbg_print("Done");
+    //dbg_print("\nSw calibration ... ");
+    gphy_calibration(g_smi_addr);
+    //dbg_print("\nDone");
+}
+
+/* FUNCTION NAME:   an8855_init
+ * PURPOSE:
+ *      This API is used to init an8855.
+ * INPUT:
+ * OUTPUT:
+ * RETURN:
+ *      0 -- init success
+ *      -1 -- init failure
+ * NOTES:
+ *      Attention!! Customer should implement part of this func
+ */
+int
+an8855_init(void)
+{
+    u32 data = 0;
+
+    /* an8855 hw reset */
+    an8855_hw_reset();
+
+    /* an8855 system reset */
+    an8855_sw_reset();
+
+    /* Keep the clock ticking when all ports link down */
+    data = an8855_reg_read(0x10213e1c);
+    data &= ~(0x3);
+    an8855_reg_write(0x10213e1c, data);
+
+    /* internal phy calibration */
+    /* please comment out this func after calibration data loaded from ROM code */
+    an8855_phy_calibration_setting();
+
+    return 0;
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/core/an8855_mdio.c b/feed/app/switch/src/an8855_sdk/core/an8855_mdio.c
new file mode 100644
index 0000000..3ff7ded
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/core/an8855_mdio.c
@@ -0,0 +1,285 @@
+/* FILE NAME:  an8855_mdio.c
+ * PURPOSE:
+ *    It provides an8855 registers and PHY mdio access.
+ *
+ * NOTES:
+ *
+ */
+
+/* INCLUDE FILE DECLARATIONS
+ */
+#include "an8855_reg.h"
+#include "an8855_mdio.h"
+
+/* NAMING CONSTANT DECLARATIONS
+*/
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+#define AN8855_SMI_ADDR     (1)
+
+/* DATA TYPE DECLARATIONS
+*/
+
+/* GLOBAL VARIABLE DECLARATIONS
+*/
+
+/* LOCAL SUBPROGRAM DECLARATIONS
+*/
+
+/* STATIC VARIABLE DECLARATIONS
+*/
+u32 g_smi_addr = AN8855_SMI_ADDR;
+
+static AIR_MII_READ_FUNC_T g_mii_read = NULL;
+static AIR_MII_WRITE_FUNC_T g_mii_write = NULL;
+static AIR_MII_C45_READ_FUNC_T g_mii_c45_read = NULL;
+static AIR_MII_C45_WRITE_FUNC_T g_mii_c45_write = NULL;
+
+/* EXPORTED SUBPROGRAM BODIES
+*/
+
+/* FUNCTION NAME:   an8855_set_smi_addr
+ * PURPOSE:
+ *      This API is used to set an8855 smi address.
+ * INPUT:
+ *      smi_addr -- AN8855 smi address
+ * OUTPUT:
+ * RETURN:
+ * NOTES:
+ *      None
+ */
+void
+an8855_set_smi_addr(u32 smi_addr)
+{
+    an8855_reg_write(0x1028C848, smi_addr);
+    g_smi_addr = smi_addr;
+}
+
+/* FUNCTION NAME:   an8855_set_mii_callback
+ * PURPOSE:
+ *      This API is used to set an8855 mii access callbacks.
+ * INPUT:
+ *      mii_read -- mii read api function
+ *      mii_write -- mii write api function
+ *      mii_c45_read --  mii c45 read api function
+ *      mii_c45_write -- mii c45 write api function
+ * OUTPUT:
+ * RETURN:
+ *      0     -- Successfully set callback.
+ *      -1    -- Setting callback failed.
+ * NOTES:
+ *      None
+ */
+int
+an8855_set_mii_callback(
+    AIR_MII_READ_FUNC_T mii_read,
+    AIR_MII_WRITE_FUNC_T mii_write,
+    AIR_MII_C45_READ_FUNC_T mii_c45_read,
+    AIR_MII_C45_WRITE_FUNC_T mii_c45_write)
+{
+    if (!mii_read || !mii_write || !mii_c45_read || !mii_c45_write)
+        return -1;
+
+    g_mii_read = mii_read;
+    g_mii_write = mii_write;
+    g_mii_c45_read = mii_c45_read;
+    g_mii_c45_write = mii_c45_write;
+
+    return 0;
+}
+
+/* FUNCTION NAME:   an8855_reg_read
+ * PURPOSE:
+ *      This API is used read an8855 registers.
+ * INPUT:
+ *      reg -- register offset
+ * OUTPUT:
+ * RETURN:
+ *      Register value
+ * NOTES:
+ *      Attention!! Customer should implement mdio mutex
+ *      lock in this func
+ */
+u32
+an8855_reg_read(u32 reg)
+{
+    u16 data_h = 0;
+    u16 data_l = 0;
+    int ret = 0;
+
+    g_mii_write(g_smi_addr, 0x1F, 0x4);
+    g_mii_write(g_smi_addr, 0x10, 0x0);
+
+    g_mii_write(g_smi_addr, 0x15, ((reg >> 16) & 0xFFFF));
+    g_mii_write(g_smi_addr, 0x16, (reg & 0xFFFF));
+
+    ret = g_mii_read(g_smi_addr, 0x17, &data_h);
+    if(ret != 0)
+    {
+        printf("read reg 0x%x 0x17 fail\n", reg);
+    }
+    ret = g_mii_read(g_smi_addr, 0x18, &data_l);
+    if(ret != 0)
+    {
+        printf("read reg 0x%x 0x18 fail\n", reg);
+    }
+
+    g_mii_write(g_smi_addr, 0x1F, 0x0);
+    g_mii_write(g_smi_addr, 0x10, 0x0);
+    //printf("read reg:0x%08x data:0x%08x\n", reg, ((data_h << 16) | (data_l & 0xffff)));
+
+    return ((data_h << 16) | (data_l & 0xffff));
+}
+
+/* FUNCTION NAME:   an8855_reg_write
+ * PURPOSE:
+ *      This API is used write an8855 registers.
+ * INPUT:
+ *      reg -- register offset
+ *      val -- register value
+ * OUTPUT:
+ * RETURN:
+ * NOTES:
+ *      Attention!! Customer should implement mdio mutex
+ *      lock in this func
+ */
+void
+an8855_reg_write(u32 reg, u32 val)
+{
+    g_mii_write(g_smi_addr, 0x1F, 0x4);
+    g_mii_write(g_smi_addr, 0x10, 0x0);
+
+    g_mii_write(g_smi_addr, 0x11, ((reg >> 16) & 0xFFFF));
+    g_mii_write(g_smi_addr, 0x12, (reg & 0xFFFF));
+
+    g_mii_write(g_smi_addr, 0x13, ((val >> 16) & 0xFFFF));
+    g_mii_write(g_smi_addr, 0x14, (val & 0xFFFF));
+
+    g_mii_write(g_smi_addr, 0x1F, 0x0);
+    g_mii_write(g_smi_addr, 0x10, 0x0);
+    //printf("write reg:0x%08x data:0x%08x\n", reg, val);
+}
+
+/* FUNCTION NAME:   an8855_phy_read
+ * PURPOSE:
+ *      This API is used read an8855 phy registers.
+ * INPUT:
+ *      port_num -- port number, 0~4
+ *      reg -- phy register offset
+ * OUTPUT:
+ *      p_val -- phy register value
+ * RETURN:
+ *      0 -- read success
+ *      -1 -- read failure
+ * NOTES:
+ *      Attention!! Customer should implement mii mutex
+ *      lock in this func
+ */
+int
+an8855_phy_read(u32 port_num, u32 reg, u32 *p_val)
+{
+    u32 phy = 0, data = 0;
+
+    if (port_num >= AN8855_PHY_NUM)
+        return -1;
+
+    phy = g_smi_addr + port_num;
+    g_mii_read(phy, reg, &data);
+    *p_val = data & 0x0000FFFF;
+
+    return 0;
+}
+
+/* FUNCTION NAME:   an8855_phy_write
+ * PURPOSE:
+ *      This API is used write an8855 phy registers.
+ * INPUT:
+ *      port_num -- port number, 0~4
+ *      reg -- phy register offset
+ *      val -- phy register value
+ * OUTPUT:
+ * RETURN:
+ *      0 -- write success
+ *      -1 -- write failure
+ * NOTES:
+ *      Attention!! Customer should implement mii mutex
+ *      lock in this func
+ */
+int
+an8855_phy_write(u32 port_num, u32 reg, u32 val)
+{
+    u32 phy = 0, data = 0;
+
+    if (port_num >= AN8855_PHY_NUM)
+        return -1;
+
+    phy = g_smi_addr + port_num;
+    data = val & 0x0000FFFF;
+    g_mii_write(phy, reg, data);
+
+    return 0;
+}
+
+/* FUNCTION NAME:   an8855_phy_read_cl45
+ * PURPOSE:
+ *      This API is used read an8855 phy registers.
+ * INPUT:
+ *      port_num -- port number, 0~4
+ *      dev_addr -- phy device type
+ *      reg_addr -- phy register offset
+ * OUTPUT:
+ *      p_val -- phy register value
+ * RETURN:
+ *      0 -- read success
+ *      -1 -- read failure
+ * NOTES:
+ *      Attention!! Customer should implement mii mutex
+ *      lock in this func or before/after calling this func
+ */
+u32
+an8855_phy_read_cl45(u32 port_num, u32 dev_addr, u32 reg_addr, u32 *p_val)
+{
+    u32 phy = 0, data = 0;
+
+    if (port_num >= AN8855_PHY_NUM)
+        return -1;
+
+    phy = g_smi_addr + port_num;
+    g_mii_c45_read(phy, dev_addr, reg_addr, &data);
+    *p_val = data & 0x0000FFFF;
+
+    return 0;
+}
+
+/* FUNCTION NAME:   an8855_phy_write_cl45
+ * PURPOSE:
+ *      This API is used write an8855 phy registers.
+ * INPUT:
+ *      port_num -- port number, 0~4
+ *      dev_addr -- phy device type
+ *      reg_addr -- phy register offset
+ *      val -- phy register value
+ * OUTPUT:
+ * RETURN:
+ *      0 -- write success
+ *      -1 -- write failure
+ * NOTES:
+ *      Attention!! Customer should implement mii mutex
+ *      lock in this func or before/after calling this func
+ */
+int
+an8855_phy_write_cl45(u32 port_num, u32 dev_addr, u32 reg_addr, u32 val)
+{
+    u32 phy = 0, data = 0;
+
+    if (port_num >= AN8855_PHY_NUM)
+        return -1;
+
+    phy = g_smi_addr + port_num;
+    data = val & 0x0000FFFF;
+    g_mii_c45_write(phy, dev_addr, reg_addr, data);
+
+    return 0;
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/core/an8855_mdio.h b/feed/app/switch/src/an8855_sdk/core/an8855_mdio.h
new file mode 100644
index 0000000..c2d4bd7
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/core/an8855_mdio.h
@@ -0,0 +1,203 @@
+/* FILE NAME:  an8855_mdio.h
+ * PURPOSE:
+ *      It provides AN8855 mdio access API.
+ * NOTES:
+ *
+ */
+
+#ifndef AN8855_MDIO_H
+#define AN8855_MDIO_H
+
+/* INCLUDE FILE DECLARATIONS
+ */
+//#include "CTP_type.h"
+//#include "CTP_shell.h"
+//#include "common.h"
+//#include "eth.h"
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+
+/* MACRO FUNCTION DECLARATIONS
+ */
+/* Attention!! Customer should define udelay function */
+void delayUs(int usecond);
+#define an8855_udelay(us) delayUs(us)
+
+/* Attention!! Customer should define dbg_print to get dbg output */
+#ifndef dbg_print
+#define dbg_print(...)
+#endif
+
+#define AN8855_PHY_NUM                      5
+
+/* DATA TYPE DECLARATIONS
+ */
+#ifndef NULL
+#define NULL 0L
+#endif
+
+#ifndef u32
+#define u32 unsigned int
+#endif
+
+#ifndef u16
+#define u16 unsigned short
+#endif
+
+#ifndef u8
+#define u8 unsigned char
+#endif
+
+typedef u32 (*AIR_MII_READ_FUNC_T) (u32 phy_addr, u32 reg, u32 *p_data);
+
+typedef u32 (*AIR_MII_WRITE_FUNC_T) (u32 phy_addr, u32 reg, u32 data);
+
+typedef u32 (*AIR_MII_C45_READ_FUNC_T) (u32 phy_addr, u32 dev, u32 reg, u32 *p_data);
+
+typedef u32 (*AIR_MII_C45_WRITE_FUNC_T) (u32 phy_addr, u32 dev, u32 reg, u32 data);
+
+extern u32 g_smi_addr;
+
+/* EXPORTED SUBPROGRAM SPECIFICATIONS
+ */
+
+/* FUNCTION NAME:   an8855_set_smi_addr
+ * PURPOSE:
+ *      This API is used to set an8855 smi address.
+ * INPUT:
+ *      smi_addr -- AN8855 smi address
+ * OUTPUT:
+ * RETURN:
+ * NOTES:
+ *      None
+ */
+void
+an8855_set_smi_addr(u32 smi_addr);
+
+/* FUNCTION NAME:   an8855_set_mii_callback
+ * PURPOSE:
+ *      This API is used to set an8855 mii access callbacks.
+ * INPUT:
+ *      mii_read -- mii read api function
+ *      mii_write -- mii write api function
+ * OUTPUT:
+ * RETURN:
+ *      0     -- Successfully set callback.
+ *      -1    -- Setting callback failed.
+ * NOTES:
+ *      None
+ */
+int
+an8855_set_mii_callback(
+    AIR_MII_READ_FUNC_T mii_read, 
+    AIR_MII_WRITE_FUNC_T mii_write,
+    AIR_MII_C45_READ_FUNC_T mii_c45_read, 
+    AIR_MII_C45_WRITE_FUNC_T mii_c45_write);
+
+/* FUNCTION NAME:   an8855_reg_read
+ * PURPOSE:
+ *      This API is used read an8855 registers.
+ * INPUT:
+ *      reg -- register offset
+ * OUTPUT:
+ * RETURN:
+ *      Register value
+ * NOTES:
+ *      Attention!! Customer should implement mdio mutex
+ *      lock in this func
+ */
+u32
+an8855_reg_read(u32 reg);
+
+/* FUNCTION NAME:   an8855_reg_write
+ * PURPOSE:
+ *      This API is used write an8855 registers.
+ * INPUT:
+ *      reg -- register offset
+ *      val -- register value
+ * OUTPUT:
+ * RETURN:
+ * NOTES:
+ *      Attention!! Customer should implement mdio mutex
+ *      lock in this func
+ */
+void
+an8855_reg_write(u32 reg, u32 val);
+
+/* FUNCTION NAME:   an8855_phy_read
+ * PURPOSE:
+ *      This API is used read an8855 phy registers.
+ * INPUT:
+ *      port_num -- port number, 0~4
+ *      reg -- phy register offset
+ * OUTPUT:
+ *      p_val -- phy register value
+ * RETURN:
+ *      0 -- read success
+ *      -1 -- read failure
+ * NOTES:
+ *      Attention!! Customer should implement mii mutex
+ *      lock in this func
+ */
+int
+an8855_phy_read(u32 port_num, u32 reg, u32 *p_val);
+
+/* FUNCTION NAME:   an8855_phy_write
+ * PURPOSE:
+ *      This API is used write an8855 phy registers.
+ * INPUT:
+ *      port_num -- port number, 0~4
+ *      reg -- phy register offset
+ *      val -- phy register value
+ * OUTPUT:
+ * RETURN:
+ *      0 -- write success
+ *      -1 -- write failure
+ * NOTES:
+ *      Attention!! Customer should implement mii mutex
+ *      lock in this func
+ */
+int
+an8855_phy_write(u32 port_num, u32 reg, u32 val);
+
+/* FUNCTION NAME:   an8855_phy_read_cl45
+ * PURPOSE:
+ *      This API is used read an8855 phy registers.
+ * INPUT:
+ *      port_num -- port number, 0~4
+ *      dev_addr -- phy device type
+ *      reg_addr -- phy register offset
+ * OUTPUT:
+ *      p_val -- phy register value
+ * RETURN:
+ *      0 -- read success
+ *      -1 -- read failure
+ * NOTES:
+ *      Attention!! Customer should implement mii mutex
+ *      lock in this func or before/after calling this func
+ */
+u32
+an8855_phy_read_cl45(u32 port_num, u32 dev_addr, u32 reg_addr, u32 *p_val);
+
+/* FUNCTION NAME:   an8855_phy_write_cl45
+ * PURPOSE:
+ *      This API is used write an8855 phy registers.
+ * INPUT:
+ *      port_num -- port number, 0~4
+ *      dev_addr -- phy device type
+ *      reg_addr -- phy register offset
+ *      val -- phy register value
+ * OUTPUT:
+ * RETURN:
+ *      0 -- write success
+ *      -1 -- write failure
+ * NOTES:
+ *      Attention!! Customer should implement mii mutex
+ *      lock in this func or before/after calling this func
+ */
+int
+an8855_phy_write_cl45(u32 port_num, u32 dev_addr, u32 reg_addr, u32 val);
+
+#endif  /* End of AN8855_MDIO_H */
+
diff --git a/feed/app/switch/src/an8855_sdk/core/an8855_phy.h b/feed/app/switch/src/an8855_sdk/core/an8855_phy.h
new file mode 100644
index 0000000..3c810e7
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/core/an8855_phy.h
@@ -0,0 +1,409 @@
+/* FILE NAME:  an8855_phy.h
+ * PURPOSE:
+ *      It provides AN8855 phy definition.
+ * NOTES:
+ *
+ */
+
+#ifndef _AN8855_PHY_H_
+#define _AN8855_PHY_H_
+
+
+/* Type Definitions */
+#define int8_t char
+#define uint8_t unsigned char
+#define int16_t short
+#define uint16_t unsigned short
+#define int32_t int
+#define uint32_t unsigned int
+/* DATA TYPE DECLARATIONS
+ */
+typedef int                 BOOL_T;
+typedef signed char         I8_T;
+typedef unsigned char       UI8_T;
+typedef signed short        I16_T;
+typedef unsigned short      UI16_T;
+typedef signed int          I32_T;
+typedef unsigned int        UI32_T;
+typedef char                C8_T;
+typedef unsigned long long  UI64_T;
+
+typedef UI8_T   AIR_MAC_T[6];
+
+/* Debug flags */
+//#define _MDIO_BOOTS_MODE     1 // Boots for preamble
+#define _DEBUG_PRINT         1 // Debug print for Arduino
+//#define _DEBUG_PRINT_eFuse     1
+#define _write_eFuse     1
+
+#define _DEBUG_SCAN_ALL      0 // Scan all Code for SerDes Calibration
+#define _WRITE_RG_DIR        1 // Write RG directly for Calibration
+#define _USER_DEFINE_MODE    0 // Replace to user-defined RG for Calibration
+#define _DEBUG_MANUAL        1 // dbg_20210604  // manual dbg_20210604
+/**************************************************************************/
+
+/* Phy Address */
+//#define phyadd_common 0x1d            // EN8801
+//#define PHY_NUM 1             // EN8801
+//#define phyadd_common 0x9         // EN7523
+//#define PHY_NUM 4             // EN7523
+//#define phyadd_common 0x0         // EN8850
+//#define PHY_NUM   5           // EN8850
+#define PHY_NUM   4             // EN8851
+#define CALIPOLARITY  1
+
+#define TXAMP_offset  0    // for 8851
+
+/* On/Off */
+//#define ENABLE  1
+//#define DISABLE 0
+#define Relay_ENABLE  1
+#define Relay_DISABLE 0
+
+/* FT Pattern */
+#define _MDIO     0x0
+#define _I2C      0x1
+#define FT_USB3_T101    0x0
+#define FT_PCIE0_T101   0x1
+#define FT_PCIE1_T101   0x2
+#define FT_PON_T101     0x3
+
+/********* Digital pin definition *************/
+#define Relay_Tx_PN         22   // relay 1
+#define Relay_R_R50         23   // relay 2
+#define Relay_Tx_Vol        24   // relay 3
+#define Relay_Rx_Vol        25   // relay 4
+#define Relay_DUT_GND       26   // relay 5
+#define Relay_I2C           27   // PIN for SCL&SDA , relay 6
+//#define Relay_I2C_SCL       27   // PIN for SCL&SDA , relay 6
+//#define Relay_I2C_SDA       28   // PIN for SCL&SDA , relay 6
+
+#define pin_MDIO           36   // PIN for MDIO
+#define pin_MDC            37   // PIN for MDC
+#define FT_PATTERN_bit0    49   // PIN for FT0
+#define FT_PATTERN_bit1    48   // PIN for FT1
+#define Relay_MDIO         35   // PIN for MDIO relay, relay 7
+
+/***********************************************/
+/* Use for I/O register PORTA control */
+#define POR_Relay_Tx_PN    D22   // use for PORTA control, relay 1
+#define POR_Relay_R_R50    D23   // use for PORTA control, relay 2
+#define POR_Relay_Tx_Vol   D24   // use for PORTA control, relay 3
+#define POR_Relay_Rx_Vol   D25   // use for PORTA control, relay 4
+#define POR_Relay_DUT_GND  D26   // use for PORTA control, relay 5
+//#define POR_Relay_I2C      D27   // use for PORTA control, relay 6
+#define POR_Relay_I2C_SCL  D27   // use for PORTA control, relay 6
+#define POR_Relay_I2C_SDA  D28   // use for PORTA control, relay 7
+
+/* Use for I/O register PORTC control */
+#define POR_MDIO               D36  // use for PORTC control
+#define POR_MDC                D37  // use for PORTC control
+#define POR_Relay_MDIO         D35  // use for PORTC control, relay 7
+
+/* Use for I/O register PORTL control */
+#define POR_FT_PATTERN_bit0    D49  // use for PORTL control
+#define POR_FT_PATTERN_bit1    D48  // use for PORTL control
+
+
+/* I/O register Port A */
+#define D22   0
+#define D23   1
+#define D24   2
+#define D25   3
+#define D26   4
+#define D27   5
+#define D28   6
+#define D29   7
+
+/* I/O register Port C */
+#define D37   0
+#define D36   1
+#define D35   2
+#define D34   3
+#define D33   4
+#define D32   5
+#define D31   6
+#define D30   7
+
+/* I/O register Port L */
+#define D49   0
+#define D48   1
+#define D47   2
+#define D46   3
+#define D45   4
+#define D44   5
+#define D43   6
+#define D42   7
+
+/* I/O register Port D */
+#define D21   0
+#define D20   1
+#define D19   2
+#define D18   3
+
+
+/***************************************************************************
+**************************************************************************
+* MDC/MDIO
+***************************************************************************
+***************************************************************************/
+#define SET_HIGH(data, nbit) ((data)|=(nbit))
+#define SET_LOW(data, nbit) ((data)&=~(nbit))
+
+#define MDIO_ONE  _BV(POR_MDIO)
+#define MDIO_ZERO 0x00
+#define MDC_ONE   _BV(POR_MDC)
+#define MDC_ZERO  0x00
+
+#define delay_us delayMicroseconds(0)
+
+#define ANACAL_INIT        0x01
+#define ANACAL_ERROR       0xFD
+#define ANACAL_SATURATION  0xFE
+#define ANACAL_FINISH      0xFF
+#define ANACAL_PAIR_A      0
+#define ANACAL_PAIR_B      1
+#define ANACAL_PAIR_C      2
+#define ANACAL_PAIR_D      3
+#define DAC_IN_0V          0x000
+#define DAC_IN_2V          0x0f0  // +/-1V
+
+#define ZCAL_MIDDLE        0x20
+#define TX_OFFSET_0mV_idx  31
+#define TX_AMP_MIDDLE      0x20
+
+#define TX_i2mpb_hbt_ofs  0x4   // 8851 fine tune 100M v1 (20220414)
+#define R50_OFFSET_VALUE  0x5
+
+//============== definition value for GbE ===================//
+#define BG_VOLTAGE_OUT     0xc0
+#define FORCE_MDI          2
+#define FORCE_MDIX         3
+#define LDO_1p15_VOSEL_1   1
+#define RX_CAL_VALUE_9       0x3
+#define RX_CAL_HVGA_BW_2     0x2
+#define RX_CAL_DCO_Normal    0x0
+#define RX_CAL_DCO_BYPASS_TX_RX  0x3
+#define RX_CAL_DCO_0xF    0xF
+
+#define TANA_MON_DCV_SEL__MASK         0xE0
+#define TANA_MON_DCV_SEL__MPX_TANA_A   0x20
+#define TANA_MON_DCV_SEL__MPX_TANA_B   0x40
+#define TANA_MON_DCV_SEL__MPX_TANA_C   0x60
+#define TANA_MON_DCV_SEL__MPX_TANA_D   0x80
+#define TANA_MON_DCV_SEL__MONVC__MASK  0x008000C8
+#define TANA_MON_DCV__TANA__VBG_MON    0x000000C0
+#define TANA_MON_DCV__TANA__MONVC      0x000000C8
+
+#define AN_disable_force_1000M 0x0140
+#define BG_voltage_output 0xc000
+#define Fix_mdi 0x1010
+#define Disable_tx_slew_control 0x0000
+#define LDO_control 0x0100
+#define Cal_control_BG 0x1110
+#define Cal_control_R50 0x1100
+#define Cal_control_TX_AMP 0x1100
+#define Cal_control_TX_OFST 0x0100
+#define Cal_control_R50_pairA_ENABLE 0x1101
+#define Disable_all 0x0
+#define Zcalen_A_ENABLE 0x0000
+#define Zcalen_B_ENABLE 0x1000
+#define Zcalen_C_ENABLE 0x0100
+#define Zcalen_D_ENABLE 0x0010
+#define MASK_MSB_8bit 0xff00
+#define MASK_LSB_8bit 0x00ff
+#define MASK_r50ohm_rsel_tx_a 0x7f00
+#define MASK_r50ohm_rsel_tx_b 0x007f
+#define MASK_r50ohm_rsel_tx_c 0x7f00
+#define MASK_r50ohm_rsel_tx_d 0x007f
+#define Rg_r50ohm_rsel_tx_a_en 0x8000
+#define Rg_r50ohm_rsel_tx_b_en 0x0080
+#define Rg_r50ohm_rsel_tx_c_en 0x8000
+#define Rg_r50ohm_rsel_tx_d_en 0x0080
+#define Rg_txvos_calen_ENABLE 0x0001
+#define Bypass_tx_offset_cal 0x8000
+#define Enable_Tx_VLD 0xf808
+#define Rg_txg_calen_a_ENABLE 0x1000
+#define Rg_txg_calen_b_ENABLE 0x0100
+#define Rg_txg_calen_c_ENABLE 0x0010
+#define Rg_txg_calen_d_ENABLE 0x0001
+#define Force_dasn_dac_in0_ENABLE 0x8000
+#define Force_dasn_dac_in1_ENABLE 0x8000
+#define MASK_cr_tx_amp_offset_MSB 0x3f00
+#define MASK_cr_tx_amp_offset_LSB 0x003f
+#define Rg_cal_refsel_ENABLE 0x0010
+#define MASK_da_tx_i2mpb_a_gbe 0xfc00
+#define MASK_da_tx_i2mpb_b_c_d_gbe 0x3f00
+
+#define LED_basic_control_en_active_low 0x800a
+#define LED_led0_en_active_high 0xc007
+#define LED_led0_force_blinking 0x0200
+
+
+
+/*phy calibration use*/
+//Type defines
+typedef unsigned char    UINT8;
+typedef unsigned short   UINT16;
+typedef unsigned long    UINT32;
+
+typedef struct
+{
+  UINT16 DATA_Lo;
+  UINT8  DATA_Hi;
+}TR_DATA_T;
+
+//CL22 Reg Support Page Select//
+#define RgAddr_Reg1Fh        0x1f
+#define CL22_Page_Reg        0x0000
+#define CL22_Page_ExtReg     0x0001
+#define CL22_Page_MiscReg    0x0002
+#define CL22_Page_LpiReg     0x0003
+#define CL22_Page_tReg       0x02A3
+#define CL22_Page_TrReg      0x52B5
+
+//CL45 Reg Support DEVID//
+#define DEVID_03             0x03
+#define DEVID_07             0x07
+#define DEVID_1E             0x1E
+#define DEVID_1F             0x1F
+
+//TokenRing Reg Access//
+#define TrReg_PKT_XMT_STA    0x8000
+#define TrReg_WR             0x8000
+#define TrReg_RD             0xA000
+
+/* ----------------- gephy_all Bit Field Definitions ------------------- */
+
+
+
+//-------------------------------------
+//0x0000
+#define RgAddr_Reg00h                               0x00
+
+//0x51e01200
+#define RgAddr_dev1Eh_reg120h                       0x0120
+//0x51e01220
+#define RgAddr_dev1Eh_reg122h                       0x0122
+//0x51e01440
+#define RgAddr_dev1Eh_reg144h                       0x0144
+//0x51e014a0
+#define RgAddr_dev1Eh_reg14Ah                       0x014a
+//0x51e019b0
+#define RgAddr_dev1Eh_reg19Bh                       0x019b
+//0x51e02340
+#define RgAddr_dev1Eh_reg234h                       0x0234
+//0x51e02380
+#define RgAddr_dev1Eh_reg238h                       0x0238
+//0x51e02390
+#define RgAddr_dev1Eh_reg239h                       0x0239
+//0x51f02680
+#define RgAddr_dev1Fh_reg268h                       0x0268
+//0x51e02d10
+#define RgAddr_dev1Eh_reg2D1h                       0x02d1
+//0x51e03230
+#define RgAddr_dev1Eh_reg323h                       0x0323
+//0x51e03240
+#define RgAddr_dev1Eh_reg324h                       0x0324
+//0x51e03260
+#define RgAddr_dev1Eh_reg326h                       0x0326
+
+//0x51f01000
+#define RgAddr_dev1Fh_reg100h                       0x0100
+//0x51e01450
+#define RgAddr_dev1Eh_reg145h                       0x0145
+//0x51f00ff0
+#define RgAddr_dev1Fh_reg0FFh                       0x00ff
+//0x51e00db0
+#define RgAddr_dev1Eh_reg0DBh                       0x00db
+//0x51e00dc0
+#define RgAddr_dev1Eh_reg0DCh                       0x00dc
+//0x51e00e00
+#define RgAddr_dev1Eh_reg0E0h                       0x00e0
+//0x51e00e10
+#define RgAddr_dev1Eh_reg0E1h                       0x00e1
+//0x51e00e00
+#define RgAddr_dev1Eh_reg0E0h                       0x00e0
+//0x51e017a0
+#define RgAddr_dev1Eh_reg17Ah                       0x017a
+//0x51f01150
+#define RgAddr_dev1Fh_reg115h                       0x0115
+//0x51f01000
+#define RgAddr_dev1Fh_reg100h                       0x0100
+//0x51e01450
+#define RgAddr_dev1Eh_reg145h                       0x0145
+//0x51e01450
+#define RgAddr_dev1Eh_reg145h                       0x0145
+//0x51e01850
+#define RgAddr_dev1Eh_reg185h                       0x0185
+//0x51e00fb0
+#define RgAddr_dev1Eh_reg0FBh                       0x00fb
+//0x51e01740
+#define RgAddr_dev1Eh_reg174h                       0x0174
+//0x51e01750
+#define RgAddr_dev1Eh_reg175h                       0x0175
+//0x51e01850
+#define RgAddr_dev1Eh_reg185h                       0x0185
+//0x51e00fb0
+#define RgAddr_dev1Eh_reg0FBh                       0x00fb
+//0x51e00960
+#define RgAddr_dev1Eh_reg096h                       0x0096
+//0x51e003e0
+#define RgAddr_dev1Eh_reg03Eh                       0x003e
+//0x51e00dd0
+#define RgAddr_dev1Eh_reg0DDh                       0x00dd
+//0x51e017d0
+#define RgAddr_dev1Eh_reg17Dh                       0x017d
+//0x51e01810
+#define RgAddr_dev1Eh_reg181h                       0x0181
+//0x51e00120
+#define RgAddr_dev1Eh_reg012h                       0x0012
+//0x51e017e0
+#define RgAddr_dev1Eh_reg17Eh                       0x017e
+//0x51e01820
+#define RgAddr_dev1Eh_reg182h                       0x0182
+//0x51e00170
+#define RgAddr_dev1Eh_reg017h                       0x0017
+//0x51e01830
+#define RgAddr_dev1Eh_reg183h                       0x0183
+//0x51e00190
+#define RgAddr_dev1Eh_reg019h                       0x0019
+//0x51e01800
+#define RgAddr_dev1Eh_reg180h                       0x0180
+//0x51e01840
+#define RgAddr_dev1Eh_reg184h                       0x0184
+//0x51e00210
+#define RgAddr_dev1Eh_reg021h                       0x0021
+//0x51e01720
+#define RgAddr_dev1Eh_reg172h                       0x0172
+//0x51e01730
+#define RgAddr_dev1Eh_reg173h                       0x0173
+//0x51e017c0
+#define RgAddr_dev1Eh_reg17Ch                       0x017c
+//0x51e017f0
+#define RgAddr_dev1Eh_reg17Fh                       0x017f
+
+//0x52b5100
+#define RgAddr_TrReg10h                             0x10
+//0x52b5110
+#define RgAddr_TrReg11h                             0x11
+//0x52b5120
+#define RgAddr_TrReg12h                             0x12
+
+//0x31c0
+#define RgAddr_LpiReg1Ch                            0x1c
+//0x31d0
+#define RgAddr_LpiReg1Dh                            0x1d
+uint8_t BG_Calibration(uint8_t phyadd, int8_t calipolarity);
+uint8_t R50_Calibration(uint8_t phyadd, uint8_t phyadd_common);
+uint8_t TX_OFS_Calibration(uint8_t phyadd, uint8_t phyadd_common);
+uint8_t TX_AMP_Calibration(uint8_t phyadd, uint8_t phyadd_common);
+//void config_gphy_port(UINT8, UINT8);
+
+void set_gphy_reg_cl22(uint8_t, uint8_t, uint16_t);
+uint16_t get_gphy_reg_cl45(uint8_t, uint8_t, uint16_t);
+void set_gphy_reg_cl45(uint8_t, uint8_t, uint16_t, uint16_t);
+void anacal_exe(uint8_t);
+
+#endif /* _AN8855_PHY_H_ */
+
diff --git a/feed/app/switch/src/an8855_sdk/core/an8855_phy_cal.c b/feed/app/switch/src/an8855_sdk/core/an8855_phy_cal.c
new file mode 100644
index 0000000..c2e8e5c
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/core/an8855_phy_cal.c
@@ -0,0 +1,967 @@
+/* FILE NAME:  an8855_phy_cal.c
+* PURPOSE:
+*    It provides an8855 switch phy calibration function.
+*
+* NOTES:
+*
+*/
+
+/* INCLUDE FILE DECLARATIONS
+*/
+#include "an8855_mdio.h"
+#include "an8855_phy.h"
+//#include "swk_gphy_reg.h"
+//#include "gphy_calibration.h"
+//#include "gsw_reg.h"
+
+/* NAMING CONSTANT DECLARATIONS
+ */
+#define MII_BMCR                (0)
+#define BMCR_PDOWN              (0x0800)
+/* MACRO FUNCTION DECLARATIONS
+ */
+
+#define FULL_BITS(_n_) ((1UL << (_n_)) - 1)
+
+/* DATA TYPE DECLARATIONS
+ */
+
+/* GLOBAL VARIABLE DECLARATIONS
+ */
+/* Zcal to R50 mapping table (20220404) */
+const uint8_t ZCAL_TO_R50ohm_TBL[64] =
+{
+    127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127,
+    127, 127, 127, 127, 127, 123, 118, 114, 110, 106, 102, 98, 96, 92, 88, 85,
+    82, 80, 76, 72, 70, 67, 64, 62, 60, 56, 54, 52, 49, 48, 45, 43,
+    40, 39, 36, 34, 32, 32, 30, 28, 25, 24, 22, 20, 18, 16, 16, 14
+};
+
+/* Tx offset table, value is from small to big */
+const uint8_t  EN753x_TX_OFS_TBL[64] =
+{
+    0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30,
+    0x2f, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21, 0x20,
+    0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+    0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f
+};
+
+#define TOTAL_PATCH_C45_ITEMS   (15)
+#define TOTAL_PATCH_TR_ITEMS    (19)
+const uint16_t C45_PATCH_TABLE[TOTAL_PATCH_C45_ITEMS][3] =
+{
+    {0x1E, 0x120, 0x8014},
+    {0x1E, 0x122, 0xFFFF},
+    {0x1E, 0x122, 0xFFFF},
+    {0x1E, 0x144, 0x0200},
+    {0x1E, 0x14A, 0xEE20},
+    {0x1E, 0x189, 0x0110},
+    {0x1E, 0x19B, 0x0111},
+    {0x1E, 0x234, 0x0181},
+    {0x1E, 0x238, 0x0120},
+    {0x1E, 0x239, 0x0117},
+    {0x1F, 0x268, 0x07F4},
+    {0x1E, 0x2d1, 0x0733},
+    {0x1E, 0x323, 0x0011},
+    {0x1E, 0x324, 0x013F},
+    {0x1E, 0x326, 0x0037},
+};
+
+const uint32_t TR_PATCH_TABLE[TOTAL_PATCH_TR_ITEMS][2] =
+{
+    {0x83AA, 0x055a0 },
+    {0x83AE, 0x7FF3F },
+    {0x8F80, 0x0001e },
+    {0x8F82, 0x6FB90A},
+    {0x8FAE, 0x060671},
+    {0x8FB0, 0xE2F00 },
+    {0x8ECC, 0x444444},
+    {0x9686, 0x00000 },
+    {0x968C, 0x2EBAEF},
+    {0x9690, 0x00000b},
+    {0x9698, 0x0504D },
+    {0x969A, 0x2314f },
+    {0x969E, 0x03028 },
+    {0x96A0, 0x05010 },
+    {0x96A2, 0x40001 },
+    {0x96A6, 0x018670},
+    {0x96A8, 0x0024A },
+    {0x96B6, 0x00072 },
+    {0x96B8, 0x03210 },
+};
+
+#define TOTAL_NUMBER_OF_PATCH    (14)
+static uint16_t eee_patch_table[TOTAL_NUMBER_OF_PATCH][2] = {
+    {RgAddr_dev1Eh_reg120h, 0x8014},
+    {RgAddr_dev1Eh_reg122h, 0xFFFF},
+    {RgAddr_dev1Eh_reg122h, 0xFFFF},
+    {RgAddr_dev1Eh_reg144h, 0x0200},
+    {RgAddr_dev1Eh_reg14Ah, 0xEE20},
+    {RgAddr_dev1Eh_reg19Bh, 0x0111},
+    {RgAddr_dev1Eh_reg234h, 0x1181},
+    {RgAddr_dev1Eh_reg238h, 0x0120},
+    {RgAddr_dev1Eh_reg239h, 0x0117},
+    {RgAddr_dev1Fh_reg268h, 0x07F4},
+    {RgAddr_dev1Eh_reg2D1h, 0x0733},
+    {RgAddr_dev1Eh_reg323h, 0x0011},
+    {RgAddr_dev1Eh_reg324h, 0x013F},
+    {RgAddr_dev1Eh_reg326h, 0x0037}
+};
+
+#define TOTAL_NUMBER_OF_TR      (19)
+static uint16_t tr_reg_table[TOTAL_NUMBER_OF_TR][3] = {
+    {0x55A0, 0x0000, 0x83AA},
+    {0xFF3F, 0x0007, 0x83AE},
+    {0x001E, 0x0000, 0x8F80},
+    {0xB90A, 0x006F, 0x8F82},
+    {0x0671, 0x0006, 0x8FAE},
+    {0x2F00, 0x000E, 0x8FB0},
+    {0x4444, 0x0044, 0x8ECC},
+    {0x0004, 0x0000, 0x9686},
+    {0xBAEF, 0x002E, 0x968C},
+    {0x000B, 0x0000, 0x9690},
+    {0x504D, 0x0000, 0x9698},
+    {0x314F, 0x0002, 0x969A},
+    {0x3028, 0x0000, 0x969E},
+    {0x5010, 0x0000, 0x96A0},
+    {0x0001, 0x0004, 0x96A2},
+    {0x8670, 0x0001, 0x96A6},
+    {0x024A, 0x0000, 0x96A8},
+    {0x0072, 0x0000, 0x96B6},
+    {0x3210, 0x0000, 0x96B8}
+};
+
+void TR_RegWr(uint16_t phyadd, uint16_t tr_reg_addr, uint32_t tr_data);
+
+uint16_t get_gphy_reg_cl22(uint8_t phyad, uint8_t reg)
+{
+    uint32_t rdata = 0;
+
+    an8855_phy_read(phyad-g_smi_addr, reg, &rdata);
+
+    return ((uint16_t)rdata);
+    /*
+    gsw_top_reg_REG_PHY_IAC REG_PHY_IAC_val;
+    gsw_top_reg_REG_PHY_IAD REG_PHY_IAD_val;
+
+    // Wait until done
+    do
+    {
+      REG_PHY_IAC_val.Raw   = io_read32(RgAddr_gsw_top_reg_REG_PHY_IAC);
+    }
+    while(REG_PHY_IAC_val.Bits.csr_phy_acs_st);
+
+    // Set address
+    REG_PHY_IAC_val.Bits.csr_mdio_st = 1;
+    REG_PHY_IAC_val.Bits.csr_mdio_cmd   = 2;
+    REG_PHY_IAC_val.Bits.csr_mdio_phy_addr = phyad;
+    REG_PHY_IAC_val.Bits.csr_mdio_reg_addr = reg;
+    REG_PHY_IAC_val.Bits.csr_phy_acs_st =   1;
+    io_write32(RgAddr_gsw_top_reg_REG_PHY_IAC, REG_PHY_IAC_val.Raw);
+    // Wait until done
+    do
+    {
+        REG_PHY_IAC_val.Raw = io_read32(RgAddr_gsw_top_reg_REG_PHY_IAC);
+    }
+    while(REG_PHY_IAC_val.Bits.csr_phy_acs_st);
+
+    REG_PHY_IAD_val.Raw = io_read32(RgAddr_gsw_top_reg_REG_PHY_IAD);
+
+    return REG_PHY_IAD_val.Raw;
+    */
+}
+
+/* EXPORTED SUBPROGRAM BODIES
+ */
+void gphy_config(void)
+{
+    uint8_t port = 1;
+    uint8_t phy_base = 0, phys_in_chip = 8;
+
+    for (port = 1; port <= phys_in_chip; port++)
+    {
+        set_gphy_reg_cl45(phy_base + port, 0x7, 0x3c, 0x0006); // Enable EEE
+        set_gphy_reg_cl45(phy_base + port, 0x1e, 0x3e, 0xf000); // force on TXVLD
+    }
+}
+
+static void set_gphy_TrReg(uint8_t prtid, uint16_t parm_1, uint16_t parm_2, uint16_t parm_3)
+{
+    set_gphy_reg_cl22(prtid, RgAddr_TrReg11h, parm_1);
+    set_gphy_reg_cl22(prtid, RgAddr_TrReg12h, parm_2);
+    set_gphy_reg_cl22(prtid, RgAddr_TrReg10h, parm_3);
+}
+
+static void gphy_eee_patch(uint8_t phy_base)
+{
+    UI8_T   port = 1, index = 0, phy_addr = 1;
+    UI16_T  data = 0;
+
+    for (port = 1; port <=8; port++)
+    {
+        phy_addr = phy_base + port;
+        data = get_gphy_reg_cl22(phy_addr, MII_BMCR);
+        set_gphy_reg_cl22(phy_addr, MII_BMCR, data & ~(BMCR_PDOWN));    /* PHY power on */
+
+        /* Change EEE RG default value */
+        for (index = 0; index < TOTAL_NUMBER_OF_PATCH; index++)
+        {
+            set_gphy_reg_cl45(phy_addr, DEVID_1E, eee_patch_table[index][0], eee_patch_table[index][1]);
+        }
+
+        set_gphy_reg_cl22(phy_addr, RgAddr_Reg1Fh, CL22_Page_TrReg);   /* change CL22page to LpiReg(0x3) */
+        for (index = 0; index < TOTAL_NUMBER_OF_TR; index++)
+        {
+            set_gphy_TrReg(phy_addr, tr_reg_table[index][0], tr_reg_table[index][1], tr_reg_table[index][2]);
+        }
+
+        set_gphy_reg_cl22(phy_addr, RgAddr_Reg1Fh, CL22_Page_LpiReg);  /* change CL22page to LpiReg(0x3) */
+        set_gphy_reg_cl22(phy_addr, RgAddr_LpiReg1Ch, 0x0c92);         /* Fine turn SigDet for B2B LPI link down issue */
+        set_gphy_reg_cl22(phy_addr, RgAddr_LpiReg1Dh, 0x0001);         /* Enable "lpi_quit_waitafesigdet_en" for LPI link down issue */
+
+        set_gphy_reg_cl22(phy_addr, RgAddr_Reg1Fh, CL22_Page_Reg);     /* change CL22page to Reg(0x0) */
+    }
+}
+
+void gphy_calibration(uint8_t phy_base)
+{
+    uint8_t port = 1, phy_addr = 1 ,phy_group = 1, index = 0;
+    uint8_t phys_in_chip = 5;
+
+    BG_Calibration(phy_base, 0x1);
+    if (phys_in_chip > 4)
+    {
+        BG_Calibration(phy_base + 0x4, 0x1);
+    }
+
+    for (port = 0; port < phys_in_chip; port++)
+    {
+        if (port < 4)
+        {
+            phy_group = phy_base;     /* PHY group 1 */
+        }
+        else
+        {
+            phy_group = phy_base + 0x04;     /* PHY group 2 */
+        }
+        phy_addr = phy_base + port;
+        R50_Calibration(phy_addr, phy_group);
+        TX_OFS_Calibration(phy_addr, phy_group);
+        TX_AMP_Calibration(phy_addr, phy_group);
+    }
+
+    for (port = 0; port < phys_in_chip; port++)
+    {
+        phy_addr = phy_base + port;
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x017d, 0x0000);
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x017e, 0x0000);
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x017f, 0x0000);
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x0180, 0x0000);
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x0181, 0x0000);
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x0182, 0x0000);
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x0183, 0x0000);
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x0184, 0x0000);
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x00db, 0x0000);  // disable analog calibration circuit
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x00dc, 0x0000);  // disable Tx offset calibration circuit
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x003e, 0x0000);  // disable Tx VLD force mode
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x00dd, 0x0000);  // disable Tx offset/amplitude calibration circuit
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0x0145, 0x1000);  // enable auto MDI/MDIX
+
+        set_gphy_reg_cl22(phy_addr, 0, 0x1200);
+        /* GPHY Rx low pass filter */
+        set_gphy_reg_cl45(phy_addr, 0x1e, 0xc7, 0xd000);
+        /* patch */
+        for (index = 0; index < TOTAL_PATCH_C45_ITEMS; index++)
+        {
+            set_gphy_reg_cl45(phy_addr, C45_PATCH_TABLE[index][0], C45_PATCH_TABLE[index][1], C45_PATCH_TABLE[index][2]);
+        }
+        for (index = 0; index < TOTAL_PATCH_TR_ITEMS; index++)
+        {
+            TR_RegWr(phy_addr, TR_PATCH_TABLE[index][0], TR_PATCH_TABLE[index][1]);
+        }
+        set_gphy_reg_cl22(phy_addr, 0x1f, 0x0  );
+        set_gphy_reg_cl22(phy_addr, 0x1f, 0x3  );
+        set_gphy_reg_cl22(phy_addr, 0x1c, 0xc92);
+        set_gphy_reg_cl22(phy_addr, 0x1d, 0x01 );
+        set_gphy_reg_cl22(phy_addr, 0x1f, 0x0  );
+    }
+    gphy_eee_patch(phy_base);
+}
+
+/* LOCAL SUBPROGRAM BODIES
+ */
+void TR_RegWr(uint16_t phyadd, uint16_t tr_reg_addr, uint32_t tr_data)
+{
+    set_gphy_reg_cl22(phyadd, 0x1F, 0x52b5);       /* page select */
+    set_gphy_reg_cl22(phyadd, 0x11, (uint16_t)(tr_data & 0xffff));
+    set_gphy_reg_cl22(phyadd, 0x12, (uint16_t)(tr_data >> 16));
+    set_gphy_reg_cl22(phyadd, 0x10, (uint16_t)(tr_reg_addr | TrReg_WR));
+    set_gphy_reg_cl22(phyadd, 0x1F, 0x0);          /* page resetore */
+    return;
+}
+
+uint8_t BG_Calibration(uint8_t phyadd, int8_t calipolarity)
+{
+    int8_t rg_zcal_ctrl = 0, calibration_polarity = 0;
+    uint8_t all_ana_cal_status = 1;
+    uint16_t ad_cal_comp_out_init = 0;
+
+    /* setting */
+    set_gphy_reg_cl22(phyadd, RgAddr_Reg1Fh, CL22_Page_Reg);        // g0
+    set_gphy_reg_cl22(phyadd, RgAddr_Reg00h, AN_disable_force_1000M);  // AN disable, force 1000M
+    set_gphy_reg_cl45(phyadd, DEVID_1F, RgAddr_dev1Fh_reg100h, BG_voltage_output);// BG voltage output
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg145h, Fix_mdi);// fix mdi
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Fh_reg0FFh, 0x2);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Cal_control_BG);// 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Disable_all);// 1e_dc[0]:rg_txvos_calen
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0E1h, Disable_all);// 1e_e1[4]:rg_cal_refsel(0:1.2V) enable BG 1.2V to REXT PAD
+
+    /* calibrate */
+    rg_zcal_ctrl = ZCAL_MIDDLE;
+
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0E0h, (uint16_t)rg_zcal_ctrl);
+
+    anacal_exe(phyadd);
+    if (all_ana_cal_status == 0)
+    {
+        all_ana_cal_status = ANACAL_ERROR;
+    }
+    ad_cal_comp_out_init = (get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Ah) >> 8) & 0x1;
+
+
+    if (ad_cal_comp_out_init == 1)
+    {
+        calibration_polarity = -calipolarity;
+    }
+    else // ad_cal_comp_out_init == 0
+    {
+        calibration_polarity = calipolarity;
+    }
+
+    while (all_ana_cal_status < ANACAL_ERROR)
+    {
+        rg_zcal_ctrl += calibration_polarity;
+
+        set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0E0h, (uint16_t)rg_zcal_ctrl);
+
+
+        anacal_exe(phyadd);
+
+        if (all_ana_cal_status == 0)
+        {
+            all_ana_cal_status = ANACAL_ERROR;
+        }
+
+        else if (((get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Ah) >> 8) & 0x1) != ad_cal_comp_out_init)
+        {
+            all_ana_cal_status = ANACAL_FINISH;
+        }
+        else
+        {
+            if ((rg_zcal_ctrl == 0x3F) || (rg_zcal_ctrl == 0x00))
+            {
+                all_ana_cal_status = ANACAL_SATURATION;  // need to FT
+                rg_zcal_ctrl = ZCAL_MIDDLE;  // 0 dB
+            }
+        }
+    }
+
+    if (all_ana_cal_status == ANACAL_ERROR)
+    {
+        rg_zcal_ctrl = ZCAL_MIDDLE;  // 0 dB
+
+        set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0E0h, (uint16_t)rg_zcal_ctrl);
+    }
+    else
+    {
+        // rg_zcal_ctrl[5:0] rg_rext_trim[13:8]
+        set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0E0h, (uint16_t)((rg_zcal_ctrl << 8) | rg_zcal_ctrl));
+
+        // 1f_115[2:0](rg_bg_rasel) = rg_zcal_ctrl[5:3]
+        set_gphy_reg_cl45(phyadd, DEVID_1F, RgAddr_dev1Fh_reg115h, (uint16_t)((rg_zcal_ctrl & 0x3f) >> 3));
+    }
+
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Disable_all);
+    return all_ana_cal_status;
+}
+
+uint8_t R50_Calibration(uint8_t phyadd, uint8_t phyadd_common)
+{
+    int8_t rg_zcal_ctrl = 0, rg_r50ohm_rsel_tx = 0, calibration_polarity = 0;
+    uint8_t all_ana_cal_status = 1;
+    int16_t backup_dev1e_e0 = 0, ad_cal_comp_out_init = 0, calibration_pair = 0;
+
+    /* setting */
+    set_gphy_reg_cl22(phyadd, RgAddr_Reg1Fh, CL22_Page_Reg);        // g0
+    set_gphy_reg_cl22(phyadd, RgAddr_Reg00h, AN_disable_force_1000M);  // AN disable, force 1000M
+
+    set_gphy_reg_cl45(phyadd_common, DEVID_1F, RgAddr_dev1Fh_reg100h, BG_voltage_output); // BG voltage output
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg145h, Fix_mdi); // fix mdi
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg185h, Disable_tx_slew_control); // disable tx slew control
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0FBh, LDO_control); // ldo
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Cal_control_R50); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Disable_all); // 1e_dc[0]:rg_txvos_calen
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0E1h, Disable_all); // 1e_e1[4]:rg_cal_refsel(0:1.2V) enable BG 1.2V to REXT PAD
+
+    for (calibration_pair = ANACAL_PAIR_A; calibration_pair <= ANACAL_PAIR_D; calibration_pair++)
+    {
+        all_ana_cal_status = 1;
+
+        if (calibration_pair == ANACAL_PAIR_A)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Cal_control_R50_pairA_ENABLE); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Zcalen_A_ENABLE);
+        }
+        else if (calibration_pair == ANACAL_PAIR_B)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Cal_control_R50); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Zcalen_B_ENABLE); // 1e_dc[12]:rg_zcalen_b
+        }
+        else if (calibration_pair == ANACAL_PAIR_C)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Cal_control_R50); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Zcalen_C_ENABLE); // 1e_dc[8]:rg_zcalen_c
+        }
+        else // if(calibration_pair == ANACAL_PAIR_D)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Cal_control_R50); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen, [0]:rg_zcalen_a
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Zcalen_D_ENABLE); // 1e_dc[4]:rg_zcalen_d
+        }
+
+        /* calibrate */
+        rg_zcal_ctrl = ZCAL_MIDDLE;             // start with 0 dB
+
+        backup_dev1e_e0 = (get_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0E0h)&(~0x003f));
+        set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0E0h, (backup_dev1e_e0 | rg_zcal_ctrl));
+
+        anacal_exe(phyadd_common);
+        if (all_ana_cal_status == 0)
+        {
+            all_ana_cal_status = ANACAL_ERROR;
+        }
+
+        ad_cal_comp_out_init = (get_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg17Ah) >> 8) & 0x1;  // 1e_17a[8]:ad_cal_comp_out
+
+        if (ad_cal_comp_out_init == 1)
+        {
+            calibration_polarity = -1;
+        }
+        else
+        {
+            calibration_polarity = 1;
+        }
+
+        while (all_ana_cal_status < ANACAL_ERROR)
+        {
+            rg_zcal_ctrl += calibration_polarity;
+
+            set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0E0h, (backup_dev1e_e0 | rg_zcal_ctrl));
+
+            anacal_exe(phyadd_common);
+
+            if (all_ana_cal_status == 0)
+            {
+                all_ana_cal_status = ANACAL_ERROR;
+            }
+            else if (((get_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg17Ah) >> 8) & 0x1) != ad_cal_comp_out_init)
+            {
+                all_ana_cal_status = ANACAL_FINISH;
+            }
+            else
+            {
+                if ((rg_zcal_ctrl == 0x3F) || (rg_zcal_ctrl == 0x00))
+                {
+                    all_ana_cal_status = ANACAL_SATURATION;  // need to FT
+                    rg_zcal_ctrl = ZCAL_MIDDLE;  // 0 dB
+                }
+            }
+        }
+
+        if (all_ana_cal_status == ANACAL_ERROR)
+        {
+            rg_r50ohm_rsel_tx = ZCAL_MIDDLE;  // 0 dB
+        }
+        else
+        {
+            if (rg_zcal_ctrl > (0x3F - R50_OFFSET_VALUE))
+            {
+                all_ana_cal_status = ANACAL_SATURATION;  // need to FT
+                rg_zcal_ctrl = ZCAL_MIDDLE;  // 0 dB
+            }
+            else
+            {
+                rg_zcal_ctrl += R50_OFFSET_VALUE;
+            }
+
+            rg_r50ohm_rsel_tx = ZCAL_TO_R50ohm_TBL[rg_zcal_ctrl];
+        }
+
+        if (calibration_pair == ANACAL_PAIR_A)
+        {
+            // cr_r50ohm_rsel_tx_a
+            ad_cal_comp_out_init = get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg174h)&(~MASK_r50ohm_rsel_tx_a);
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg174h, (ad_cal_comp_out_init | (((rg_r50ohm_rsel_tx << 8) & MASK_MSB_8bit) | Rg_r50ohm_rsel_tx_a_en))); // 1e_174[15:8]
+        }
+        else if (calibration_pair == ANACAL_PAIR_B)
+        {
+            // cr_r50ohm_rsel_tx_b
+            ad_cal_comp_out_init = get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg174h)&(~MASK_r50ohm_rsel_tx_b);
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg174h, (ad_cal_comp_out_init | (((rg_r50ohm_rsel_tx << 0) & MASK_LSB_8bit) | Rg_r50ohm_rsel_tx_b_en))); // 1e_174[7:0]
+        }
+        else if (calibration_pair == ANACAL_PAIR_C)
+        {
+            // cr_r50ohm_rsel_tx_c
+            ad_cal_comp_out_init = get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg175h)&(~MASK_r50ohm_rsel_tx_c);
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg175h, (ad_cal_comp_out_init | (((rg_r50ohm_rsel_tx << 8) & MASK_MSB_8bit) | Rg_r50ohm_rsel_tx_c_en))); // 1e_175[15:8]
+        }
+        else // if(calibration_pair == ANACAL_PAIR_D)
+        {
+            // cr_r50ohm_rsel_tx_d
+            ad_cal_comp_out_init = get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg175h)&(~MASK_r50ohm_rsel_tx_d);
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg175h, (ad_cal_comp_out_init | (((rg_r50ohm_rsel_tx << 0) & MASK_LSB_8bit) | Rg_r50ohm_rsel_tx_d_en))); // 1e_175[7:0]
+        }
+    }
+
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Disable_all);
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Disable_all);
+
+    return all_ana_cal_status;
+}
+
+uint8_t TX_OFS_Calibration(uint8_t phyadd, uint8_t phyadd_common)
+{
+    int8_t tx_offset_index = 0, calibration_polarity = 0;
+    uint8_t all_ana_cal_status = 1, tx_offset_reg_shift = 0, tbl_idx = 0;
+    int16_t ad_cal_comp_out_init = 0, calibration_pair = 0, tx_offset_reg = 0, reg_temp = 0;
+
+    /* setting */
+    set_gphy_reg_cl22(phyadd, RgAddr_Reg1Fh, CL22_Page_Reg);        // g0
+    set_gphy_reg_cl22(phyadd, RgAddr_Reg00h, AN_disable_force_1000M);  // AN disable, force 1000M
+
+    set_gphy_reg_cl45(phyadd, DEVID_1F, RgAddr_dev1Fh_reg100h, BG_voltage_output); // BG voltage output
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg145h, Fix_mdi); // fix mdi
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg185h, Disable_tx_slew_control); // disable tx slew control
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0FBh, LDO_control); // ldo
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Cal_control_TX_OFST); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Rg_txvos_calen_ENABLE); // 1e_dc[0]:rg_txvos_calen
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Cal_control_TX_OFST); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Rg_txvos_calen_ENABLE); // 1e_dc[0]:rg_txvos_calen
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0E1h, Disable_all); // 1e_e1[4]:rg_cal_refsel(0:1.2V) enable BG 1.2V to REXT PAD
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg096h, Bypass_tx_offset_cal); // 1e_96[15]:bypass_tx_offset_cal, Hw bypass, Fw cal
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg03Eh, Enable_Tx_VLD); // 1e_3e:enable Tx VLD
+
+    for (calibration_pair = ANACAL_PAIR_A; calibration_pair <= ANACAL_PAIR_D; calibration_pair++)
+    {
+        all_ana_cal_status = 1;
+
+        tbl_idx = TX_OFFSET_0mV_idx;
+        tx_offset_index = EN753x_TX_OFS_TBL[tbl_idx];
+
+        if (calibration_pair == ANACAL_PAIR_A)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DDh, Rg_txg_calen_a_ENABLE);       // 1e_dd[12]:rg_txg_calen_a
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Dh, (Force_dasn_dac_in0_ENABLE | DAC_IN_0V));  // 1e_17d:dac_in0_a
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg181h, (Force_dasn_dac_in1_ENABLE | DAC_IN_0V));  // 1e_181:dac_in1_a
+
+            reg_temp = (get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg172h)&(~MASK_cr_tx_amp_offset_MSB));
+            tx_offset_reg_shift = 8;  // 1e_172[13:8]
+            tx_offset_reg = RgAddr_dev1Eh_reg172h;
+        }
+        else if (calibration_pair == ANACAL_PAIR_B)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DDh, Rg_txg_calen_b_ENABLE);       // 1e_dd[8]:rg_txg_calen_b
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Eh, (Force_dasn_dac_in0_ENABLE | DAC_IN_0V));  // 1e_17e:dac_in0_b
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg182h, (Force_dasn_dac_in1_ENABLE | DAC_IN_0V));  // 1e_182:dac_in1_b
+
+            reg_temp = (get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg172h)&(~MASK_cr_tx_amp_offset_LSB));
+            tx_offset_reg_shift = 0;  // 1e_172[5:0]
+            tx_offset_reg = RgAddr_dev1Eh_reg172h;
+        }
+        else if (calibration_pair == ANACAL_PAIR_C)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DDh, Rg_txg_calen_c_ENABLE);       // 1e_dd[4]:rg_txg_calen_c
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Fh, (Force_dasn_dac_in0_ENABLE | DAC_IN_0V));  // 1e_17f:dac_in0_c
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg183h, (Force_dasn_dac_in1_ENABLE | DAC_IN_0V));  // 1e_183:dac_in1_c
+
+            reg_temp = (get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg173h)&(~MASK_cr_tx_amp_offset_MSB));
+            tx_offset_reg_shift = 8;  // 1e_173[13:8]
+            tx_offset_reg = RgAddr_dev1Eh_reg173h;
+        }
+        else // if(calibration_pair == ANACAL_PAIR_D)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DDh, Rg_txg_calen_d_ENABLE);       // 1e_dd[0]:rg_txg_calen_d
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg180h, (Force_dasn_dac_in0_ENABLE | DAC_IN_0V));  // 1e_180:dac_in0_d
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg184h, (Force_dasn_dac_in1_ENABLE | DAC_IN_0V));  // 1e_184:dac_in1_d
+
+            reg_temp = (get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg173h)&(~MASK_cr_tx_amp_offset_LSB));
+            tx_offset_reg_shift = 0;  // 1e_173[5:0]
+            tx_offset_reg = RgAddr_dev1Eh_reg173h;
+        }
+
+        /* calibrate */
+        //tx_offset_index = TX_AMP_OFFSET_0mV;
+        tbl_idx = TX_OFFSET_0mV_idx;
+        tx_offset_index = EN753x_TX_OFS_TBL[tbl_idx];
+        set_gphy_reg_cl45(phyadd, DEVID_1E, tx_offset_reg, (reg_temp | (tx_offset_index << tx_offset_reg_shift)));  // 1e_172, 1e_173
+
+        anacal_exe(phyadd_common);
+        if (all_ana_cal_status == 0)
+        {
+            all_ana_cal_status = ANACAL_ERROR;
+        }
+
+        ad_cal_comp_out_init = (get_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg17Ah) >> 8) & 0x1;  // 1e_17a[8]:ad_cal_comp_out
+
+        if (ad_cal_comp_out_init == 1)
+        {
+            calibration_polarity = -1;
+        }
+        else
+        {
+            calibration_polarity = 1;
+        }
+
+        while (all_ana_cal_status < ANACAL_ERROR)
+        {
+            tbl_idx += calibration_polarity;
+            tx_offset_index = EN753x_TX_OFS_TBL[tbl_idx];
+
+            set_gphy_reg_cl45(phyadd, DEVID_1E, tx_offset_reg, (reg_temp | (tx_offset_index << tx_offset_reg_shift)));  // 1e_172, 1e_173
+
+            anacal_exe(phyadd_common);
+
+            if (all_ana_cal_status == 0)
+            {
+                all_ana_cal_status = ANACAL_ERROR;
+            }
+            else if (((get_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg17Ah) >> 8) & 0x1) != ad_cal_comp_out_init)
+            {
+                all_ana_cal_status = ANACAL_FINISH;
+            }
+            else
+            {
+                if ((tx_offset_index == 0x3f) || (tx_offset_index == 0x1f))
+                {
+                    all_ana_cal_status = ANACAL_SATURATION;  // need to FT
+                }
+            }
+        }
+
+        if (all_ana_cal_status == ANACAL_ERROR)
+        {
+            tbl_idx = TX_OFFSET_0mV_idx;
+            tx_offset_index = EN753x_TX_OFS_TBL[tbl_idx];
+
+            set_gphy_reg_cl45(phyadd, DEVID_1E, tx_offset_reg, (reg_temp | (tx_offset_index << tx_offset_reg_shift)));  // cr_tx_amp_offset_a/b/c/d, 1e_172, 1e_173
+        }
+    }
+
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Dh, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Eh, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Fh, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg180h, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg181h, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg182h, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg183h, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg184h, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Disable_all); // disable analog calibration circuit
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Disable_all); // disable Tx offset calibration circuit
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Disable_all); // disable analog calibration circuit
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Disable_all); // disable Tx offset calibration circuit
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg03Eh, Disable_all); // disable Tx VLD force mode
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DDh, Disable_all); // disable Tx offset/amplitude calibration circuit
+
+    return all_ana_cal_status;
+}
+
+uint8_t TX_AMP_Calibration(uint8_t phyadd, uint8_t phyadd_common)
+{
+    int8_t tx_amp_index = 0, calibration_polarity = 0;
+    uint8_t all_ana_cal_status = 1, tx_amp_reg_shift = 0;
+    uint8_t tx_amp_reg = 0, tx_amp_reg_100 = 0, tst_offset = 0, hbt_offset = 0, gbe_offset = 0, tbt_offset = 0;
+    uint16_t ad_cal_comp_out_init = 0, calibration_pair = 0, reg_temp = 0;
+
+  //phyadd_common = phyadd;
+
+    /* setting */
+    set_gphy_reg_cl22(phyadd, RgAddr_Reg1Fh, CL22_Page_Reg);        // g0
+    set_gphy_reg_cl22(phyadd, RgAddr_Reg00h, AN_disable_force_1000M);  // AN disable, force 1000M
+
+    set_gphy_reg_cl45(phyadd, DEVID_1F, RgAddr_dev1Fh_reg100h, BG_voltage_output); // BG voltage output
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg145h, Fix_mdi); // fix mdi
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg185h, Disable_tx_slew_control); // disable tx slew control
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0FBh, LDO_control); // ldo
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Cal_control_TX_AMP); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Rg_txvos_calen_ENABLE); // 1e_dc[0]:rg_txvos_calen
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0E1h, Rg_cal_refsel_ENABLE); // 1e_e1[4]:rg_cal_refsel(0:1.2V) enable BG 1.2V to REXT PAD
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Cal_control_TX_AMP); // 1e_db[12]:rg_cal_ckinv, [8]:rg_ana_calen, [4]:rg_rext_calen
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Rg_txvos_calen_ENABLE); // 1e_dc[0]:rg_txvos_calen
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg0E1h, Rg_cal_refsel_ENABLE); // 1e_e1[4]:rg_cal_refsel(0:1.2V) enable BG 1.2V to REXT PAD
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg096h, Bypass_tx_offset_cal); // 1e_96[15]:bypass_tx_offset_cal, Hw bypass, Fw cal
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg03Eh, Enable_Tx_VLD); // 1e_3e:enable Tx VLD
+
+    for (calibration_pair = ANACAL_PAIR_A; calibration_pair <= ANACAL_PAIR_D; calibration_pair++)
+    //for (calibration_pair = ANACAL_PAIR_A; calibration_pair <= ANACAL_PAIR_B; calibration_pair++) // debugging
+    {
+        all_ana_cal_status = 1;
+
+        /* calibrate */
+        tx_amp_index = TX_AMP_MIDDLE;   // start with 0 dB
+        if (calibration_pair == ANACAL_PAIR_A)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DDh, Rg_txg_calen_a_ENABLE);       // 1e_dd[12]:rg_txg_calen_a amp calibration enable
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Dh, (Force_dasn_dac_in0_ENABLE | DAC_IN_2V));  // 1e_17d:dac_in0_a
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg181h, (Force_dasn_dac_in1_ENABLE | DAC_IN_2V));  // 1e_181:dac_in1_a
+
+            reg_temp = (get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg012h)&(~MASK_da_tx_i2mpb_a_gbe));
+            tx_amp_reg_shift = 10;  // 1e_12[15:10]
+            tx_amp_reg = RgAddr_dev1Eh_reg012h;
+            tx_amp_reg_100 = 0x16;
+        }
+        else if (calibration_pair == ANACAL_PAIR_B)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DDh, Rg_txg_calen_b_ENABLE);       // 1e_dd[8]:rg_txg_calen_b amp calibration enable
+            //Serial.println(Rg_txg_calen_b_ENABLE, HEX);
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Eh, (Force_dasn_dac_in0_ENABLE | DAC_IN_2V));  // 1e_17e:dac_in0_b
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg182h, (Force_dasn_dac_in1_ENABLE | DAC_IN_2V));  // 1e_182:dac_in1_b
+
+            reg_temp = (get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg017h)&(~MASK_da_tx_i2mpb_b_c_d_gbe));
+            tx_amp_reg_shift = 8; // 1e_17[13:8]
+            tx_amp_reg = RgAddr_dev1Eh_reg017h;
+            tx_amp_reg_100 = 0x18;
+        }
+        else if (calibration_pair == ANACAL_PAIR_C)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DDh, Rg_txg_calen_c_ENABLE);       // 1e_dd[4]:rg_txg_calen_c amp calibration enable
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Fh, (Force_dasn_dac_in0_ENABLE | DAC_IN_2V));  // 1e_17f:dac_in0_c
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg183h, (Force_dasn_dac_in1_ENABLE | DAC_IN_2V));  // 1e_183:dac_in1_c
+
+            reg_temp = (get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg019h)&(~MASK_da_tx_i2mpb_b_c_d_gbe));
+            tx_amp_reg_shift = 8; // 1e_19[13:8]
+            tx_amp_reg = RgAddr_dev1Eh_reg019h;
+            tx_amp_reg_100 = 0x20;
+        }
+        else //if(calibration_pair == ANACAL_PAIR_D)
+        {
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DDh, Rg_txg_calen_d_ENABLE);       // 1e_dd[0]:rg_txg_calen_d amp calibration enable
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg180h, (Force_dasn_dac_in0_ENABLE | DAC_IN_2V));  // 1e_180:dac_in0_d
+            set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg184h, (Force_dasn_dac_in1_ENABLE | DAC_IN_2V));  // 1e_184:dac_in1_d
+
+            reg_temp = (get_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg021h)&(~MASK_da_tx_i2mpb_b_c_d_gbe));
+            tx_amp_reg_shift = 8; // 1e_21[13:8]
+            tx_amp_reg = RgAddr_dev1Eh_reg021h;
+            tx_amp_reg_100 = 0x22;
+        }
+
+        /* calibrate */
+        tx_amp_index = TX_AMP_MIDDLE; // start with 0 dB
+
+        set_gphy_reg_cl45(phyadd, DEVID_1E, tx_amp_reg, (reg_temp | (tx_amp_index << tx_amp_reg_shift))); // 1e_12/17/19/21
+
+        anacal_exe(phyadd_common);
+        if (all_ana_cal_status == 0)
+        {
+            all_ana_cal_status = ANACAL_ERROR;
+        }
+
+
+        ad_cal_comp_out_init = (get_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg17Ah) >> 8) & 0x1;    // 1e_17a[8]:ad_cal_comp_out
+        //Serial.println(ad_cal_comp_out_init, HEX);
+
+        if (ad_cal_comp_out_init == 1)
+        {
+            calibration_polarity = -1;
+        }
+        else
+        {
+            calibration_polarity = 1;
+        }
+        while (all_ana_cal_status < ANACAL_ERROR)
+        {
+            tx_amp_index += calibration_polarity;
+            //Serial.println(tx_amp_index, HEX);
+
+            set_gphy_reg_cl45(phyadd, DEVID_1E, tx_amp_reg, (reg_temp | (tx_amp_index << tx_amp_reg_shift)));
+
+            anacal_exe(phyadd_common);
+
+            if (all_ana_cal_status == 0)
+            {
+                all_ana_cal_status = ANACAL_ERROR;
+            }
+            else if (((get_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg17Ah) >> 8) & 0x1) != ad_cal_comp_out_init)
+            {
+                all_ana_cal_status = ANACAL_FINISH;
+                //Serial.print("    tx_amp_index: ");
+                //Serial.println(tx_amp_index, HEX);
+                //reg_temp = get_gphy_reg_cl45(phyadd, 0x1e, tx_amp_reg)&(~0xff00);
+                //set_gphy_reg_cl45(phyadd, 0x1e, tx_amp_reg, (reg_temp|((tx_amp_index + tst_offset)<<tx_amp_reg_shift)));  // for gbe(DAC)
+            }
+            else
+            {
+                if ((tx_amp_index == 0x3f) || (tx_amp_index == 0x00))
+                {
+                    all_ana_cal_status = ANACAL_SATURATION;  // need to FT
+                    tx_amp_index = TX_AMP_MIDDLE;
+                }
+            }
+        }
+
+        if (all_ana_cal_status == ANACAL_ERROR)
+        {
+            tx_amp_index = TX_AMP_MIDDLE;
+        }
+
+        // da_tx_i2mpb_a_gbe / b/c/d, only GBE for now
+        set_gphy_reg_cl45(phyadd, DEVID_1E, tx_amp_reg, ((tx_amp_index - TXAMP_offset) | ((tx_amp_index - TXAMP_offset) << tx_amp_reg_shift)));  // // temp modify
+        set_gphy_reg_cl45(phyadd, DEVID_1E, tx_amp_reg_100, ((tx_amp_index - TXAMP_offset) | ((tx_amp_index + TX_i2mpb_hbt_ofs) << tx_amp_reg_shift)));
+    }
+
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Dh, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Eh, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg17Fh, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg180h, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg181h, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg182h, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg183h, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg184h, Disable_all);
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DBh, Disable_all); // disable analog calibration circuit
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DCh, Disable_all); // disable Tx offset calibration circuit
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg03Eh, Disable_all); // disable Tx VLD force mode
+    set_gphy_reg_cl45(phyadd, DEVID_1E, RgAddr_dev1Eh_reg0DDh, Disable_all); // disable Tx offset/amplitude calibration circuit
+
+    return all_ana_cal_status;
+}
+
+void set_gphy_reg_cl22(uint8_t phyad, uint8_t reg, uint16_t value)
+{
+    an8855_phy_write(phyad-g_smi_addr, reg, value);
+    /*
+       gsw_top_reg_REG_PHY_IAC REG_PHY_IAC_val;
+       gsw_top_reg_REG_PHY_IAD REG_PHY_IAD_val;
+
+    // Wait until done
+    do
+    {
+    REG_PHY_IAC_val.Raw = io_read32(RgAddr_gsw_top_reg_REG_PHY_IAC);
+    }
+    while(REG_PHY_IAC_val.Bits.csr_phy_acs_st);
+
+    // Set address
+    REG_PHY_IAC_val.Bits.csr_mdio_st = 1;
+    REG_PHY_IAC_val.Bits.csr_mdio_cmd = 1;
+    REG_PHY_IAC_val.Bits.csr_mdio_phy_addr = phyad;
+    REG_PHY_IAC_val.Bits.csr_mdio_reg_addr = reg;
+    REG_PHY_IAC_val.Bits.csr_mdio_wr_data = value;
+    REG_PHY_IAC_val.Bits.csr_phy_acs_st = 1;
+
+    io_write32(RgAddr_gsw_top_reg_REG_PHY_IAC, REG_PHY_IAC_val.Raw);
+    */
+}
+
+UINT16 get_gphy_reg_cl45(uint8_t prtid, uint8_t devid, uint16_t reg)
+{
+    UINT32 rdata = 0;
+
+    an8855_phy_read_cl45(prtid-g_smi_addr, devid, reg, &rdata);
+    return ((UINT16)rdata);
+    /*
+    gsw_top_reg_REG_PHY_IAC REG_PHY_IAC_val;
+    gsw_top_reg_REG_PHY_IAD REG_PHY_IAD_val;
+
+    // Wait until done
+    do
+    {
+    REG_PHY_IAC_val.Raw = io_read32(RgAddr_gsw_top_reg_REG_PHY_IAC);
+    }
+    while(REG_PHY_IAC_val.Bits.csr_phy_acs_st);
+
+    // Set address
+    REG_PHY_IAC_val.Bits.csr_mdio_st = 0;
+    REG_PHY_IAC_val.Bits.csr_mdio_cmd = 0;
+    REG_PHY_IAC_val.Bits.csr_mdio_phy_addr = prtid;
+    REG_PHY_IAC_val.Bits.csr_mdio_reg_addr = devid;
+    REG_PHY_IAC_val.Bits.csr_mdio_wr_data = reg;
+    REG_PHY_IAC_val.Bits.csr_phy_acs_st = 1;
+
+    io_write32(RgAddr_gsw_top_reg_REG_PHY_IAC, REG_PHY_IAC_val.Raw);
+
+    // Wait until done
+    do
+    {
+    REG_PHY_IAC_val.Raw = io_read32(RgAddr_gsw_top_reg_REG_PHY_IAC);
+    }
+    while(REG_PHY_IAC_val.Bits.csr_phy_acs_st);
+
+    // Read value
+    REG_PHY_IAC_val.Bits.csr_mdio_st = 0;
+    REG_PHY_IAC_val.Bits.csr_mdio_cmd = 3;
+    REG_PHY_IAC_val.Bits.csr_mdio_phy_addr = prtid;
+    REG_PHY_IAC_val.Bits.csr_mdio_reg_addr = devid;
+    REG_PHY_IAC_val.Bits.csr_mdio_wr_data = 0;
+    REG_PHY_IAC_val.Bits.csr_phy_acs_st = 1;
+    io_write32(RgAddr_gsw_top_reg_REG_PHY_IAC, REG_PHY_IAC_val.Raw);
+
+    // Wait until done
+    do
+    {
+    REG_PHY_IAC_val.Raw = io_read32(RgAddr_gsw_top_reg_REG_PHY_IAC);
+    }
+    while(REG_PHY_IAC_val.Bits.csr_phy_acs_st);
+
+    REG_PHY_IAD_val.Raw = io_read32(RgAddr_gsw_top_reg_REG_PHY_IAD);
+
+    return REG_PHY_IAD_val.Raw;
+    */
+}
+
+void set_gphy_reg_cl45(uint8_t prtid, uint8_t devid, uint16_t reg, uint16_t value)
+{
+    an8855_phy_write_cl45(prtid-g_smi_addr, devid, reg, value);
+    /*
+    gsw_top_reg_REG_PHY_IAC REG_PHY_IAC_val;
+
+    // Wait until done
+    do
+    {
+        REG_PHY_IAC_val.Raw = io_read32(RgAddr_gsw_top_reg_REG_PHY_IAC);
+    }
+    while(REG_PHY_IAC_val.Bits.csr_phy_acs_st);
+
+    // Set address
+    REG_PHY_IAC_val.Bits.csr_mdio_st = 0;
+    REG_PHY_IAC_val.Bits.csr_mdio_cmd = 0;
+    REG_PHY_IAC_val.Bits.csr_mdio_phy_addr = prtid;
+    REG_PHY_IAC_val.Bits.csr_mdio_reg_addr = devid;
+    REG_PHY_IAC_val.Bits.csr_mdio_wr_data = reg;
+    REG_PHY_IAC_val.Bits.csr_phy_acs_st = 1;
+
+    io_write32(RgAddr_gsw_top_reg_REG_PHY_IAC, REG_PHY_IAC_val.Raw);
+
+    // Wait until done
+    do
+    {
+        REG_PHY_IAC_val.Raw = io_read32(RgAddr_gsw_top_reg_REG_PHY_IAC);
+    }
+    while(REG_PHY_IAC_val.Bits.csr_phy_acs_st);
+
+    // Write value
+    REG_PHY_IAC_val.Bits.csr_mdio_st = 0;
+    REG_PHY_IAC_val.Bits.csr_mdio_cmd = 1;
+    REG_PHY_IAC_val.Bits.csr_mdio_phy_addr = prtid;
+    REG_PHY_IAC_val.Bits.csr_mdio_reg_addr = devid;
+    REG_PHY_IAC_val.Bits.csr_mdio_wr_data = value;
+    REG_PHY_IAC_val.Bits.csr_phy_acs_st = 1;
+
+    io_write32(RgAddr_gsw_top_reg_REG_PHY_IAC, REG_PHY_IAC_val.Raw);
+    */
+}
+
+void anacal_exe(uint8_t phyadd_common)
+{
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg17Ch, 1);// da_calin_flag pull high
+    an8855_udelay(1000);
+    set_gphy_reg_cl45(phyadd_common, DEVID_1E, RgAddr_dev1Eh_reg17Ch, 0);// da_calin_flag pull low
+}
+
diff --git a/feed/app/switch/src/an8855_sdk/core/an8855_reg.h b/feed/app/switch/src/an8855_sdk/core/an8855_reg.h
new file mode 100644
index 0000000..3459cef
--- /dev/null
+++ b/feed/app/switch/src/an8855_sdk/core/an8855_reg.h
@@ -0,0 +1,191 @@
+    /* FILE NAME:  an8855_reg.h
+ * PURPOSE:
+ *      It provides AN8855 register definition.
+ * NOTES:
+ *
+ */
+
+#ifndef AN8855_REG_H
+#define AN8855_REG_H
+
+#define PORT_CTRL_BASE                      0x10208000
+#define PORT_CTRL_PORT_OFFSET               0x200
+#define PORT_CTRL_REG(p, r)                 (PORT_CTRL_BASE + (p) * PORT_CTRL_PORT_OFFSET + (r))
+#define PCR(p)                              PORT_CTRL_REG(p, 0x04)
+
+#define PORT_MAC_CTRL_BASE                  0x10210000
+#define PORT_MAC_CTRL_PORT_OFFSET           0x200
+#define PORT_MAC_CTRL_REG(p, r)             (PORT_MAC_CTRL_BASE + (p) * PORT_MAC_CTRL_PORT_OFFSET + (r))
+#define PMCR(p)                             PORT_MAC_CTRL_REG(p, 0x00)
+
+/* Port debug count register */
+#define DBG_CNT_BASE                        0x3018
+#define DBG_CNT_PORT_BASE                   0x100
+#define DBG_CNT(p)                          (DBG_CNT_BASE + (p) * DBG_CNT_PORT_BASE)
+#define DIS_CLR                             (1 << 31)
+
+#define GMACCR                              (PORT_MAC_CTRL_BASE + 0x30e0)
+#define MTCC_LMT_S                          8
+#define MAX_RX_JUMBO_S                      4
+
+/* Values of MAX_RX_PKT_LEN */
+#define RX_PKT_LEN_1518                     0
+#define RX_PKT_LEN_1536                     1
+#define RX_PKT_LEN_1522                     2
+#define RX_PKT_LEN_MAX_JUMBO                3
+
+/* Fields of PMCR */
+#define FORCE_MODE                          (1 << 31)
+#define IPG_CFG_S                           20
+#define IPG_CFG_M                           0x300000
+#define EXT_PHY                             (1 << 19)
+#define MAC_MODE                            (1 << 18)
+#define MAC_TX_EN                           (1 << 16)
+#define MAC_RX_EN                           (1 << 15)
+#define MAC_PRE                             (1 << 14)
+#define BKOFF_EN                            (1 << 12)
+#define BACKPR_EN                           (1 << 11)
+#define FORCE_EEE1G                         (1 << 7)
+#define FORCE_EEE100                        (1 << 6)
+#define FORCE_RX_FC                         (1 << 5)
+#define FORCE_TX_FC                         (1 << 4)
+#define FORCE_SPD_S                         28
+#define FORCE_SPD_M                         0x70000000
+#define FORCE_DPX                           (1 << 25)
+#define FORCE_LINK                          (1 << 24)
+
+/* Fields of PMSR */
+#define EEE1G_STS                           (1 << 7)
+#define EEE100_STS                          (1 << 6)
+#define RX_FC_STS                           (1 << 5)
+#define TX_FC_STS                           (1 << 4)
+#define MAC_SPD_STS_S                       28
+#define MAC_SPD_STS_M                       0x70000000
+#define MAC_DPX_STS                         (1 << 25)
+#define MAC_LNK_STS                         (1 << 24)
+
+/* Values of MAC_SPD_STS */
+#define MAC_SPD_10                          0
+#define MAC_SPD_100                         1
+#define MAC_SPD_1000                        2
+#define MAC_SPD_2500                        3
+
+/* Values of IPG_CFG */
+#define IPG_96BIT                           0
+#define IPG_96BIT_WITH_SHORT_IPG            1
+#define IPG_64BIT                           2
+
+#define SGMII_REG_BASE                      0x5000
+#define SGMII_REG_PORT_BASE                 0x1000
+#define SGMII_REG(p, r)                     (SGMII_REG_BASE + (p) * SGMII_REG_PORT_BASE + (r))
+#define PCS_CONTROL_1(p)                    SGMII_REG(p, 0x00)
+#define SGMII_MODE(p)                       SGMII_REG(p, 0x20)
+#define QPHY_PWR_STATE_CTRL(p)              SGMII_REG(p, 0xe8)
+#define PHYA_CTRL_SIGNAL3(p)                SGMII_REG(p, 0x128)
+
+/* Fields of PCS_CONTROL_1 */
+#define SGMII_LINK_STATUS                   (1 << 18)
+#define SGMII_AN_ENABLE                     (1 << 12)
+#define SGMII_AN_RESTART                    (1 << 9)
+
+/* Fields of SGMII_MODE */
+#define SGMII_REMOTE_FAULT_DIS              (1 << 8)
+#define SGMII_IF_MODE_FORCE_DUPLEX          (1 << 4)
+#define SGMII_IF_MODE_FORCE_SPEED_S         0x2
+#define SGMII_IF_MODE_FORCE_SPEED_M         0x0c
+#define SGMII_IF_MODE_ADVERT_AN             (1 << 1)
+
+/* Values of SGMII_IF_MODE_FORCE_SPEED */
+#define SGMII_IF_MODE_FORCE_SPEED_10        0
+#define SGMII_IF_MODE_FORCE_SPEED_100       1
+#define SGMII_IF_MODE_FORCE_SPEED_1000      2
+
+/* Fields of QPHY_PWR_STATE_CTRL */
+#define PHYA_PWD                            (1 << 4)
+
+/* Fields of PHYA_CTRL_SIGNAL3 */
+#define RG_TPHY_SPEED_S                     2
+#define RG_TPHY_SPEED_M                     0x0c
+
+/* Values of RG_TPHY_SPEED */
+#define RG_TPHY_SPEED_1000                  0
+#define RG_TPHY_SPEED_2500                  1
+
+#define SYS_CTRL                            0x7000
+#define SW_PHY_RST                          (1 << 2)
+#define SW_SYS_RST                          (1 << 1)
+#define SW_REG_RST                          (1 << 0)
+
+#define PHY_IAC                             (0x1000e000)
+#define IAC_MAX_BUSY_TIME                   (1000)
+
+#define CLKGEN_CTRL                         0x7500
+#define CLK_SKEW_OUT_S                      8
+#define CLK_SKEW_OUT_M                      0x300
+#define CLK_SKEW_IN_S                       6
+#define CLK_SKEW_IN_M                       0xc0
+#define RXCLK_NO_DELAY                      (1 << 5)
+#define TXCLK_NO_REVERSE                    (1 << 4)
+#define GP_MODE_S                           1
+#define GP_MODE_M                           0x06
+#define GP_CLK_EN                           (1 << 0)
+
+/* Values of GP_MODE */
+#define GP_MODE_RGMII                       0
+#define GP_MODE_MII                         1
+#define GP_MODE_REV_MII                     2
+
+/* Values of CLK_SKEW_IN */
+#define CLK_SKEW_IN_NO_CHANGE               0
+#define CLK_SKEW_IN_DELAY_100PPS            1
+#define CLK_SKEW_IN_DELAY_200PPS            2
+#define CLK_SKEW_IN_REVERSE                 3
+
+/* Values of CLK_SKEW_OUT */
+#define CLK_SKEW_OUT_NO_CHANGE              0
+#define CLK_SKEW_OUT_DELAY_100PPS           1
+#define CLK_SKEW_OUT_DELAY_200PPS           2
+#define CLK_SKEW_OUT_REVERSE                3
+
+#define HWSTRAP                             0x7800
+#define XTAL_FSEL_S                         7
+#define XTAL_FSEL_M                         (1 << 7)
+
+#define XTAL_40MHZ                          0
+#define XTAL_25MHZ                          1
+
+#define PLLGP_EN                            0x7820
+#define EN_COREPLL                          (1 << 2)
+#define SW_CLKSW                            (1 << 1)
+#define SW_PLLGP                            (1 << 0)
+
+#define PLLGP_CR0                           0x78a8
+#define RG_COREPLL_EN                       (1 << 22)
+#define RG_COREPLL_POSDIV_S                 23
+#define RG_COREPLL_POSDIV_M                 0x3800000
+#define RG_COREPLL_SDM_PCW_S                1
+#define RG_COREPLL_SDM_PCW_M                0x3ffffe
+#define RG_COREPLL_SDM_PCW_CHG              (1 << 0)
+
+#define MHWSTRAP                            0x7804
+#define TOP_SIG_SR                          0x780c
+#define PAD_DUAL_SGMII_EN                   (1 << 1)
+
+/* RGMII and SGMII PLL clock */
+#define ANA_PLLGP_CR2                       0x78b0
+#define ANA_PLLGP_CR5                       0x78bc
+
+/* Efuse Register Define */
+#define GBE_EFUSE                           0x7bc8
+#define GBE_SEL_EFUSE_EN                    (1 << 0)
+
+/* GPIO_PAD_0 */
+#define GPIO_MODE0                          0x7c0c
+#define GPIO_MODE0_S                        0
+#define GPIO_MODE0_M                        0xf
+#define GPIO_0_INTERRUPT_MODE               0x1
+
+#define SMT0_IOLB                           0x7f04
+#define SMT_IOLB_5_SMI_MDC_EN               (1 << 5)
+
+#endif  /* End of AN8855_REG_H */
diff --git a/feed/app/switch/src/switch_fun_an8855.c b/feed/app/switch/src/switch_fun_an8855.c
new file mode 100644
index 0000000..e5ec490
--- /dev/null
+++ b/feed/app/switch/src/switch_fun_an8855.c
@@ -0,0 +1,1804 @@
+/*
+* switch_fun.c: switch function sets
+*/
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <string.h>
+#include <stdbool.h>
+#include <sys/ioctl.h>
+#include <sys/socket.h>
+#include <linux/if.h>
+#include <stdbool.h>
+#include <time.h>
+
+#include "switch_extend.h"
+#include "switch_netlink.h"
+#include "switch_fun.h"
+#include "switch_fun_an8855.h"
+
+#define MAC_STR         "%02X%02X%02X%02X%02X%02X"
+#define MAC2STR(m)      (m)[0],(m)[1],(m)[2],(m)[3],(m)[4],(m)[5]
+
+const static C8_T *mac_address_forward_control_string[] = {
+	"Default",
+	"CPU include",
+	"CPU exclude",
+	"CPU only",
+	"Drop"
+};
+
+struct switch_func_s an8855_switch_func = {
+	.pf_table_dump = an8855_table_dump,
+	.pf_table_clear = an8855_table_clear,
+	.pf_switch_reset = an8855_switch_reset,
+	.pf_doArlAging = an8855_doArlAging,
+	.pf_read_mib_counters = an8855_read_mib_counters,
+	.pf_clear_mib_counters = an8855_clear_mib_counters,
+	.pf_read_output_queue_counters = an8855_read_output_queue_counters,
+	.pf_read_free_page_counters = an8855_read_free_page_counters,
+	.pf_rate_control = an8855_rate_control,
+	.pf_igress_rate_set = an8855_ingress_rate_set,
+	.pf_egress_rate_set = an8855_egress_rate_set,
+	.pf_table_add = an8855_table_add,
+	.pf_table_del_fid = an8855_table_del_fid,
+	.pf_table_del_vid = an8855_table_del_vid,
+	.pf_table_search_mac_fid = an8855_table_search_mac_fid,
+	.pf_table_search_mac_vid = an8855_table_search_mac_vid,
+	.pf_global_set_mac_fc = an8855_global_set_mac_fc,
+	.pf_set_mac_pfc = an8855_not_supported,
+	.pf_qos_sch_select = an8855_qos_sch_select,
+	.pf_qos_set_base = an8855_qos_set_base,
+	.pf_qos_wfq_set_weight = an8855_qos_wfq_set_weight,
+	.pf_qos_set_portpri = an8855_qos_set_portpri,
+	.pf_qos_set_dscppri = an8855_qos_set_dscppri,
+	.pf_qos_pri_mapping_queue = an8855_qos_pri_mapping_queue,
+	.pf_doStp = an8855_doStp,
+	.pf_sip_dump = an8855_not_supported,
+	.pf_sip_add = an8855_not_supported,
+	.pf_sip_del = an8855_not_supported,
+	.pf_sip_clear = an8855_not_supported,
+	.pf_dip_dump = an8855_not_supported,
+	.pf_dip_add = an8855_not_supported,
+	.pf_dip_del = an8855_not_supported,
+	.pf_dip_clear = an8855_not_supported,
+	.pf_set_mirror_to = an8855_set_mirror_to,
+	.pf_set_mirror_from = an8855_set_mirror_from,
+	.pf_doMirrorEn = an8855_doMirrorEn,
+	.pf_doMirrorPortBased = an8855_doMirrorPortBased,
+	.pf_acl_dip_add = an8855_not_supported,
+	.pf_acl_dip_modify = an8855_not_supported,
+	.pf_acl_dip_pppoe = an8855_not_supported,
+	.pf_acl_dip_trtcm = an8855_not_supported,
+	.pf_acl_dip_meter = an8855_not_supported,
+	.pf_acl_mac_add = an8855_not_supported,
+	.pf_acl_ethertype = an8855_not_supported,
+	.pf_acl_sp_add = an8855_not_supported,
+	.pf_acl_l4_add = an8855_not_supported,
+	.pf_acl_port_enable = an8855_not_supported,
+	.pf_acl_table_add = an8855_not_supported,
+	.pf_acl_mask_table_add = an8855_not_supported,
+	.pf_acl_rule_table_add = an8855_not_supported,
+	.pf_acl_rate_table_add = an8855_not_supported,
+	.pf_vlan_dump = an8855_vlan_dump,
+	.pf_vlan_set = an8855_vlan_set,
+	.pf_vlan_clear = an8855_vlan_clear,
+	.pf_doVlanSetVid = an8855_doVlanSetVid,
+	.pf_doVlanSetPvid = an8855_doVlanSetPvid,
+	.pf_doVlanSetAccFrm = an8855_doVlanSetAccFrm,
+	.pf_doVlanSetPortAttr = an8855_doVlanSetPortAttr,
+	.pf_doVlanSetPortMode = an8855_doVlanSetPortMode,
+	.pf_doVlanSetEgressTagPCR = an8855_doVlanSetEgressTagPCR,
+	.pf_doVlanSetEgressTagPVC = an8855_doVlanSetEgressTagPVC,
+	.pf_igmp_on = an8855_not_supported,
+	.pf_igmp_off = an8855_not_supported,
+	.pf_igmp_enable = an8855_not_supported,
+	.pf_igmp_disable = an8855_not_supported,
+	.pf_collision_pool_enable = an8855_not_supported,
+	.pf_collision_pool_mac_dump = an8855_not_supported,
+	.pf_collision_pool_dip_dump = an8855_not_supported,
+	.pf_collision_pool_sip_dump = an8855_not_supported,
+	.pf_pfc_get_rx_counter = an8855_not_supported,
+	.pf_pfc_get_tx_counter = an8855_not_supported,
+	.pf_eee_enable = an8855_eee_enable,
+	.pf_eee_dump = an8855_eee_dump,
+};
+
+AIR_ERROR_NO_T
+an8855_reg_read(const UI32_T unit, const UI32_T addr_offset, UI32_T * ptr_data)
+{
+	int ret;
+
+	ret = reg_read(addr_offset, ptr_data);
+	if (ret < 0) {
+		return AIR_E_OTHERS;
+	}
+
+	return AIR_E_OK;
+}
+
+AIR_ERROR_NO_T
+an8855_reg_write(const UI32_T unit, const UI32_T addr_offset, const UI32_T data)
+{
+	int ret;
+
+	ret = reg_write(addr_offset, data);
+	if (ret < 0) {
+		return AIR_E_OTHERS;
+	}
+
+	return AIR_E_OK;
+}
+
+AIR_ERROR_NO_T
+an8855_phy_cl22_read(const UI32_T unit,
+		     const UI32_T port_id,
+		     const UI32_T addr_offset, UI32_T * ptr_data)
+{
+	int ret;
+
+	ret = mii_mgr_read(port_id, addr_offset, ptr_data);
+	if (ret < 0) {
+		return AIR_E_OTHERS;
+	}
+
+	return AIR_E_OK;
+}
+
+AIR_ERROR_NO_T
+an8855_phy_cl22_write(const UI32_T unit,
+		      const UI32_T port_id,
+		      const UI32_T addr_offset, const UI32_T data)
+{
+	int ret;
+
+	ret = mii_mgr_write(port_id, addr_offset, data);
+	if (ret < 0) {
+		return AIR_E_OTHERS;
+	}
+
+	return AIR_E_OK;
+}
+
+AIR_ERROR_NO_T
+an8855_phy_cl45_read(const UI32_T unit,
+		     const UI32_T port_id,
+		     const UI32_T dev_type,
+		     const UI32_T addr_offset, UI32_T * ptr_data)
+{
+	int ret;
+
+	ret = mii_mgr_c45_read(port_id, dev_type, addr_offset, ptr_data);
+	if (ret < 0) {
+		return AIR_E_OTHERS;
+	}
+
+	return AIR_E_OK;
+}
+
+AIR_ERROR_NO_T
+an8855_phy_cl45_write(const UI32_T unit,
+		      const UI32_T port_id,
+		      const UI32_T dev_type,
+		      const UI32_T addr_offset, const UI32_T data)
+{
+	int ret;
+
+	ret = mii_mgr_c45_write(port_id, dev_type, addr_offset, data);
+	if (ret < 0) {
+		return AIR_E_OTHERS;
+	}
+
+	return AIR_E_OK;
+}
+
+void an8855_not_supported(int argc, char *argv[])
+{
+	printf("Cmd not supported by AN8855.\n");
+}
+
+static AIR_ERROR_NO_T
+_printMacEntry(AIR_MAC_ENTRY_T * mt, UI32_T age_unit, UI8_T count, UI8_T title)
+{
+	AIR_ERROR_NO_T ret = AIR_E_OK;
+	I32_T i = 0, j = 0;
+	UI8_T first = 0;
+	UI8_T find = 0;
+	if (title) {
+		printf("%-6s%-15s%-5s%-5s%-5s%-10s%-10s%-6s\n",
+		       "unit",
+		       "mac",
+		       "ivl", "vid", "fid", "age-time", "forward", "port");
+		return ret;
+	}
+	for (i = 0; i < count; i++) {
+		printf("%-6d", age_unit);
+		printf(MAC_STR, MAC2STR(mt[i].mac));
+		printf("...");
+		if (mt[i].flags & AIR_L2_MAC_ENTRY_FLAGS_IVL) {
+			printf("%-3s..", "ivl");
+			printf("%-5d", mt[i].cvid);
+			printf("%-5s", ".....");
+		} else {
+			printf("%-3s..", "svl");
+			printf("%-5s", ".....");
+			printf("%-5d", mt[i].fid);
+		}
+		if (mt[i].flags & AIR_L2_MAC_ENTRY_FLAGS_STATIC) {
+			printf("%-7s.", "static");
+		} else {
+			printf("%d sec..", mt[i].timer);
+		}
+		printf("%-10s",
+		       mac_address_forward_control_string[mt[i].sa_fwd]);
+		first = 0;
+		find = 0;
+		for (j = (AIR_MAX_NUM_OF_PORTS - 1); j >= 0; j--) {
+			if ((mt[i].port_bitmap[0]) & (1 << j)) {
+				first = j;
+				find = 1;
+				break;
+			}
+		}
+		if (find) {
+			for (j = 0; j < AIR_MAX_NUM_OF_PORTS; j++) {
+				if ((mt[i].port_bitmap[0]) & (1 << j)) {
+					if (j == first)
+						printf("%-2d", j);
+					else
+						printf("%-2d,", j);
+				}
+			}
+		} else
+			printf("no dst port");
+		printf("\n");
+	}
+	return ret;
+}
+
+static AIR_ERROR_NO_T _str2mac(C8_T * str, C8_T * mac)
+{
+	UI32_T i;
+	C8_T tmpstr[3];
+
+	for (i = 0; i < 6; i++) {
+		strncpy(tmpstr, str + (i * 2), 2);
+		tmpstr[2] = '\0';
+		mac[i] = strtoul(tmpstr, NULL, 16);
+	}
+
+	return AIR_E_OK;
+}
+
+static void an8855_table_dump_internal(int type)
+{
+	unsigned char count = 0;
+	unsigned int total_count = 0;
+	unsigned int bucket_size = 0;
+	AIR_ERROR_NO_T ret = 0;
+	AIR_MAC_ENTRY_T *ptr_mt;
+
+	bucket_size = AIR_L2_MAC_SET_NUM;
+	ptr_mt = malloc(sizeof(AIR_MAC_ENTRY_T) * bucket_size);
+	if (ptr_mt == NULL) {
+		printf("Error, malloc fail\n\r");
+		return;
+	}
+	memset(ptr_mt, 0, sizeof(AIR_MAC_ENTRY_T) * bucket_size);
+	_printMacEntry(ptr_mt, 0, count, TRUE);
+	/* get 1st entry of MAC table */
+	ret = air_l2_getMacAddr(0, &count, ptr_mt);
+	switch (ret) {
+	case AIR_E_ENTRY_NOT_FOUND:
+		printf("Not Found!\n");
+		goto DUMP_ERROR;
+	case AIR_E_TIMEOUT:
+		printf("Time Out!\n");
+		goto DUMP_ERROR;
+	case AIR_E_BAD_PARAMETER:
+		printf("Bad Parameter!\n");
+		goto DUMP_ERROR;
+	default:
+		break;
+	}
+	total_count += count;
+	_printMacEntry(ptr_mt, 0, count, FALSE);
+	/* get other entries of MAC table */
+	while (1) {
+		memset(ptr_mt, 0, sizeof(AIR_MAC_ENTRY_T) * bucket_size);
+		ret = air_l2_getNextMacAddr(0, &count, ptr_mt);
+		if (AIR_E_OK != ret) {
+			break;
+		}
+		total_count += count;
+		_printMacEntry(ptr_mt, 0, count, FALSE);
+	}
+	switch (ret) {
+	case AIR_E_TIMEOUT:
+		printf("Time Out!\n");
+		break;
+	case AIR_E_BAD_PARAMETER:
+		printf("Bad Parameter!\n");
+		break;
+	default:
+		printf("Found %u %s\n", total_count,
+		       (total_count > 1) ? "entries" : "entry");
+		break;
+	}
+
+DUMP_ERROR:
+	free(ptr_mt);
+	return;
+}
+
+void an8855_table_dump(int argc, char *argv[])
+{
+	an8855_table_dump_internal(GENERAL_TABLE);
+}
+
+void an8855_table_add(int argc, char *argv[])
+{
+	AIR_ERROR_NO_T ret = AIR_E_OK;
+	AIR_MAC_ENTRY_T mt;
+	unsigned int i = 0;
+	unsigned int age_time = 0;
+	memset(&mt, 0, sizeof(AIR_MAC_ENTRY_T));
+	if (!argv[2] || strlen(argv[2]) != 12) {
+		printf("MAC address format error, should be of length 12\n");
+		return;
+	}
+	ret = _str2mac(argv[2], (C8_T *) mt.mac);
+	if (ret != AIR_E_OK) {
+		printf("Unrecognized command.\n");
+		return;
+	}
+	if (argc > 4) {
+		mt.cvid = strtoul(argv[4], NULL, 0);
+		if (4095 < mt.cvid) {
+			printf("wrong vid range, should be within 0~4095\n");
+			return;
+		}
+		mt.flags |= AIR_L2_MAC_ENTRY_FLAGS_IVL;
+	}
+	if (!argv[3] || strlen(argv[3]) != 6) {
+		/*bit0~5, each map port0~port5 */
+		printf("portmap format error, should be of length 6\n");
+		return;
+	}
+	for (i = 0; i < 6; i++) {
+		if (argv[3][i] != '0' && argv[3][i] != '1') {
+			printf
+			    ("portmap format error, should be of combination of 0 or 1\n");
+			return;
+		}
+		mt.port_bitmap[0] |= ((argv[3][i] - '0') << i);
+	}
+	if (argc > 5) {
+		age_time = strtoul(argv[5], NULL, 0);
+		if (age_time < 1 || 1000000 < age_time) {
+			printf("wrong age range, should be within 1~1000000\n");
+			return;
+		}
+	} else {
+		mt.flags |= AIR_L2_MAC_ENTRY_FLAGS_STATIC;
+	}
+	mt.sa_fwd = AIR_L2_FWD_CTRL_DEFAULT;
+	ret = air_l2_addMacAddr(0, &mt);
+	if (ret == AIR_E_OK) {
+		printf("add mac address done.\n");
+		usleep(5000);
+		if (!(mt.flags & AIR_L2_MAC_ENTRY_FLAGS_STATIC)) {
+			ret = air_l2_setMacAddrAgeOut(0, age_time);
+			if (ret == AIR_E_OK) {
+				printf("set age out time done.\n");
+			} else {
+				printf("set age out time fail.\n");
+			}
+		}
+	} else {
+		printf("add mac address fail.\n");
+	}
+	return;
+}
+
+void an8855_table_search_mac_vid(int argc, char *argv[])
+{
+	AIR_ERROR_NO_T ret = AIR_E_OK;
+	unsigned char count = 0;
+	char tmpstr[9];
+	AIR_MAC_ENTRY_T *ptr_mt;
+
+	if (!argv[3] || strlen(argv[3]) != 12) {
+		printf("MAC address format error, should be of length 12\n");
+		return;
+	}
+
+	ptr_mt = malloc(sizeof(AIR_MAC_ENTRY_T));
+	if (NULL == ptr_mt) {
+		printf("Error, malloc fail\n");
+		return;
+	}
+	memset(ptr_mt, 0, sizeof(AIR_MAC_ENTRY_T));
+	ret = _str2mac(argv[3], (C8_T *) ptr_mt->mac);
+	if (ret != AIR_E_OK) {
+		printf("Unrecognized command.\n");
+		free(ptr_mt);
+		return;
+	}
+
+	/* get mac entry by MAC address & vid */
+	ptr_mt->cvid = strtoul(argv[5], NULL, 0);
+	ptr_mt->flags |= AIR_L2_MAC_ENTRY_FLAGS_IVL;
+	if (ptr_mt->cvid > 4095) {
+		printf("wrong vid range, should be within 0~4095\n");
+		free(ptr_mt);
+		return;
+	}
+
+	ret = air_l2_getMacAddr(0, &count, ptr_mt);
+	if (ret == AIR_E_OK) {
+		_printMacEntry(ptr_mt, 0, 1, TRUE);
+		_printMacEntry(ptr_mt, 0, 1, FALSE);
+	} else {
+		printf("\n Not found!\n");
+	}
+	free(ptr_mt);
+	return;
+}
+
+void an8855_table_search_mac_fid(int argc, char *argv[])
+{
+	AIR_ERROR_NO_T ret = AIR_E_OK;
+	unsigned char count = 0;
+	char tmpstr[9];
+	AIR_MAC_ENTRY_T *ptr_mt;
+
+	if (!argv[3] || strlen(argv[3]) != 12) {
+		printf("MAC address format error, should be of length 12\n");
+		return;
+	}
+
+	ptr_mt = malloc(sizeof(AIR_MAC_ENTRY_T));
+	if (NULL == ptr_mt) {
+		printf("Error, malloc fail\n");
+		return;
+	}
+	memset(ptr_mt, 0, sizeof(AIR_MAC_ENTRY_T));
+	ret = _str2mac(argv[3], (C8_T *) ptr_mt->mac);
+	if (ret != AIR_E_OK) {
+		printf("Unrecognized command.\n");
+		free(ptr_mt);
+		return;
+	}
+
+	/* get mac entry by MAC address & fid */
+	ptr_mt->fid = strtoul(argv[5], NULL, 0);
+	if (ptr_mt->fid > 7) {
+		printf("wrong fid range, should be within 0~7\n");
+		free(ptr_mt);
+		return;
+	}
+
+	ret = air_l2_getMacAddr(0, &count, ptr_mt);
+	if (ret == AIR_E_OK) {
+		_printMacEntry(ptr_mt, 0, 1, TRUE);
+		_printMacEntry(ptr_mt, 0, 1, FALSE);
+	} else {
+		printf("\n Not found!\n");
+	}
+	free(ptr_mt);
+	return;
+}
+
+void an8855_table_del_fid(int argc, char *argv[])
+{
+	AIR_ERROR_NO_T ret = AIR_E_OK;
+	char tmpstr[9];
+	AIR_MAC_ENTRY_T mt;
+
+	if (!argv[3] || strlen(argv[3]) != 12) {
+		printf("MAC address format error, should be of length 12\n");
+		return;
+	}
+
+	memset(&mt, 0, sizeof(AIR_MAC_ENTRY_T));
+	ret = _str2mac(argv[3], (C8_T *) mt.mac);
+	if (ret != AIR_E_OK) {
+		printf("Unrecognized command.\n");
+		return;
+	}
+
+	/* get mac entry by MAC address & fid */
+	mt.fid = strtoul(argv[5], NULL, 0);
+	if (mt.fid > 7) {
+		printf("wrong fid range, should be within 0~7\n");
+		return;
+	}
+
+	ret = air_l2_delMacAddr(0, &mt);
+	if (ret == AIR_E_OK) {
+		printf("Done.\n");
+	} else {
+		printf("Fail.\n");
+	}
+	return;
+}
+
+void an8855_table_del_vid(int argc, char *argv[])
+{
+	AIR_ERROR_NO_T ret = AIR_E_OK;
+	char tmpstr[9];
+	AIR_MAC_ENTRY_T mt;
+
+	if (!argv[3] || strlen(argv[3]) != 12) {
+		printf("MAC address format error, should be of length 12\n");
+		return;
+	}
+
+	memset(&mt, 0, sizeof(AIR_MAC_ENTRY_T));
+	ret = _str2mac(argv[3], (C8_T *) mt.mac);
+	if (ret != AIR_E_OK) {
+		printf("Unrecognized command.\n");
+		return;
+	}
+
+	/* get mac entry by MAC address & vid */
+	mt.cvid = strtoul(argv[5], NULL, 0);
+	mt.flags |= AIR_L2_MAC_ENTRY_FLAGS_IVL;
+	if (mt.cvid > 4095) {
+		printf("wrong vid range, should be within 0~4095\n");
+		return;
+	}
+
+	ret = air_l2_delMacAddr(0, &mt);
+	if (ret == AIR_E_OK) {
+		printf("Done.\n");
+	} else {
+		printf("Fail.\n");
+	}
+	return;
+}
+
+void an8855_table_clear(int argc, char *argv[])
+{
+	AIR_ERROR_NO_T ret = AIR_E_OK;
+
+	ret = air_l2_clearMacAddr(0);
+	if (ret == AIR_E_OK)
+		printf("Clear MAC Address Table Done.\n");
+	else
+		printf("Clear MAC Address Table Fail.\n");
+	return;
+}
+
+void an8855_set_mirror_to(int argc, char *argv[])
+{
+	int idx;
+	AIR_MIR_SESSION_T session = { 0 };
+
+	idx = strtoul(argv[3], NULL, 0);
+	if (idx < 0 || MAX_PORT < idx) {
+		printf("wrong port member, should be within 0~%d\n", MAX_PORT);
+		return;
+	}
+
+	memset(&session, 0, sizeof(AIR_MIR_SESSION_T));
+
+	air_mir_getSession(0, 0, &session);
+	session.dst_port = idx;
+	session.flags |= AIR_MIR_SESSION_FLAGS_ENABLE;
+	air_mir_addSession(0, 0, &session);
+}
+
+void an8855_set_mirror_from(int argc, char *argv[])
+{
+	int idx = 0, mirror = 0;
+	AIR_MIR_SESSION_T session = { 0 };
+
+	idx = _strtoul(argv[3], NULL, 0);
+	mirror = _strtoul(argv[4], NULL, 0);
+
+	if (idx < 0 || MAX_PORT < idx) {
+		printf("wrong port member, should be within 0~%d\n", MAX_PORT);
+		return;
+	}
+
+	if (mirror < 0 || 3 < mirror) {
+		printf("wrong mirror setting, should be within 0~3\n");
+		return;
+	}
+
+	memset(&session, 0, sizeof(AIR_MIR_SESSION_T));
+
+	if (mirror & 0x1) {	// rx enable
+		session.src_port = idx;
+		air_mir_getMirrorPort(0, 0, &session);
+
+		session.flags |= AIR_MIR_SESSION_FLAGS_DIR_RX;
+		session.src_port = idx;
+		air_mir_setMirrorPort(0, 0, &session);
+	}
+
+	if (mirror & 0x2) {	//tx enable
+		session.src_port = idx;
+		air_mir_getMirrorPort(0, 0, &session);
+
+		session.flags |= AIR_MIR_SESSION_FLAGS_DIR_TX;
+		session.src_port = idx;
+		air_mir_setMirrorPort(0, 0, &session);
+	}
+}
+
+void an8855_vlan_dump(int argc, char *argv[])
+{
+	AIR_VLAN_ENTRY_T vlan_entry = { 0 };
+	unsigned int i;
+	int eg_tag = 0;
+
+	if (argc == 4) {
+		if (!strncmp(argv[3], "egtag", 6))
+			eg_tag = 1;
+	}
+
+	if (eg_tag)
+		printf
+		    ("  vid  fid  portmap    s-tag\teg_tag(0:untagged 2:tagged)\n");
+	else
+		printf("  vid  fid  portmap    s-tag\n");
+
+	for (i = 1; i < 4096; i++) {
+		_air_vlan_readEntry(0, i, &vlan_entry);
+
+		if (vlan_entry.valid) {
+			printf(" %4d  ", i);
+			printf(" %2d ", vlan_entry.vlan_entry_format.fid);
+			printf(" %c",
+			       (vlan_entry.
+				vlan_entry_format.port_mem & 0b0000001) ? '1' :
+			       '-');
+			printf("%c",
+			       (vlan_entry.
+				vlan_entry_format.port_mem & 0b0000010) ? '1' :
+			       '-');
+			printf("%c",
+			       (vlan_entry.
+				vlan_entry_format.port_mem & 0b0000100) ? '1' :
+			       '-');
+			printf("%c",
+			       (vlan_entry.
+				vlan_entry_format.port_mem & 0b0001000) ? '1' :
+			       '-');
+			printf("%c",
+			       (vlan_entry.
+				vlan_entry_format.port_mem & 0b0010000) ? '1' :
+			       '-');
+			printf("%c",
+			       (vlan_entry.
+				vlan_entry_format.port_mem & 0b0100000) ? '1' :
+			       '-');
+			printf("%c",
+			       (vlan_entry.
+				vlan_entry_format.port_mem & 0b1000000) ? '1' :
+			       '-');
+			printf("    %4d", vlan_entry.vlan_entry_format.eg_ctrl);
+			if (eg_tag) {
+				printf("\t");
+				if (vlan_entry.vlan_entry_format.eg_con
+				    && vlan_entry.
+				    vlan_entry_format.eg_ctrl_en) {
+					/* VTAG_EN=1 and EG_CON=1 */
+					printf("CONSISTENT");
+				} else if (vlan_entry.
+					   vlan_entry_format.eg_ctrl_en) {
+					/* VTAG_EN=1 */
+					printf("%d",
+					       (vlan_entry.
+						vlan_entry_format.eg_ctrl >> 0)
+					       & 0x3);
+					printf("%d",
+					       (vlan_entry.
+						vlan_entry_format.eg_ctrl >> 2)
+					       & 0x3);
+					printf("%d",
+					       (vlan_entry.
+						vlan_entry_format.eg_ctrl >> 4)
+					       & 0x3);
+					printf("%d",
+					       (vlan_entry.
+						vlan_entry_format.eg_ctrl >> 6)
+					       & 0x3);
+					printf("%d",
+					       (vlan_entry.
+						vlan_entry_format.eg_ctrl >> 8)
+					       & 0x3);
+					printf("%d",
+					       (vlan_entry.
+						vlan_entry_format.eg_ctrl >> 10)
+					       & 0x3);
+					printf("%d",
+					       (vlan_entry.
+						vlan_entry_format.eg_ctrl >> 12)
+					       & 0x3);
+				} else {
+					/* VTAG_EN=0 */
+					printf("DISABLED");
+				}
+			}
+			printf("\n");
+		} else {
+			/*print 16 vid for reference information */
+			if (i <= 16) {
+				printf(" %4d  ", i);
+				printf(" %2d ",
+				       vlan_entry.vlan_entry_format.fid);
+				printf(" invalid\n");
+			}
+		}
+	}
+}
+
+void an8855_vlan_clear(int argc, char *argv[])
+{
+	air_vlan_destroyAll(0, 0);
+}
+
+void an8855_vlan_set(int argc, char *argv[])
+{
+	unsigned int vlan_mem = 0;
+	int i, vid, fid;
+	int stag = 0;
+	unsigned long eg_con = 0;
+	unsigned int eg_tag = 0;
+	AIR_VLAN_ENTRY_T vlan_entry = { 0 };
+
+	if (argc < 5) {
+		printf("insufficient arguments!\n");
+		return;
+	}
+
+	fid = strtoul(argv[3], NULL, 0);
+	if (fid < 0 || fid > 7) {
+		printf("wrong filtering db id range, should be within 0~7\n");
+		return;
+	}
+
+	vid = strtoul(argv[4], NULL, 0);
+	if (vid < 0 || MAX_VID_VALUE < vid) {
+		printf("wrong vlan id range, should be within 0~4095\n");
+		return;
+	}
+
+	if (strlen(argv[5]) != SWITCH_MAX_PORT) {
+		printf("portmap format error, should be of length %d\n",
+		       SWITCH_MAX_PORT);
+		return;
+	}
+
+	vlan_mem = 0;
+	for (i = 0; i < SWITCH_MAX_PORT; i++) {
+		if (argv[5][i] != '0' && argv[5][i] != '1') {
+			printf
+			    ("portmap format error, should be of combination of 0 or 1\n");
+			return;
+		}
+		vlan_mem += (argv[5][i] - '0') * (1 << i);
+	}
+
+	/* VLAN stag */
+	if (argc > 6) {
+		stag = strtoul(argv[6], NULL, 16);
+		if (stag < 0 || 0xfff < stag) {
+			printf
+			    ("wrong stag id range, should be within 0~4095\n");
+			return;
+		}
+	}
+
+	/* set vlan member */
+	vlan_entry.vlan_entry_format.port_mem = vlan_mem;
+	vlan_entry.vlan_entry_format.ivl = 1;
+	vlan_entry.vlan_entry_format.stag = stag;
+	vlan_entry.valid = 1;
+
+	if (argc > 7) {
+		eg_con = strtoul(argv[7], NULL, 2);
+		eg_con = ! !eg_con;
+		vlan_entry.vlan_entry_format.eg_con = eg_con;
+		vlan_entry.vlan_entry_format.eg_ctrl_en = 1;
+	}
+
+	if (argc > 8 && !eg_con) {
+		if (strlen(argv[8]) != SWITCH_MAX_PORT) {
+			printf
+			    ("egtag portmap format error, should be of length %d\n",
+			     SWITCH_MAX_PORT);
+			return;
+		}
+
+		for (i = 0; i < SWITCH_MAX_PORT; i++) {
+			if (argv[8][i] < '0' || argv[8][i] > '3') {
+				printf
+				    ("egtag portmap format error, should be of combination of 0 or 3\n");
+				return;
+			}
+			eg_tag |= (argv[8][i] - '0') << (i * 2);
+		}
+
+		vlan_entry.vlan_entry_format.eg_ctrl_en = 1;
+		vlan_entry.vlan_entry_format.eg_ctrl = eg_tag;
+	}
+
+	_air_vlan_writeEntry(0, vid, &vlan_entry);
+}
+
+void an8855_switch_reset(int argc, char *argv[])
+{
+	air_switch_reset(0);
+}
+
+void an8855_global_set_mac_fc(int argc, char *argv[])
+{
+	unsigned char enable = 0;
+	unsigned int reg = 0, value = 0;
+
+	enable = _strtoul(argv[3], NULL, 10);
+	printf("enable: %d\n", enable);
+
+	/* Check the input parameters is right or not. */
+	if (enable > 1) {
+		printf(HELP_MACCTL_FC);
+		return;
+	}
+	reg_read(0x10207e04, &value);
+	value &= (~(1 << 31));
+	value |= (enable << 31);
+	reg_write(0x10207e04, value);
+}				/*end mac_set_fc */
+
+void an8855_qos_sch_select(int argc, char *argv[])
+{
+	unsigned char port, queue;
+	unsigned char type = 0;
+	unsigned int value, reg;
+
+	if (argc < 7)
+		return;
+
+	port = _strtoul(argv[3], NULL, 10);
+	queue = _strtoul(argv[4], NULL, 10);
+	type = _strtoul(argv[6], NULL, 10);
+
+	if (port > 6 || queue > 7) {
+		printf("\n Illegal input parameters\n");
+		return;
+	}
+
+	if ((type != 0 && type != 1 && type != 2)) {
+		printf(HELP_QOS_TYPE);
+		return;
+	}
+
+	printf("\r\nswitch qos type: %d.\n", type);
+
+	if (type == 0) {
+		air_qos_setScheduleAlgo(0, port, queue, AIR_QOS_SCH_MODE_WRR,
+					1);
+	} else if (type == 1) {
+		air_qos_setScheduleAlgo(0, port, queue, AIR_QOS_SCH_MODE_SP, 1);
+	} else {
+		air_qos_setScheduleAlgo(0, port, queue, AIR_QOS_SCH_MODE_WFQ,
+					1);
+	}
+}
+
+void an8855_get_upw(unsigned int *value, unsigned char base)
+{
+	*value &= (~((0x7 << 0) | (0x7 << 4) | (0x7 << 8) | (0x7 << 12) |
+		     (0x7 << 16) | (0x7 << 20)));
+	switch (base) {
+	case 0:		/* port-based 0x2x40[18:16] */
+		*value |= ((0x2 << 0) | (0x2 << 4) | (0x2 << 8) |
+			   (0x2 << 12) | (0x7 << 16) | (0x2 << 20));
+		break;
+	case 1:		/* tagged-based 0x2x40[10:8] */
+		*value |= ((0x2 << 0) | (0x2 << 4) | (0x7 << 8) |
+			   (0x2 << 12) | (0x2 << 16) | (0x2 << 20));
+		break;
+	case 2:		/* DSCP-based 0x2x40[14:12] */
+		*value |= ((0x2 << 0) | (0x2 << 4) | (0x2 << 8) |
+			   (0x7 << 12) | (0x2 << 16) | (0x2 << 20));
+		break;
+	case 3:		/* acl-based 0x2x40[2:0] */
+		*value |= ((0x7 << 0) | (0x2 << 4) | (0x2 << 8) |
+			   (0x2 << 12) | (0x2 << 16) | (0x2 << 20));
+		break;
+	case 4:		/* arl-based 0x2x40[22:20] */
+		*value |= ((0x2 << 0) | (0x2 << 4) | (0x2 << 8) |
+			   (0x2 << 12) | (0x2 << 16) | (0x7 << 20));
+		break;
+	case 5:		/* stag-based 0x2x40[6:4] */
+		*value |= ((0x2 << 0) | (0x7 << 4) | (0x2 << 8) |
+			   (0x2 << 12) | (0x2 << 16) | (0x2 << 20));
+		break;
+	default:
+		break;
+	}
+}
+
+void an8855_qos_set_base(int argc, char *argv[])
+{
+	unsigned char base = 0;
+	unsigned char port;
+	unsigned int value;
+
+	if (argc < 5)
+		return;
+
+	port = _strtoul(argv[3], NULL, 10);
+	base = _strtoul(argv[4], NULL, 10);
+
+	if (base > 6) {
+		printf(HELP_QOS_BASE);
+		return;
+	}
+
+	if (port > 6) {
+		printf("Illegal port index:%d\n", port);
+		return;
+	}
+
+	printf("\r\nswitch qos base : %d. (port-based:0, tag-based:1,\
+		dscp-based:2, acl-based:3, arl-based:4, stag-based:5)\n", base);
+	reg_read(0x10208030 + 0x200 * port, &value);
+	an8855_get_upw(&value, base);
+	reg_write(0x10208030 + 0x200 * port, value);
+}
+
+void an8855_qos_wfq_set_weight(int argc, char *argv[])
+{
+	int port, weight[8], i;
+	unsigned char queue;
+	unsigned int reg = 0, value = 0;
+
+	port = _strtoul(argv[3], NULL, 10);
+
+	for (i = 0; i < 8; i++) {
+		weight[i] = _strtoul(argv[i + 4], NULL, 10);
+	}
+
+	/* MT7530 total 7 port */
+	if (port < 0 || port > 6) {
+		printf(HELP_QOS_PORT_WEIGHT);
+		return;
+	}
+
+	for (i = 0; i < 8; i++) {
+		if (weight[i] < 1 || weight[i] > 16) {
+			printf(HELP_QOS_PORT_WEIGHT);
+			return;
+		}
+	}
+	printf("port: %x, q0: %x, q1: %x, q2: %x, q3: %x, \
+		q4: %x, q5: %x, q6: %x, q7: %x\n", port, weight[0], weight[1], weight[2], weight[3], weight[4], weight[5], weight[6], weight[7]);
+
+	for (queue = 0; queue < 8; queue++) {
+		air_qos_setScheduleAlgo(0, port, queue, AIR_QOS_SCH_MODE_WFQ,
+					weight[queue]);
+	}
+}
+
+void an8855_qos_set_portpri(int argc, char *argv[])
+{
+	unsigned char port = 0, prio = 0;
+	unsigned int value = 0;
+
+	port = _strtoul(argv[3], NULL, 10);
+	prio = _strtoul(argv[4], NULL, 10);
+
+	if (port >= 7 || prio > 7) {
+		printf(HELP_QOS_PORT_PRIO);
+		return;
+	}
+
+	air_qos_setPortPriority(0, port, prio);
+}
+
+void an8855_qos_set_dscppri(int argc, char *argv[])
+{
+	unsigned char prio = 0, dscp = 0, pim_n = 0, pim_offset = 0;
+	unsigned int reg = 0, value = 0;
+
+	dscp = _strtoul(argv[3], NULL, 10);
+	prio = _strtoul(argv[4], NULL, 10);
+
+	if (dscp > 63 || prio > 7) {
+		printf(HELP_QOS_DSCP_PRIO);
+		return;
+	}
+
+	air_qos_setDscp2Pri(0, dscp, prio);
+}
+
+void an8855_qos_pri_mapping_queue(int argc, char *argv[])
+{
+	unsigned char prio = 0, queue = 0, pem_n = 0, port = 0;
+	unsigned int reg = 0, value = 0;
+
+	if (argc < 6)
+		return;
+
+	port = _strtoul(argv[3], NULL, 10);
+	prio = _strtoul(argv[4], NULL, 10);
+	queue = _strtoul(argv[5], NULL, 10);
+
+	if (prio > 7 || queue > 7) {
+		printf(HELP_QOS_PRIO_QMAP);
+		return;
+	}
+
+	air_qos_setPri2Queue(0, prio, queue);
+}
+
+void an8855_doVlanSetPvid(int argc, char *argv[])
+{
+	unsigned char port = 0;
+	unsigned short pvid = 0;
+
+	port = _strtoul(argv[3], NULL, 10);
+	pvid = _strtoul(argv[4], NULL, 10);
+	/*Check the input parameters is right or not. */
+	if ((port >= SWITCH_MAX_PORT) || (pvid > MAX_VID_VALUE)) {
+		printf(HELP_VLAN_PVID);
+		return;
+	}
+
+	air_vlan_setPortPVID(0, port, pvid);
+
+	printf("port:%d pvid:%d,vlancap: max_port:%d maxvid:%d\r\n",
+	       port, pvid, SWITCH_MAX_PORT, MAX_VID_VALUE);
+}				/*end doVlanSetPvid */
+
+void an8855_doVlanSetVid(int argc, char *argv[])
+{
+	unsigned char index = 0;
+	unsigned char active = 0;
+	unsigned char portMap = 0;
+	unsigned char tagPortMap = 0;
+	unsigned short vid = 0;
+
+	unsigned char ivl_en = 0;
+	unsigned char fid = 0;
+	unsigned short stag = 0;
+	int i = 0;
+	AIR_VLAN_ENTRY_T vlan_entry = { 0 };
+
+	index = _strtoul(argv[3], NULL, 10);
+	active = _strtoul(argv[4], NULL, 10);
+	vid = _strtoul(argv[5], NULL, 10);
+
+	/*Check the input parameters is right or not. */
+	if ((index >= MAX_VLAN_RULE) || (vid >= 4096) || (active > ACTIVED)) {
+		printf(HELP_VLAN_VID);
+		return;
+	}
+
+	/*CPU Port is always the membership */
+	portMap = _strtoul(argv[6], NULL, 10);
+	tagPortMap = _strtoul(argv[7], NULL, 10);
+
+	printf("subcmd parameter argc = %d\r\n", argc);
+	if (argc >= 9) {
+		ivl_en = _strtoul(argv[8], NULL, 10);
+		if (argc >= 10) {
+			fid = _strtoul(argv[9], NULL, 10);
+			if (argc >= 11)
+				stag = _strtoul(argv[10], NULL, 10);
+		}
+	}
+
+	printf("index: %x, active: %x, vid: %x, portMap: %x, \
+		tagPortMap: %x, ivl_en: %x, fid: %x, stag: %x\n", index, active, vid, portMap, tagPortMap, ivl_en, fid, stag);
+
+	vlan_entry.valid = ! !active;
+	vlan_entry.vlan_entry_format.port_mem = portMap;
+	/* Total 6 ports */
+	for (i = 0; i < SWITCH_MAX_PORT; i++) {
+		if (tagPortMap & (1 << i))
+			vlan_entry.vlan_entry_format.eg_ctrl |= 0x2 << (i * 2);
+	}
+	vlan_entry.vlan_entry_format.ivl = ! !ivl_en;
+	vlan_entry.vlan_entry_format.fid = fid;
+	vlan_entry.vlan_entry_format.stag = stag;
+
+	_air_vlan_writeEntry(0, vid, &vlan_entry);
+
+	printf("index:%d active:%d vid:%d\r\n", index, active, vid);
+}				/*end doVlanSetVid */
+
+void an8855_doVlanSetAccFrm(int argc, char *argv[])
+{
+	unsigned char port = 0;
+	unsigned char type = 0;
+	AIR_VLAN_ACCEPT_FRAME_TYPE_T type_t = AIR_VLAN_ACCEPT_FRAME_TYPE_ALL;
+
+	port = _strtoul(argv[3], NULL, 10);
+	type = _strtoul(argv[4], NULL, 10);
+
+	printf("port: %d, type: %d\n", port, type);
+
+	/*Check the input parameters is right or not. */
+	if ((port > SWITCH_MAX_PORT) || (type > REG_PVC_ACC_FRM_RELMASK)) {
+		printf(HELP_VLAN_ACC_FRM);
+		return;
+	}
+
+	type_t = (AIR_VLAN_ACCEPT_FRAME_TYPE_T) type;
+	air_vlan_setPortAcceptFrameType(0, port, type_t);
+}				/*end doVlanSetAccFrm */
+
+void an8855_doVlanSetPortAttr(int argc, char *argv[])
+{
+	unsigned char port = 0;
+	unsigned char attr = 0;
+	AIR_VLAN_PORT_ATTR_T attr_t = AIR_VLAN_PORT_ATTR_USER_PORT;
+
+	port = _strtoul(argv[3], NULL, 10);
+	attr = _strtoul(argv[4], NULL, 10);
+
+	printf("port: %x, attr: %x\n", port, attr);
+
+	/*Check the input parameters is right or not. */
+	if (port > SWITCH_MAX_PORT || attr > 3) {
+		printf(HELP_VLAN_PORT_ATTR);
+		return;
+	}
+
+	attr_t = (AIR_VLAN_PORT_ATTR_T) attr;
+	air_vlan_setPortAttr(0, port, attr_t);
+}
+
+void an8855_doVlanSetPortMode(int argc, char *argv[])
+{
+	unsigned char port = 0;
+	unsigned char mode = 0;
+	AIR_PORT_VLAN_MODE_T mode_t = AIR_PORT_VLAN_MODE_PORT_MATRIX;
+
+	port = _strtoul(argv[3], NULL, 10);
+	mode = _strtoul(argv[4], NULL, 10);
+	printf("port: %x, mode: %x\n", port, mode);
+
+	/*Check the input parameters is right or not. */
+	if (port > SWITCH_MAX_PORT || mode > 3) {
+		printf(HELP_VLAN_PORT_MODE);
+		return;
+	}
+
+	mode_t = (AIR_PORT_VLAN_MODE_T) mode;
+	air_port_setVlanMode(0, port, mode_t);
+}
+
+void an8855_doVlanSetEgressTagPCR(int argc, char *argv[])
+{
+	unsigned char port = 0;
+	unsigned char eg_tag = 0;
+	AIR_PORT_EGS_TAG_ATTR_T eg_tag_t = AIR_PORT_EGS_TAG_ATTR_UNTAGGED;
+
+	port = _strtoul(argv[3], NULL, 10);
+	eg_tag = _strtoul(argv[4], NULL, 10);
+
+	printf("port: %d, eg_tag: %d\n", port, eg_tag);
+
+	/*Check the input parameters is right or not. */
+	if ((port > SWITCH_MAX_PORT) || (eg_tag > REG_PCR_EG_TAG_RELMASK)) {
+		printf(HELP_VLAN_EGRESS_TAG_PCR);
+		return;
+	}
+
+	eg_tag_t = (AIR_PORT_EGS_TAG_ATTR_T) eg_tag;
+	air_vlan_setPortEgsTagAttr(0, port, eg_tag_t);
+}				/*end doVlanSetEgressTagPCR */
+
+void an8855_doVlanSetEgressTagPVC(int argc, char *argv[])
+{
+	unsigned char port = 0;
+	unsigned char eg_tag = 0;
+	AIR_IGR_PORT_EG_TAG_ATTR_T eg_tag_t = 0;
+
+	port = _strtoul(argv[3], NULL, 10);
+	eg_tag = _strtoul(argv[4], NULL, 10);
+
+	printf("port: %d, eg_tag: %d\n", port, eg_tag);
+
+	/*Check the input parameters is right or not. */
+	if ((port > SWITCH_MAX_PORT) || (eg_tag > REG_PVC_EG_TAG_RELMASK)) {
+		printf(HELP_VLAN_EGRESS_TAG_PVC);
+		return;
+	}
+
+	eg_tag_t = (AIR_IGR_PORT_EG_TAG_ATTR_T) eg_tag;
+	air_vlan_setIgrPortTagAttr(0, port, eg_tag_t);
+}				/*end doVlanSetEgressTagPVC */
+
+void an8855_doArlAging(int argc, char *argv[])
+{
+	unsigned char aging_en = 0;
+	unsigned int time = 0, port = 0;
+
+	aging_en = _strtoul(argv[3], NULL, 10);
+	time = _strtoul(argv[4], NULL, 10);
+	printf("aging_en: %x, aging time: %x\n", aging_en, time);
+
+	/*Check the input parameters is right or not. */
+	if ((aging_en != 0 && aging_en != 1) || (time <= 0 || time > 65536)) {
+		printf(HELP_ARL_AGING);
+		return;
+	}
+
+	for (port = 0; port < 6; port++) {
+		air_l2_setAgeEnable(0, port, aging_en);
+	}
+
+	air_l2_setMacAddrAgeOut(0, time);
+}
+
+void an8855_doMirrorEn(int argc, char *argv[])
+{
+	unsigned char mirror_en = 0;
+	unsigned char mirror_port = 0;
+	AIR_MIR_SESSION_T session = { 0 };
+
+	mirror_en = _strtoul(argv[3], NULL, 10);
+	mirror_port = _strtoul(argv[4], NULL, 10);
+
+	printf("mirror_en: %d, mirror_port: %d\n", mirror_en, mirror_port);
+
+	/*Check the input parameters is right or not. */
+	if ((mirror_en > 1) || (mirror_port > REG_CFC_MIRROR_PORT_RELMASK)) {
+		printf(HELP_MIRROR_EN);
+		return;
+	}
+
+	memset(&session, 0, sizeof(AIR_MIR_SESSION_T));
+
+	if (mirror_en) {
+		session.dst_port = mirror_port;
+		session.flags |= AIR_MIR_SESSION_FLAGS_ENABLE;
+		air_mir_addSession(0, 0, &session);
+	} else {
+		air_mir_delSession(0, 0);
+	}
+
+	air_mir_setSessionAdminMode(0, 0, (int)mirror_en);
+}				/*end doMirrorEn */
+
+void an8855_doMirrorPortBased(int argc, char *argv[])
+{
+	unsigned char port = 0, port_tx_mir = 0, port_rx_mir = 0, vlan_mis =
+	    0, acl_mir = 0, igmp_mir = 0;
+	unsigned int reg = 0, value = 0;
+	AIR_MIR_SESSION_T session = { 0 };
+
+	port = _strtoul(argv[3], NULL, 10);
+	port_tx_mir = _strtoul(argv[4], NULL, 10);
+	port_rx_mir = _strtoul(argv[5], NULL, 10);
+	acl_mir = _strtoul(argv[6], NULL, 10);
+	vlan_mis = _strtoul(argv[7], NULL, 10);
+	igmp_mir = _strtoul(argv[8], NULL, 10);
+
+	printf
+	    ("port:%d, port_tx_mir:%d, port_rx_mir:%d, acl_mir:%d, vlan_mis:%d, igmp_mir:%d\n",
+	     port, port_tx_mir, port_rx_mir, acl_mir, vlan_mis, igmp_mir);
+
+	/*Check the input parameters is right or not. */
+	//if((port >= vlanCap->max_port_no) || (port_tx_mir > 1) || (port_rx_mir > 1) || (acl_mir > 1) || (vlan_mis > 1)){
+	if ((port >= SWITCH_MAX_PORT) || (port_tx_mir > 1) || (port_rx_mir > 1) || (acl_mir > 1) || (vlan_mis > 1)) {	// also allow CPU port (port6)
+		printf(HELP_MIRROR_PORTBASED);
+		return;
+	}
+
+	memset(&session, 0, sizeof(AIR_MIR_SESSION_T));
+	air_mir_getSession(0, 0, &session);
+	session.src_port = port;
+
+	if (port_tx_mir)
+		session.flags |= AIR_MIR_SESSION_FLAGS_DIR_TX;
+	else
+		session.flags &= ~AIR_MIR_SESSION_FLAGS_DIR_TX;
+
+	if (port_rx_mir)
+		session.flags |= AIR_MIR_SESSION_FLAGS_DIR_RX;
+	else
+		session.flags &= ~AIR_MIR_SESSION_FLAGS_DIR_RX;
+
+	air_mir_setMirrorPort(0, 0, &session);
+
+	/*
+
+	   not support acl/vlan/igmp mismatch
+
+	 */
+}				/*end doMirrorPortBased */
+
+void an8855_doStp(int argc, char *argv[])
+{
+	unsigned char port = 0;
+	unsigned char fid = 0;
+	unsigned char state = 0;
+	unsigned int value = 0;
+	unsigned int reg = 0;
+
+	port = _strtoul(argv[2], NULL, 10);
+	fid = _strtoul(argv[3], NULL, 10);
+	state = _strtoul(argv[4], NULL, 10);
+
+	printf("port: %d, fid: %d, state: %d\n", port, fid, state);
+
+	/*Check the input parameters is right or not. */
+	if ((port > 5) || (fid > 16) || (state > 3)) {
+		printf(HELP_STP);
+		return;
+	}
+
+	air_stp_setPortstate(0, port, fid, state);
+}
+
+void _an8855_ingress_rate_set(int on_off, unsigned char port, unsigned int bw)
+{
+	AIR_ERROR_NO_T ret = AIR_E_OK;
+	AIR_QOS_RATE_LIMIT_CFG_T rl = { 0 };
+	if (on_off) {
+		ret =
+		    air_qos_setRateLimitEnable(0, port,
+					       AIR_QOS_RATE_DIR_INGRESS, TRUE);
+		if (AIR_E_OK != ret) {
+			printf("an8855 set ingress ratelimit eanble fail\n");
+			return;
+		}
+		rl.ingress_cir = bw;
+		rl.flags |= AIR_QOS_RATE_LIMIT_CFG_FLAGS_ENABLE_INGRESS;
+		ret = air_qos_setRateLimit(0, port, &rl);
+		if (AIR_E_OK != ret) {
+			printf("an8855 set ingress ratelimit value %d fail\n",
+			       bw);
+			return;
+		} else {
+			printf("an8855 set ingress ratelimit value %d ok\n",
+			       bw);
+		}
+	} else {
+		ret =
+		    air_qos_setRateLimitEnable(0, port,
+					       AIR_QOS_RATE_DIR_INGRESS, FALSE);
+		if (AIR_E_OK != ret) {
+			printf("an8855 set ingress ratelimit disable fail\n");
+			return;
+		} else {
+			printf("an8855 set ingress ratelimit disable ok\n");
+		}
+	}
+}
+
+void _an8855_egress_rate_set(int on_off, unsigned char port, unsigned int bw)
+{
+	AIR_ERROR_NO_T ret = AIR_E_OK;
+	AIR_QOS_RATE_LIMIT_CFG_T rl = { 0 };
+	if (on_off) {
+		ret =
+		    air_qos_setRateLimitEnable(0, port, AIR_QOS_RATE_DIR_EGRESS,
+					       TRUE);
+		if (AIR_E_OK != ret) {
+			printf("an8855 set egress ratelimit eanble fail\n");
+			return;
+		}
+		rl.egress_cir = bw;
+		rl.flags |= AIR_QOS_RATE_LIMIT_CFG_FLAGS_ENABLE_EGRESS;
+		ret = air_qos_setRateLimit(0, port, &rl);
+		if (AIR_E_OK != ret) {
+			printf("an8855 set egress ratelimit value %d fail\n",
+			       bw);
+			return;
+		} else {
+			printf("an8855 set egress ratelimit value %d ok\n", bw);
+		}
+	} else {
+		ret =
+		    air_qos_setRateLimitEnable(0, port, AIR_QOS_RATE_DIR_EGRESS,
+					       FALSE);
+		if (AIR_E_OK != ret) {
+			printf("an8855 set egress ratelimit disable fail\n");
+			return;
+		} else {
+			printf("an8855 set egress ratelimit disable ok\n");
+		}
+	}
+}
+
+void an8855_ingress_rate_set(int argc, char *argv[])
+{
+	int on_off = 0, port, bw = 0;
+
+	port = _strtoul(argv[3], NULL, 0);
+	if (argv[2][1] == 'n') {
+		bw = _strtoul(argv[4], NULL, 0);
+		on_off = 1;
+	} else if (argv[2][1] == 'f') {
+		if (argc != 4) {
+			return;
+		}
+		on_off = 0;
+	}
+
+	_an8855_ingress_rate_set(on_off, port, bw);
+}
+
+void an8855_egress_rate_set(int argc, char *argv[])
+{
+	unsigned int reg = 0, value = 0;
+	int on_off = 0, port = 0, bw = 0;
+
+	port = _strtoul(argv[3], NULL, 0);
+	if (argv[2][1] == 'n') {
+		bw = _strtoul(argv[4], NULL, 0);
+		on_off = 1;
+	} else if (argv[2][1] == 'f') {
+		if (argc != 4) {
+			return;
+		}
+		on_off = 0;
+	}
+
+	_an8855_egress_rate_set(on_off, port, bw);
+}
+
+void an8855_rate_control(int argc, char *argv[])
+{
+	unsigned char dir = 0;
+	unsigned char port = 0;
+	unsigned int rate_cir = 0;
+
+	dir = _strtoul(argv[2], NULL, 10);
+	port = _strtoul(argv[3], NULL, 10);
+	rate_cir = _strtoul(argv[4], NULL, 10);
+
+	if (port > 5) {
+		printf("Error, port %d is bigger than 5\n\r", port);
+		return;
+	}
+	if (rate_cir > 80000) {
+		printf("Error, rate_cir %d is bigger than 80000\n\r", rate_cir);
+		return;
+	}
+
+	if (dir == 1)		//ingress
+		_an8855_ingress_rate_set(1, port, rate_cir);
+	else if (dir == 0)	//egress
+		_an8855_egress_rate_set(1, port, rate_cir);
+	else
+		printf("Error, dir %d is not 1(ingress) and 0(egress)\n\r",
+		       dir);
+}
+
+void an8855_read_output_queue_counters(int argc, char *argv[])
+{
+	unsigned int port = 0;
+	unsigned int value = 0, output_queue = 0;
+
+	for (port = 0; port < 7; port++) {
+		reg_write(0x10207e48, 0x80000000 | (port << 8) | 0x0);
+		reg_read(0x10207e4c, &output_queue);
+		printf("\n port %d  output queue 0 counter is %d.\n", port,
+		       output_queue);
+		reg_write(0x10207e48, 0x80000000 | (port << 8) | 0x1);
+		reg_read(0x10207e4c, &output_queue);
+		printf("\n port %d  output queue 1 counter is %d.\n", port,
+		       output_queue);
+		reg_write(0x10207e48, 0x80000000 | (port << 8) | 0x2);
+		reg_read(0x10207e4c, &output_queue);
+		printf("\n port %d  output queue 2 counter is %d.\n", port,
+		       output_queue);
+		reg_write(0x10207e48, 0x80000000 | (port << 8) | 0x3);
+		reg_read(0x10207e4c, &output_queue);
+		printf("\n port %d  output queue 3 counter is %d.\n", port,
+		       output_queue);
+		reg_write(0x10207e48, 0x80000000 | (port << 8) | 0x4);
+		reg_read(0x10207e4c, &output_queue);
+		printf("\n port %d  output queue 4 counter is %d.\n", port,
+		       output_queue);
+		reg_write(0x10207e48, 0x80000000 | (port << 8) | 0x5);
+		reg_read(0x10207e4c, &output_queue);
+		printf("\n port %d  output queue 5 counter is %d.\n", port,
+		       output_queue);
+		reg_write(0x10207e48, 0x80000000 | (port << 8) | 0x6);
+		reg_read(0x10207e4c, &output_queue);
+		printf("\n port %d  output queue 6 counter is %d.\n", port,
+		       output_queue);
+		reg_write(0x10207e48, 0x80000000 | (port << 8) | 0x7);
+		reg_read(0x10207e4c, &output_queue);
+		printf("\n port %d  output queue 7 counter is %d.\n", port,
+		       output_queue);
+	}
+}
+
+void an8855_read_free_page_counters(int argc, char *argv[])
+{
+	unsigned int value = 0;
+	unsigned int free_page = 0, free_page_min = 0;
+	unsigned int fc_free_blk_lothd = 0, fc_free_blk_hithd = 0;
+	unsigned int fc_port_blk_thd = 0, fc_port_blk_hi_thd = 0;
+	unsigned int queue[8] = { 0 };
+
+	/* get system free page link counter */
+	reg_read(0x10207e00, &value);
+	free_page = value & 0xFFF;
+	free_page_min = (value & 0xFFF0000) >> 16;
+
+	/* get system flow control waterwark */
+	reg_read(0x10207e04, &value);
+	fc_free_blk_lothd = value & 0x3FF;
+	fc_free_blk_hithd = (value & 0x1FF8000) >> 15;
+
+	/* get port flow control waterwark */
+	reg_read(0x10207e08, &value);
+	fc_port_blk_thd = (value & 0xFF00) >> 8;
+	fc_port_blk_hi_thd = (value & 0xFF0000) >> 16;
+
+	/* get queue flow control waterwark */
+	reg_read(0x10207e10, &value);
+	queue[0] = value & 0x3F;
+	queue[1] = (value & 0x3F00) >> 8;
+	queue[2] = (value & 0x3F0000) >> 16;
+	queue[3] = (value & 0x3F000000) >> 24;
+	reg_read(0x10207e0c, &value);
+	queue[4] = value & 0x3F;
+	queue[5] = (value & 0x3F00) >> 8;
+	queue[6] = (value & 0x3F0000) >> 16;
+	queue[7] = (value & 0x3F000000) >> 24;
+
+	printf("<===Free Page=======Current============Minimal=========> \n ");
+	printf("	                                                 \n ");
+	printf(" page counter      %u                %u               \n ",
+	       free_page, free_page_min);
+	printf("                                                        \n ");
+	printf("========================================================= \n ");
+	printf("<===Type=======High threshold======Low threshold=========\n ");
+	printf("                                                        \n ");
+	printf("  system:         %u                 %u               \n",
+	       fc_free_blk_hithd * 2, fc_free_blk_lothd * 2);
+	printf("    port:         %u                 %u               \n",
+	       fc_port_blk_hi_thd * 2, fc_port_blk_thd * 2);
+	printf(" queue 0:         %u                 NA                \n",
+	       queue[0]);
+	printf(" queue 1:         %u                 NA                \n",
+	       queue[1]);
+	printf(" queue 2:         %u                 NA                 \n",
+	       queue[2]);
+	printf(" queue 3:         %u                 NA                \n",
+	       queue[3]);
+	printf(" queue 4:         %u                 NA                \n",
+	       queue[4]);
+	printf(" queue 5:         %u                 NA                \n",
+	       queue[5]);
+	printf(" queue 6:         %u                 NA                \n",
+	       queue[6]);
+	printf(" queue 7:         %u                 NA                \n",
+	       queue[7]);
+	printf("=========================================================\n ");
+}
+
+void an8855_eee_enable(int argc, char *argv[])
+{
+	unsigned long enable = 0;
+	unsigned int value, mode = 0;
+	unsigned int eee_cap = 0;
+	unsigned int eee_en_bitmap = 0;
+	unsigned long port_map = 0;
+	long port_num = -1;
+	int p = 0;
+
+	if (argc < 3)
+		goto error;
+
+	/* Check the input parameters is right or not. */
+	if (!strncmp(argv[2], "enable", 7))
+		enable = 1;
+	else if (!strncmp(argv[2], "disable", 8))
+		enable = 0;
+	else
+		goto error;
+
+	if (argc > 3) {
+		if (strlen(argv[3]) == 1) {
+			port_num = strtol(argv[3], (char **)NULL, 10);
+			if (port_num < 0 || port_num > MAX_PHY_PORT - 1) {
+				printf("Illegal port index and port:0~4\n");
+				goto error;
+			}
+			port_map = 1 << port_num;
+		} else if (strlen(argv[3]) == 5) {
+			port_map = 0;
+			for (p = 0; p < MAX_PHY_PORT; p++) {
+				if (argv[3][p] != '0' && argv[3][p] != '1') {
+					printf
+					    ("portmap format error, should be combination of 0 or 1\n");
+					goto error;
+				}
+				port_map |= ((argv[3][p] - '0') << p);
+			}
+		} else {
+			printf
+			    ("port_no or portmap format error, should be length of 1 or 5\n");
+			goto error;
+		}
+	} else {
+		port_map = 0x1f;
+	}
+
+	for (port_num = 0; port_num < MAX_PHY_PORT; port_num++) {
+		if (port_map & (1 << port_num)) {
+			air_port_getPsMode(0, port_num, &mode);
+			if (enable) {
+				mode |= AIR_PORT_PS_EEE;
+			} else {
+				mode &= ~AIR_PORT_PS_EEE;
+			}
+			air_port_setPsMode(0, port_num, mode);
+		}
+	}
+	return;
+
+error:
+	printf(HELP_EEE_EN);
+	return;
+}
+
+void an8855_eee_dump(int argc, char *argv[])
+{
+	unsigned int cap = 0, lp_cap = 0;
+	long port = -1;
+	int p = 0;
+
+	if (argc > 3) {
+		if (strlen(argv[3]) > 1) {
+			printf("port# format error, should be of length 1\n");
+			return;
+		}
+
+		port = strtol(argv[3], (char **)NULL, 0);
+		if (port < 0 || port > MAX_PHY_PORT) {
+			printf("port# format error, should be 0 to %d\n",
+			       MAX_PHY_PORT);
+			return;
+		}
+	}
+
+	for (p = 0; p < MAX_PHY_PORT; p++) {
+		if (port >= 0 && p != port)
+			continue;
+
+		mii_mgr_c45_read(p, 0x7, 0x3c, &cap);
+		mii_mgr_c45_read(p, 0x7, 0x3d, &lp_cap);
+		printf("port%d EEE cap=0x%02x, link partner EEE cap=0x%02x",
+		       p, cap, lp_cap);
+
+		if (port >= 0 && p == port) {
+			mii_mgr_c45_read(p, 0x3, 0x1, &cap);
+			printf(", st=0x%03x", cap);
+		}
+		printf("\n");
+	}
+}
+
+void an8855_read_mib_counters(int argc, char *argv[])
+{
+	int port = 0;
+	AIR_MIB_CNT_RX_T rx_mib[7];
+	AIR_MIB_CNT_TX_T tx_mib[7];
+
+	printf("===================== %8s %8s %8s %8s %8s %8s %8s\n",
+	       "Port0", "Port1", "Port2", "Port3", "Port4", "Port5", "Port6");
+
+	for (port = 0; port < 7; port++) {
+		air_mib_get(0, port, &rx_mib[port], &tx_mib[port]);
+	}
+
+	printf("Tx Drop Packet      :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", tx_mib[port].TDPC);
+	}
+	printf("\n");
+	printf("Tx CRC Error        :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", tx_mib[port].TCRC);
+	}
+	printf("\n");
+	printf("Tx Unicast Packet   :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", tx_mib[port].TUPC);
+	}
+	printf("\n");
+	printf("Tx Multicast Packet :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", tx_mib[port].TMPC);
+	}
+	printf("\n");
+	printf("Tx Broadcast Packet :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", tx_mib[port].TBPC);
+	}
+	printf("\n");
+	printf("Tx Collision Event  :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", tx_mib[port].TCEC);
+	}
+	printf("\n");
+	printf("Tx Pause Packet     :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", tx_mib[port].TPPC);
+	}
+	printf("\n");
+	printf("Rx Drop Packet      :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].RDPC);
+	}
+	printf("\n");
+	printf("Rx Filtering Packet :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].RFPC);
+	}
+	printf("\n");
+	printf("Rx Unicast Packet   :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].RUPC);
+	}
+	printf("\n");
+	printf("Rx Multicast Packet :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].RMPC);
+	}
+	printf("\n");
+	printf("Rx Broadcast Packet :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].RBPC);
+	}
+	printf("\n");
+	printf("Rx Alignment Error  :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].RAEPC);
+	}
+	printf("\n");
+	printf("Rx CRC Error	    :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].RCEPC);
+	}
+	printf("\n");
+	printf("Rx Undersize Error  :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].RUSPC);
+	}
+	printf("\n");
+	printf("Rx Fragment Error   :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].RFEPC);
+	}
+	printf("\n");
+	printf("Rx Oversize Error   :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].ROSPC);
+	}
+	printf("\n");
+	printf("Rx Jabber Error     :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].RJEPC);
+	}
+	printf("\n");
+	printf("Rx Pause Packet     :");
+	for (port = 0; port < 7; port++) {
+		printf("%8u ", rx_mib[port].RPPC);
+	}
+	printf("\n");
+}
+
+void an8855_clear_mib_counters(int argc, char *argv[])
+{
+	air_mib_clear(0);
+}
diff --git a/feed/app/switch/src/switch_fun_an8855.h b/feed/app/switch/src/switch_fun_an8855.h
new file mode 100644
index 0000000..1d67080
--- /dev/null
+++ b/feed/app/switch/src/switch_fun_an8855.h
@@ -0,0 +1,134 @@
+/*
+* switch_fun.h: switch function sets
+*/
+#ifndef SWITCH_FUN_AN8855_H
+#define SWITCH_FUN_AN8855_H
+
+#include "air.h"
+
+AIR_ERROR_NO_T
+an8855_reg_read(const UI32_T unit, const UI32_T addr_offset, UI32_T * ptr_data);
+
+AIR_ERROR_NO_T
+an8855_reg_write(const UI32_T unit,
+		 const UI32_T addr_offset, const UI32_T data);
+
+AIR_ERROR_NO_T
+an8855_phy_cl22_read(const UI32_T unit,
+		     const UI32_T port_id,
+		     const UI32_T addr_offset, UI32_T * ptr_data);
+
+AIR_ERROR_NO_T
+an8855_phy_cl22_write(const UI32_T unit,
+		      const UI32_T port_id,
+		      const UI32_T addr_offset, const UI32_T data);
+
+AIR_ERROR_NO_T
+an8855_phy_cl45_read(const UI32_T unit,
+		     const UI32_T port_id,
+		     const UI32_T dev_type,
+		     const UI32_T addr_offset, UI32_T * ptr_data);
+
+AIR_ERROR_NO_T
+an8855_phy_cl45_write(const UI32_T unit,
+		      const UI32_T port_id,
+		      const UI32_T dev_type,
+		      const UI32_T addr_offset, const UI32_T data);
+
+/*arl setting*/
+void an8855_doArlAging(int argc, char *argv[]);
+
+void an8855_not_supported(int argc, char *argv[]);
+
+#if 0
+/*acl setting*/
+void an8855_acl_mac_add(int argc, char *argv[]);
+void an8855_acl_dip_meter(int argc, char *argv[]);
+void an8855_acl_dip_trtcm(int argc, char *argv[]);
+void an8855_acl_ethertype(int argc, char *argv[]);
+void an8855_acl_ethertype(int argc, char *argv[]);
+void an8855_acl_dip_modify(int argc, char *argv[]);
+void an8855_acl_dip_pppoe(int argc, char *argv[]);
+void an8855_acl_dip_add(int argc, char *argv[]);
+void an8855_acl_l4_add(int argc, char *argv[]);
+void an8855_acl_sp_add(int argc, char *argv[]);
+
+void an8855_acl_port_enable(int argc, char *argv[]);
+void an8855_acl_table_add(int argc, char *argv[]);
+void an8855_acl_mask_table_add(int argc, char *argv[]);
+void an8855_acl_rule_table_add(int argc, char *argv[]);
+void an8855_acl_rate_table_add(int argc, char *argv[]);
+
+/*dip table*/
+void an8855_dip_dump(void);
+void an8855_dip_add(int argc, char *argv[]);
+void an8855_dip_del(int argc, char *argv[]);
+void an8855_dip_clear(void);
+
+/*sip table*/
+void an8855_sip_dump(void);
+void an8855_sip_add(int argc, char *argv[]);
+void an8855_sip_del(int argc, char *argv[]);
+void an8855_sip_clear(void);
+#endif
+
+/*stp*/
+void an8855_doStp(int argc, char *argv[]);
+
+/*mac table*/
+void an8855_table_dump(int argc, char *argv[]);
+void an8855_table_add(int argc, char *argv[]);
+void an8855_table_search_mac_vid(int argc, char *argv[]);
+void an8855_table_search_mac_fid(int argc, char *argv[]);
+void an8855_table_del_fid(int argc, char *argv[]);
+void an8855_table_del_vid(int argc, char *argv[]);
+void an8855_table_clear(int argc, char *argv[]);
+
+/*vlan table*/
+void an8855_vlan_dump(int argc, char *argv[]);
+void an8855_vlan_clear(int argc, char *argv[]);
+void an8855_vlan_set(int argc, char *argv[]);
+
+void an8855_doVlanSetPvid(int argc, char *argv[]);
+void an8855_doVlanSetVid(int argc, char *argv[]);
+void an8855_doVlanSetAccFrm(int argc, char *argv[]);
+void an8855_doVlanSetPortAttr(int argc, char *argv[]);
+void an8855_doVlanSetPortMode(int argc, char *argv[]);
+void an8855_doVlanSetEgressTagPCR(int argc, char *argv[]);
+void an8855_doVlanSetEgressTagPVC(int argc, char *argv[]);
+
+/*mirror function*/
+void an8855_set_mirror_to(int argc, char *argv[]);
+void an8855_set_mirror_from(int argc, char *argv[]);
+void an8855_doMirrorPortBased(int argc, char *argv[]);
+void an8855_doMirrorEn(int argc, char *argv[]);
+
+/*rate control*/
+void an8855_rate_control(int argc, char *argv[]);
+void an8855_ingress_rate_set(int argc, char *argv[]);
+void an8855_egress_rate_set(int argc, char *argv[]);
+
+/*QoS*/
+void an8855_qos_sch_select(int argc, char *argv[]);
+void an8855_qos_set_base(int argc, char *argv[]);
+void an8855_qos_wfq_set_weight(int argc, char *argv[]);
+void an8855_qos_set_portpri(int argc, char *argv[]);
+void an8855_qos_set_dscppri(int argc, char *argv[]);
+void an8855_qos_pri_mapping_queue(int argc, char *argv[]);
+
+/*flow control*/
+void an8855_global_set_mac_fc(int argc, char *argv[]);
+
+/*switch reset*/
+void an8855_switch_reset(int argc, char *argv[]);
+
+/* EEE(802.3az) function  */
+void an8855_eee_enable(int argc, char *argv[]);
+void an8855_eee_dump(int argc, char *argv[]);
+
+void an8855_read_mib_counters(int argc, char *argv[]);
+void an8855_clear_mib_counters(int argc, char *argv[]);
+void an8855_read_output_queue_counters(int argc, char *argv[]);
+void an8855_read_free_page_counters(int argc, char *argv[]);
+
+#endif