diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986-clkitg.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986-clkitg.dtsi
index dd04a54..6292778 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986-clkitg.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986-clkitg.dtsi
@@ -26,9 +26,9 @@
 			<&apmixedsys  CK_APMIXED_APLL2>,
 			<&infracfg CK_INFRA_CK_F26M>,
 			<&infracfg CK_INFRA_UART>,
-			<&infracfg CK_INFRA_ISPI0>,
+			<&clk40m>,
 			<&infracfg CK_INFRA_I2C>,
-			<&infracfg CK_INFRA_ISPI1>,
+			<&clk40m>,
 			<&infracfg CK_INFRA_PWM>,
 			<&infracfg CK_INFRA_66M_MCK>,
 			<&infracfg CK_INFRA_CK_F32K>,
@@ -48,8 +48,8 @@
 			<&infracfg CK_INFRA_MUX_UART2>,
 			<&infracfg CK_INFRA_NFI_CK>,
 			<&infracfg CK_INFRA_SPINFI_CK>,
-			<&infracfg CK_INFRA_MUX_SPI0>,
-			<&infracfg CK_INFRA_MUX_SPI1>,
+			<&clk40m>,
+			<&clk40m>,
 			<&infracfg CK_INFRA_RTC_32K>,
 			<&infracfg CK_INFRA_FMSDC_CK>,
 			<&infracfg CK_INFRA_FMSDC_HCK_CK>,
@@ -63,8 +63,8 @@
 			<&infracfg_ao CK_INFRA_UART0_SEL>,
 			<&infracfg_ao CK_INFRA_UART1_SEL>,	
 			<&infracfg_ao CK_INFRA_UART2_SEL>,
-			<&infracfg_ao CK_INFRA_SPI0_SEL>,
-			<&infracfg_ao CK_INFRA_SPI1_SEL>,
+			<&clk40m>,
+			<&clk40m>,
 			<&infracfg_ao CK_INFRA_PWM1_SEL>,
 			<&infracfg_ao CK_INFRA_PWM2_SEL>,
 			<&infracfg_ao CK_INFRA_PWM_BSEL>,
@@ -94,10 +94,10 @@
 			<&infracfg_ao CK_INFRA_NFI1_CK>,
 			<&infracfg_ao CK_INFRA_SPINFI1_CK>,
 			<&infracfg_ao CK_INFRA_NFI_HCK_CK>,
-			<&infracfg_ao CK_INFRA_SPI0_CK>,
-			<&infracfg_ao CK_INFRA_SPI1_CK>,
-			<&infracfg_ao CK_INFRA_SPI0_HCK_CK>,
-			<&infracfg_ao CK_INFRA_SPI1_HCK_CK>,
+			<&clk40m>,
+			<&clk40m>,
+			<&clk40m>,
+			<&clk40m>,
 			<&infracfg_ao CK_INFRA_FRTC_CK>,
 			<&infracfg_ao CK_INFRA_MSDC_CK>,
 			<&infracfg_ao CK_INFRA_MSDC_HCK_CK>,
@@ -115,7 +115,7 @@
 			<&clk40m>,
 			<&infracfg_ao CK_INFRA_TRNG_CK>,
 			<&topckgen CK_TOP_CB_M_416M>,
-			<&topckgen CK_TOP_CB_M_D2>,
+			<&clk40m>,
 			<&topckgen CK_TOP_CB_M_D4>,
 			<&topckgen CK_TOP_CB_M_D8>,
 			<&topckgen CK_TOP_M_D8_D2>,
@@ -170,8 +170,8 @@
 			<&topckgen CK_TOP_AP2CNN_HOST>,
 			<&topckgen CK_TOP_NFI1X_SEL>,
 			<&topckgen CK_TOP_SPINFI_SEL>,
-			<&topckgen CK_TOP_SPI_SEL>,
-			<&topckgen CK_TOP_SPIM_MST_SEL>,
+			<&clk40m>,
+			<&clk40m>,
 			<&topckgen CK_TOP_UART_SEL>,
 			<&topckgen CK_TOP_PWM_SEL>,
 			<&topckgen CK_TOP_I2C_SEL>,