| commit | 9c05d9aa1042b584b01dd6257b5c770a30dc0397 | [log] [tgz] |
|---|---|---|
| author | developer <developer@mediatek.com> | Tue Apr 30 10:32:41 2024 +0800 |
| committer | developer <developer@mediatek.com> | Tue May 07 17:52:17 2024 +0800 |
| tree | 1f421ebc8726368fcb080b4c6b1ee318810f9abc | |
| parent | cf0b04a88232c50245076190f94a85bdad00190b [diff] |
[][Critical][mt7988][SPI][Change SPI1 clk] [Description] Change SPI1 source clk. The clock structure of SPI1 is diffrent from SPI0/SPI2. Without this patch, you will not be able to use SPI1 normally. [Release-log] N/A Change-Id: I4ad5e1104b1b4f6e620f76e7c82f8f6c185e99c8 Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/9014489