diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index bd2268e..d35dddb 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -67,10 +67,12 @@
 };
 
 static const char * const mtk_clks_source_name[] = {
-	"ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", "fe", "trgpll",
+	"ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", "gp3",
+	"xgp1", "xgp2", "xgp3", "crypto", "fe", "trgpll",
 	"sgmii_tx250m", "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb",
 	"sgmii2_tx250m", "sgmii2_rx250m", "sgmii2_cdr_ref", "sgmii2_cdr_fb",
 	"sgmii_ck", "eth2pll", "wocpu0","wocpu1",
+	"usxgmii0_sel", "usxgmii1_sel", "sgm0_sel", "sgm1_sel",
 };
 
 void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg)
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index d1e1d65..1a11af6 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -980,6 +980,11 @@
 	MTK_CLK_GP0,
 	MTK_CLK_GP1,
 	MTK_CLK_GP2,
+	MTK_CLK_GP3,
+	MTK_CLK_XGP1,
+	MTK_CLK_XGP2,
+	MTK_CLK_XGP3,
+	MTK_CLK_CRYPTO,
 	MTK_CLK_FE,
 	MTK_CLK_TRGPLL,
 	MTK_CLK_SGMII_TX_250M,
@@ -994,6 +999,10 @@
 	MTK_CLK_ETH2PLL,
 	MTK_CLK_WOCPU0,
 	MTK_CLK_WOCPU1,
+	MTK_CLK_USXGMII0_SEL,
+	MTK_CLK_USXGMII1_SEL,
+	MTK_CLK_SGM0_SEL,
+	MTK_CLK_SGM1_SEL,
 	MTK_CLK_MAX
 };
 
@@ -1048,16 +1057,19 @@
                                  BIT(MTK_CLK_SGMII2_CDR_REF) | \
                                  BIT(MTK_CLK_SGMII2_CDR_FB))
 
-#define MT7988_CLKS_BITMAP	(BIT(MTK_CLK_FE) | BIT(MTK_CLK_GP2) | BIT(MTK_CLK_GP1) | \
-				 BIT(MTK_CLK_WOCPU1) | BIT(MTK_CLK_WOCPU0) | \
+#define MT7988_CLKS_BITMAP	(BIT(MTK_CLK_FE) | BIT(MTK_CLK_ESW) | \
+				 BIT(MTK_CLK_GP1) | BIT(MTK_CLK_GP2) | \
+				 BIT(MTK_CLK_GP3) | BIT(MTK_CLK_XGP1) | \
+				 BIT(MTK_CLK_XGP2) | BIT(MTK_CLK_XGP3) | \
+				 BIT(MTK_CLK_CRYPTO) | \
 				 BIT(MTK_CLK_SGMII_TX_250M) | \
 				 BIT(MTK_CLK_SGMII_RX_250M) | \
-				 BIT(MTK_CLK_SGMII_CDR_REF) | \
-				 BIT(MTK_CLK_SGMII_CDR_FB) | \
 				 BIT(MTK_CLK_SGMII2_TX_250M) | \
 				 BIT(MTK_CLK_SGMII2_RX_250M) | \
-				 BIT(MTK_CLK_SGMII2_CDR_REF) | \
-				 BIT(MTK_CLK_SGMII2_CDR_FB))
+				 BIT(MTK_CLK_USXGMII0_SEL) | \
+				 BIT(MTK_CLK_USXGMII1_SEL) | \
+				 BIT(MTK_CLK_SGM0_SEL) | \
+				 BIT(MTK_CLK_SGM1_SEL))
 
 enum mtk_dev_state {
 	MTK_HW_INIT,