[][Kernel][mt7988][eth][Enable dummy page and wdma rx drop]
[Description]
Add configurations for the below items:
- Enable dummy page mechanism to prevent PSE buffer empty
- Enable WDMA Rx ring full drop to prevent connsys tx bound
If without this patch, PSE might encounter some situations,
like PSE buffer empty or 10G_ETH-->2G_WIFI throughput drop.
[Release-log]
N/A
Change-Id: I8f9bdd9b7a723fa4ed2eafa42c0d2b6fe041c68d
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6621593
Build: srv_hbgsm110
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 7fe3713..37b6c68 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -3340,9 +3340,16 @@
MTK_FE_INT_RFIFO_OV | MTK_FE_INT_RFIFO_UF, MTK_FE_INT_ENABLE);
if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) {
+ /* PSE dummy page mechanism */
+ mtk_w32(eth, PSE_DUMMY_WORK_GDM(1) | PSE_DUMMY_WORK_GDM(2) |
+ PSE_DUMMY_WORK_GDM(3) | DUMMY_PAGE_THR, PSE_DUMY_REQ);
+
/* PSE should not drop port1, port8 and port9 packets */
mtk_w32(eth, 0x00000302, PSE_NO_DROP_CFG);
+ /* PSE should drop p8 and p9 packets when WDMA Rx ring full*/
+ mtk_w32(eth, 0x00000300, PSE_PPE0_DROP);
+
/* GDM and CDM Threshold */
mtk_w32(eth, 0x00000707, MTK_CDMW0_THRES);
mtk_w32(eth, 0x00000077, MTK_CDMW1_THRES);
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 6880c84..39543c7 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -146,6 +146,11 @@
#define PSE_NO_DROP_CFG 0x108
#define PSE_PPE0_DROP 0x110
+/* PSE Last FreeQ Page Request Control */
+#define PSE_DUMY_REQ 0x10C
+#define PSE_DUMMY_WORK_GDM(x) BIT(16 + (x))
+#define DUMMY_PAGE_THR 0x151
+
/* PSE Input Queue Reservation Register*/
#define PSE_IQ_REV(x) (0x140 + ((x - 1) * 0x4))