tree f43cc90c388d1b94d895501a70ea849c61108892
parent 53710e8cee002f924cbf7dbab2a241de552eff6c
author developer <developer@mediatek.com> 1620741471 +0800
committer developer <developer@mediatek.com> 1620871890 +0800

[][OpenWrt Dev][Force RX buffer DMA aligned]

[Description]
Fix buffer which isn't cache-line aligned

1. If upper filesystem passes buffer which is not cache-line
aligned, we allocate local buffer to catch data.
2. For data in length of more than 0x10000 bytes, we'll split
it into two packets. However, if the second packet isn't
dma-aligned, we'll encounter problems when transferring
the second packet. So we force both packets' buffer dma-aligned.

[Release-log]
N/A

Change-Id: I356a60ce2cd65796310052320ce0022506e723e0
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4531801