tree b98ae8a7426256a6c79bc8cfc5da4af2088af1aa
parent 691e73ff2765e8b90f4087a6a34efbe973d6f0e5
author developer <developer@mediatek.com> 1624947431 +0800
committer developer <developer@mediatek.com> 1625019846 +0800

[][update pcie clk]

[Description]
Add pcie pipe clk and point it parent to xtal

[Release-log]
N/A

Change-Id: I87defd2d5764b3c616aed21cecd28b4dbad3e82e
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4691294