BUILD: makefile: properly pass CC to sub-projects
The "poll" and "tcploop" sub-projects have their own makefiles. But
since the cmd_* commands were migrated from "echo" to $(info) with
make 3.81, the command is confusingly displayed in the top-level
makefile before entering the directory, even making one think that
the build occurred.
Let's instead propagate the verbosity level through the sub-projects
and let them adapt their own cmd_CC. For now this peans a little bit
of duplication for poll and tcploop.
diff --git a/dev/tcploop/Makefile b/dev/tcploop/Makefile
index 42a6259..fd80af9 100644
--- a/dev/tcploop/Makefile
+++ b/dev/tcploop/Makefile
@@ -4,8 +4,26 @@
INCLUDE =
OBJS = tcploop
+V = 0
+Q = @
+ifeq ($V,1)
+Q=
+endif
+
+ifeq ($V,1)
+cmd_CC = $(CC)
+else
+ifeq (3.81,$(firstword $(sort $(MAKE_VERSION) 3.81)))
+# 3.81 or above
+cmd_CC = $(info $ CC $@) $(Q)$(CC)
+else
+# 3.80 or older
+cmd_CC = $(Q)echo " CC $@";$(CC)
+endif
+endif
+
tcploop: tcploop.c
- $(CC) $(OPTIMIZE) $(DEFINE) $(INCLUDE) -o $@ $^
+ $(cmd_CC) $(OPTIMIZE) $(DEFINE) $(INCLUDE) -o $@ $^
clean:
rm -f $(OBJS) *.[oas] *~