tree 79b27cb5cfe197d9d71920f701c713cadf401f8f
parent 55a0975b1e957e9e23df8d9dd5400b40455c3fa9
author Willy Tarreau <w@1wt.eu> 1626353301 +0200
committer Willy Tarreau <w@1wt.eu> 1627832046 +0200
encoding latin1

MEDIUM: atomic: simplify the atomic load/store/exchange operations

The atomic_load/atomic_store/atomic_xchg operations were all forced to
__ATOMIC_SEQ_CST, which results in explicit store or even full barriers
even on x86-tso while we do not need them: we're not communicating with
external devices for example and are only interested in respecting the
proper ordering of loads and stores between each other.

These ones being rarely used, the emitted code on x86 remains almost the
same (barring a handful of locations). However they will allow to place
correct barriers at other places where atomics are accessed a bit lightly.

The patch is marked medium because we can never rule out the risk of some
bugs on more relaxed platforms due to the rest of the code.