tree 99a913ebc2af955bd58eb38c23b8296e052673f3
parent fa68d2641bda7ffd01b66e253a049fdee94e9ccd
author Willy Tarreau <w@1wt.eu> 1617711891 +0200
committer Willy Tarreau <w@1wt.eu> 1617814042 +0200
encoding latin1

MINOR: atomic: implement native BTS/BTR for x86

The current BTS/BTR operations on x86 are ugly because they rely on a
CAS, so they may be unfair and take time to converge. Fortunately,
where they are currently used (mostly FDs) the contention is expected
to be rare (mostly listeners). But this also limits their use to such
few low-load cases.

On x86 there is a set of BTS/BTR instructions which help for this,
but before the FD's state migrated to 32 bits there was little use of
them since they do not exist in 8 bits.

Now at least it makes sense to use them, at the very least in order
to significantly reduce the code size (one BTS instead of a CMPXCHG
loop). The implementation relies on modern gcc's ability to return
condition flags and limit code inflation and register spilling. The
fall back is retained on the old implementation for all other situations
(inappropriate target size or non-capable compiler). The code shrank
by 1.6 kB on the fast path.

As expected, for now on up to 4 threads there is no measurable difference
of performance.