tree 42d0a33ebbf8e8587497295a69e4e9c398c330a6
parent 661825922df5d18e692e3689973c79350c07fa8f
author Willy Tarreau <w@1wt.eu> 1638549522 +0100
committer Christopher Faulet <cfaulet@haproxy.com> 1639644683 +0100

IMPORT: slz: use the correct CRC32 instruction when running in 32-bit mode

Many ARMv8 processors also support Aarch32 and can run armv7 and even
thumb2 code. While armv8 compilers will not emit these instructions,
armv7 compilers that are aware of these processors will do. For
example, using gcc built for an armv7 target and passing it
"-mcpu=cortex-a72" or "-march=armv8-a+crc" will result in the CRC32
instruction to be used.

In this case the current assembly code fails because with the ARM and
Thumb2 instruction sets there is no such "%wX" half-registers. We need
to use "%X" instead as the native 32-bit register when running with a
32-bit instruction set, and use "%wX" when using the 64-bit instruction
set (A64).

This is slz upstream commit fab83248612a1e8ee942963fe916a9cdbf085097

(cherry picked from commit b154422db10bee52050668d7679c140ed27800cd)
Signed-off-by: Christopher Faulet <cfaulet@haproxy.com>
(cherry picked from commit fd0ad156fe206d963b3c48494d538f8a44880812)
Signed-off-by: Christopher Faulet <cfaulet@haproxy.com>