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git01.mediatek.com / filogic / uboot / feb29276cbc279c59645a709de69edf78390113b / arch / arm / dts / socfpga_cyclone5_vining_fpga.dts
  1. feaa3f9 dts: cadence_spi: Sync DT bindings with Linux by Jason Rush · Tue Jan 23 17:13:10 2018 -0600
  2. ba2ade9 arm: socfpga: Add samtec VIN|ING board by Marek Vasut · Tue Dec 01 18:09:52 2015 +0100