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git01.mediatek.com / filogic / uboot / feaa3f986f64ea6a4e9582b01ec7e5632ecc3b23 / arch / arm / dts / socfpga_cyclone5_sr1500.dts
  1. feaa3f9 dts: cadence_spi: Sync DT bindings with Linux by Jason Rush · 7 years ago
  2. 72887e3 arm: socfpga: Fix typos in DT files (environmnet -> environment) by Stefan Roese · 9 years ago
  3. 85e8439 arm: socfpga: sr1500: Misc updates (SPI speed, env location) by Stefan Roese · 9 years ago
  4. bf5ed2e arm: socfpga: Add SoCFPGA SR1500 board by Stefan Roese · 9 years ago