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git01.mediatek.com / filogic / uboot / fe3a1d65b98c1de28b81743f74cd808e5c5da1ac / cpu / mpc85xx
  1. bb8aea7 Add secondary CPUs processor frequency for e500 core by Haiying Wang · 16 years ago
  2. 64bb6d1 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards by Kumar Gala · 16 years ago
  3. 3fe8087 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards by Kumar Gala · 16 years ago
  4. 8a353d5 Change DDR tlb start entry to CONFIG param for 85xx by Haiying Wang · 16 years ago
  5. 0b691fc mpc8[56]xx: Put localbus clock in sysinfo and gd by Trent Piepho · 16 years ago
  6. a8665ac mpc8568: Double local bus clock divider by Trent Piepho · 16 years ago
  7. 68aec14 85xx: Fix the boot window issue by Dave Liu · 16 years ago
  8. f474551 Set IVPR to kenrel entry point in second core boot page by Haiying Wang · 16 years ago
  9. 1b560ac mpc8xxx: LCRR[CLKDIV] is sometimes five bits by Trent Piepho · 16 years ago
  10. bc424c9 mpc8[56]xx: Put localbus clock in device tree by Trent Piepho · 16 years ago
  11. 9ac287a 85xx: Add support to populate addr map based on TLB settings by Kumar Gala · 16 years ago
  12. 6294850 Update U-Boot's build timestamp on every compile by Peter Tyser · 16 years ago
  13. 629022d 85xx: init gd as early as possible by Kumar Gala · 16 years ago
  14. 7902209 85xx: Fix relocation of CCSRBAR by Kumar Gala · 16 years ago
  15. af7c3e3 85xx: Add PORDEVSR_PCI1 define by Peter Tyser · 16 years ago
  16. 30103c6 85xx: Add CPU 2 errata workaround to all 8548 boards by Peter Tyser · 16 years ago
  17. 6773169 Moved initialization of QE Ethernet controller to cpu_eth_init() by Ben Warren · 16 years ago
  18. 70618a3 Moved initialization of FCC Ethernet controller to cpu_eth_init by Ben Warren · 16 years ago
  19. c4cc8f2 Fix typo in cpu/mpc85xx/cpu.c by Ben Warren · 16 years ago
  20. 7dc79f7 85xx: Fix the incorrect register used for DDR erratum1 by Dave Liu · 16 years ago
  21. 9f4a689 85xx: Add basic e500mc core support by Kumar Gala · 16 years ago
  22. 5c953ca 85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number by Kumar Gala · 16 years ago
  23. 2059104 Use strmhz() to format clock frequencies by Wolfgang Denk · 16 years ago
  24. 4216d75 Merge 'next' branch by Wolfgang Denk · 16 years ago
  25. 2915512 85xx if NUM_CPUS>1, print cpu number by Ed Swarthout · 16 years ago
  26. e336605 Have u-boot pass stashing parameters into device tree by Andy Fleming · 16 years ago
  27. 32090b3 85xx: Export invalidate_{i,d}cache and add flush_dcache by Kumar Gala · 16 years ago
  28. 0383694 rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · 16 years ago
  29. 9632f66 Revert "85xx: Using proper I2C source clock divider for MPC8544" by Kumar Gala · 16 years ago
  30. 7ac0ff4 85xx: Using proper I2C source clock divider for MPC8544 by Wolfgang Grandegger · 16 years ago
  31. bfcd6c3 Fix the incorrect DDR clk freq reporting on 8536DS by Jason Jin · 16 years ago
  32. 64df226 85xx: Remove setting of *cache-line-size in device trees by Kumar Gala · 16 years ago
  33. 7ddfafc Fix printf errors under -DDEBUG by Andrew Klossner · 16 years ago
  34. b937cc5 85xx: Ensure timebase is zero on secondary cores by Kumar Gala · 16 years ago
  35. 5424501 Removed hardcoded MxMR loop value from upmconfig() for MPC85xx. by Sergei Poselenov · 16 years ago
  36. fecff2b Pass in tsec_info struct through tsec_initialize by Andy Fleming · 16 years ago
  37. 4f6280e mpc85xx: remove redudant code with lib_ppc/interrupts.c by Kumar Gala · 16 years ago
  38. cd77728 mpc85xx: Add support for the MPC8536 by Kumar Gala · 16 years ago
  39. 3ab0b2d mpc85xx: Add support for the MPC8572DS reference board by Kumar Gala · 16 years ago
  40. ab73a24 FSL DDR: Remove old SPD support from cpu/mpc85xx by Kumar Gala · 16 years ago
  41. d5a1fb9 FSL DDR: Add 85xx specific register setting by Kumar Gala · 16 years ago
  42. 80f4bc7 FSL DDR: Add e500 TLB helper for DDR code by Kumar Gala · 16 years ago
  43. 124b082 FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago
  44. fabda92 fdt: rework fdt_fixup_ethernet() to use env instead of bd_t by Kumar Gala · 16 years ago
  45. ccdeac7 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUS by Kumar Gala · 16 years ago
  46. 5e0933b Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx by Wolfgang Denk · 16 years ago
  47. 2011997 85xx: Cleanup L2 cache size detection by Kumar Gala · 16 years ago
  48. 276a646 8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreq by Paul Gortmaker · 16 years ago
  49. 0470c52 Change the temp map to ROM to align addresses to page size. by Andrew Klossner · 16 years ago
  50. b4a016e mpc85xx: use IS_E_PROCESSOR macro by Kim Phillips · 16 years ago
  51. 868e346 fdt: add crypto node handling for MPC8{3, 5}xxE processors by Kim Phillips · 16 years ago
  52. 275f4c1 Fix some more printf() format problems. by Kumar Gala · 16 years ago
  53. e4ad454 Fix printf errors. by Andrew Klossner · 16 years ago
  54. e73dabc Merge branch 'master' of git://www.denx.de/git/u-boot-net by Wolfgang Denk · 16 years ago
  55. d448a49 Add mechanisms for CPU and board-specific Ethernet initialization by Ben Warren · 16 years ago
  56. 41df50a Coding Style Cleanup by Wolfgang Denk · 16 years ago
  57. a9e1828 Fix 4xx build issue by Anatolij Gustschin · 16 years ago
  58. 994fdba 85xx/86xx: Move to dynamic mgmt of LAWs by Kumar Gala · 16 years ago
  59. 75639e0 FSL LAW: Keep track of LAW allocations by Kumar Gala · 16 years ago
  60. ddc1a47 Added the upmconfig() function for 85xx. by Sergei Poselenov · 16 years ago
  61. 09cb120 MPC85xx: Beautify boot output of L2 cache configuration by Wolfgang Grandegger · 16 years ago
  62. ec68f93 85xx: Add setting of cache props in the device tree. by Kumar Gala · 17 years ago
  63. 8ddf00c 85xx: expose cpu identification by Kumar Gala · 16 years ago
  64. 54b6810 85xx: Only use PORPLLSR[DDR_Ratio] on platforms that define it by Kumar Gala · 17 years ago
  65. 306b4e8 MPC85xx: Change traps.c to not reference non-addressable memory by Becky Bruce · 17 years ago
  66. ff10bf7 Merge branch 'socrates' of /home/wd/git/u-boot/projects by Wolfgang Denk · 17 years ago
  67. a1be476 Big white-space cleanup. by Wolfgang Denk · 17 years ago
  68. 2514742 Fixed reset for socrates by Sergei Poselenov · 17 years ago
  69. 9f84304 85xx: Add -mno-spe to e500/85xx builds by Kumar Gala · 17 years ago
  70. 3af779b 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docs by Kumar Gala · 17 years ago
  71. 398dcd6 85xx: Additional fixes and cleanup of MP code by Kumar Gala · 17 years ago
  72. 93d5ffb 85xx: Round up frequency calculations to get reasonable output by Kumar Gala · 17 years ago
  73. d74b170 85xx: Fix size of cpu-release-addr property by Kumar Gala · 17 years ago
  74. 44befe0 Fix calculation of I2C clock for some 85xx chips by Timur Tabi · 17 years ago
  75. 615f14d 85xx: Fix detection of MP cpu spin up by Kumar Gala · 17 years ago
  76. 1f109fd 85xx: Use SVR_SOC_VER instead of SVR_VER by Kumar Gala · 17 years ago
  77. 5769ded 85xx: Add cpu_mp_lmb_reserve helper to reserve boot page by Kumar Gala · 17 years ago
  78. deeac57 85xx: Update multicore boot mechanism to ePAPR v0.81 spec by Kumar Gala · 17 years ago
  79. 8aea089 85xx: Fix merge duplication by Kumar Gala · 17 years ago
  80. d1d51ad 85xx: Speed up get_ddr_freq() and get_bus_freq() by James Yang · 17 years ago
  81. 5dab484 85xx: Show DDR memory data rate in addition to the memory clock frequency. by James Yang · 17 years ago
  82. 957b191 85xx: get_tbclk() speed up and rounding fix by James Yang · 17 years ago
  83. f574097 Update SVR numbers to expand support by Andy Fleming · 17 years ago
  84. 05260f8 85xx: Added support for multicore boot mechanism by Kumar Gala · 17 years ago
  85. 36d6b3f 85xx: Added support for multicore boot mechanism by Kumar Gala · 17 years ago
  86. d33a55f 85xx: Add the concept of CFG_CCSRBAR_PHYS by Kumar Gala · 17 years ago
  87. 2a44121 85xx: Don't icbi when unlocking the cache by Kumar Gala · 17 years ago
  88. 9ae360f Fix source for ECM error IVPR by Andy Fleming · 17 years ago
  89. 5ba61fe Invalidate INIT_RAM TLB mappings by Andy Fleming · 17 years ago
  90. c1499f48 85xx, 86xx: Determine I2C clock frequencies and store in global_data by Timur Tabi · 17 years ago
  91. 69c0964 PPC: Use r2 instead of r29 as global data pointer by Wolfgang Denk · 17 years ago
  92. 86a28e9 ppc: Refactor cache routines, so there is only one common set. by Rafal Jaworowski · 17 years ago
  93. 1f16448 QE: Move FDT support into a common file by Kumar Gala · 17 years ago
  94. 3595e61 Coding Style Cleanup; update CHANGELOG by Wolfgang Denk · 17 years ago
  95. d7ea3e3 85xx: Get ride of old TLB setup code by Kumar Gala · 17 years ago
  96. 9772ee7 85xx: Reworked initial processor init by Kumar Gala · 17 years ago
  97. 95bb67f 85xx: Introduce new tlb API by Kumar Gala · 17 years ago
  98. df359c5 85xx: Remove old style of LAW init by Kumar Gala · 17 years ago
  99. 95fd2f6 85xx: Move LAW init code into C by Kumar Gala · 17 years ago
  100. b434468 Add QE brg freq and correct qe bus freq fdt update code by Kim Phillips · 17 years ago