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git01.mediatek.com / filogic / uboot / fe0a3a4d831c6b2f45e5ef0547a36a2d25a78199 / drivers / clk / clk_fixed_factor.c
  1. 6d70ba0 treewide: Try to avoid the preprocessor with OF_REAL by Simon Glass · Sat Aug 07 07:24:06 2021 -0600
  2. 9288265 treewide: Use OF_REAL instead of !OF_PLATDATA by Simon Glass · Sat Aug 07 07:24:04 2021 -0600
  3. aad29ae dm: treewide: Rename ofdata_to_platdata() to of_to_plat() by Simon Glass · Thu Dec 03 16:55:21 2020 -0700
  4. fa20e93 dm: treewide: Rename dev_get_platdata() to dev_get_plat() by Simon Glass · Thu Dec 03 16:55:20 2020 -0700
  5. 71fa5b4 dm: treewide: Rename 'platdata' variables to just 'plat' by Simon Glass · Thu Dec 03 16:55:18 2020 -0700
  6. 8a2b47f dm: treewide: Rename auto_alloc_size members to be shorter by Simon Glass · Thu Dec 03 16:55:17 2020 -0700
  7. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  8. 0e845c8 clk: Remove clock ID check in .get_rate() of clk_fixed_* by Lukasz Majewski · Mon Jun 24 15:50:37 2019 +0200
  9. 8d28c3c clk: Add fixed-factor clock driver by Anup Patel · Mon Feb 25 08:14:55 2019 +0000