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git01.mediatek.com / filogic / uboot / fd1dd482732e2980bf054df5897e70a2b0a08b6b / drivers / clk / clk-divider.c
  1. d66c5f7 dm: core: Require users of devres to include the header by Simon Glass · Mon Feb 03 07:36:15 2020 -0700
  2. fd67c63 clk: divider set rate supporrt by Peng Fan · Wed Jul 31 07:01:37 2019 +0000
  3. 5106fbb clk: use clk_dev_binded by Peng Fan · Wed Jul 31 07:01:26 2019 +0000
  4. bb18f1b clk: sandbox: Adjust clk-divider to emulate reading its value from HW by Lukasz Majewski · Mon Jun 24 15:50:48 2019 +0200
  5. 4de44bb clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12) by Lukasz Majewski · Mon Jun 24 15:50:45 2019 +0200