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git01.mediatek.com
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filogic
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uboot
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faa88216cdc813ae4191222eafc40ac88398173f
/
arch
/
x86
/
cpu
/
ivybridge
/
cpu.c
10e4779
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· Sun May 06 17:58:06 2018 -0400
ee7c36f
board_f: x86: Use checkcpu() for CPU init
by Simon Glass
· Tue Mar 28 10:27:30 2017 -0600
e536796
x86: ivybridge: Add more debugging for failures
by Simon Glass
· Mon Jan 16 07:03:38 2017 -0700
f7f5674
x86: Add debugging when cpu_common_init() fails
by Simon Glass
· Mon Jul 25 18:58:59 2016 -0600
9c852d7
x86: Move common PCH code into a common place
by Simon Glass
· Wed Mar 16 07:44:36 2016 -0600
780ba48
x86: Move common CPU code to its own place
by Simon Glass
· Fri Mar 11 22:06:58 2016 -0700
5535730
x86: Create a common header for Intel register access
by Simon Glass
· Fri Mar 11 22:06:55 2016 -0700
2df6188
x86: Move microcode code to a common location
by Simon Glass
· Fri Mar 11 22:06:54 2016 -0700
c7298e7
dm: Use uclass_first_device_err() where it is useful
by Simon Glass
· Thu Feb 11 13:23:26 2016 -0700
18df7d0
x86: ivybridge: Convert enable_usb_bar() to use DM PCI API
by Simon Glass
· Sun Jan 17 16:11:46 2016 -0700
9afcd96
x86: ivybridge: Use the I2C driver to perform SMbus init
by Simon Glass
· Sun Jan 17 16:11:45 2016 -0700
5cc400b
x86: ivybridge: Do the SATA init before relocation
by Simon Glass
· Sun Jan 17 16:11:35 2016 -0700
25d1f94
x86: ivybridge: Move GPIO init to the LPC init() method
by Simon Glass
· Sun Jan 17 16:11:22 2016 -0700
d4d1e91
x86: ivybridge: Move graphics init much later
by Simon Glass
· Sun Jan 17 16:11:20 2016 -0700
b20cf04
x86: ivybridge: Probe the LPC in CPU init
by Simon Glass
· Sun Jan 17 16:11:19 2016 -0700
aa0f23e
x86: ivybridge: Move northbridge init into the probe() method
by Simon Glass
· Sun Jan 17 16:11:16 2016 -0700
a7b1d95
x86: ivybridge: Rename bd82x6x_init()
by Simon Glass
· Sun Jan 17 16:11:13 2016 -0700
8acbabb
x86: ivybridge: Move more init to the probe() function
by Simon Glass
· Sun Jan 17 16:11:12 2016 -0700
62b3717
x86: ivybridge: Move lpc_early_init() to probe()
by Simon Glass
· Sun Jan 17 16:11:11 2016 -0700
044f1a0
x86: ivybridge: Set up the LPC device using driver model
by Simon Glass
· Sun Jan 17 16:11:10 2016 -0700
a986c3a
x86: Remove HAVE_ACPI_RESUME
by Bin Meng
· Wed Nov 25 17:46:09 2015 -0800
38de020
x86: Convert to use driver model timer
by Bin Meng
· Fri Nov 13 00:11:22 2015 -0800
f2dd470
x86: chromebook_link: Enable the debug UART
by Simon Glass
· Sun Oct 18 19:51:27 2015 -0600
1375e9a
x86: ivybridge: Use reset_cpu()
by Simon Glass
· Tue Apr 28 20:11:30 2015 -0600
06e694f
x86: chromebook_link: dts: Add PCH and LPC devices
by Simon Glass
· Thu Mar 26 09:29:29 2015 -0600
e0e7b36
dm: x86: pci: Convert chromebook_link to use driver model for pci
by Simon Glass
· Thu Mar 05 12:25:33 2015 -0700
7567f46
x86: Split up arch_cpu_init()
by Simon Glass
· Thu Mar 05 12:25:17 2015 -0700
240d06d
x86: Add a x86_ prefix to the x86-specific PCI functions
by Simon Glass
· Thu Mar 05 12:25:15 2015 -0700
9281eb5
x86: ivybridge: Update microcode early in boot
by Simon Glass
· Thu Jan 01 16:18:14 2015 -0700
666534f
x86: ivybridge: Drop support for ROM caching
by Simon Glass
· Thu Jan 01 16:18:06 2015 -0700
642d248
x86: Add post failure codes for bist and car
by Bin Meng
· Fri Dec 12 21:05:30 2014 +0800
d22f5c9
x86: ivybridge: Add LAPIC support
by Simon Glass
· Wed Nov 12 22:42:27 2014 -0700
30580fc
x86: ivybridge: Add early init for PCH devices
by Simon Glass
· Wed Nov 12 22:42:23 2014 -0700
f79d538
x86: ivybridge: Perform Intel microcode update on boot
by Simon Glass
· Wed Nov 12 22:42:21 2014 -0700
367077a
x86: ivybridge: Check BIST value on boot
by Simon Glass
· Wed Nov 12 22:42:20 2014 -0700
f226c41
x86: ivybridge: Perform initial CPU setup
by Simon Glass
· Wed Nov 12 22:42:19 2014 -0700
dcfac35
x86: ivybridge: Add early LPC init so that serial works
by Simon Glass
· Wed Nov 12 22:42:15 2014 -0700
3274ae0
x86: ivybridge: Enable PCI in early init
by Simon Glass
· Wed Nov 12 22:42:13 2014 -0700
98f139b
x86: chromebook_link: Implement CAR support (cache as RAM)
by Simon Glass
· Wed Nov 12 22:42:10 2014 -0700
0b36ecd
x86: Add chromebook_link board
by Simon Glass
· Wed Nov 12 22:42:07 2014 -0700