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git01.mediatek.com / filogic / uboot / f9e50cb63d8bfb4cf897ee3b565e12f42b728e75 / arch / arm / dts / rk3288-veyron.dtsi
  1. 344e608 rockchip: rockchip, sdram-channel 0xff fix remaining dts by Sandy Patterson · Thu Jul 28 09:49:01 2016 -0400
  2. 94906e4 rockchip: spl: Support full-speed CPU in SPL by Simon Glass · Thu Jan 21 19:45:17 2016 -0700
  3. 9a13c55 rockchip: jerry: Fix the SDRAM timing by Simon Glass · Thu Jan 21 19:45:14 2016 -0700
  4. 930ec98 rockchip: jerry: Disable pmic-int-1 setup to avoid a hang by Simon Glass · Thu Jan 21 19:43:37 2016 -0700
  5. af0b744 rockchip: Use pwrseq for MMC start-up on jerry by Simon Glass · Thu Jan 21 19:43:36 2016 -0700
  6. 9d5d1cc rockchip: Add basic support for jerry by Simon Glass · Sun Aug 30 16:55:42 2015 -0600