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git01.mediatek.com / filogic / uboot / f9910fb0f1f0597c2b20e3da42696ae3d28c5fdd / drivers / clk / sunxi / clk_a31.c
  1. 4dcacfc common: Drop linux/bitops.h from common header by Simon Glass · Sun May 10 11:40:13 2020 -0600
  2. 836631b clk: sunxi: Implement EMAC, GMAC clocks, resets by Jagan Teki · Thu Feb 28 00:26:57 2019 +0530
  3. bc12313 clk: sunxi: Implement SPI clocks, resets by Jagan Teki · Wed Feb 27 20:02:06 2019 +0530
  4. ddf33c1 sunxi: clk: add MMC gates/resets by Andre Przywara · Tue Jan 29 15:54:09 2019 +0000
  5. b490aa5 clk: sunxi: Implement UART resets by Jagan Teki · Sun Dec 30 21:37:31 2018 +0530
  6. 8cf08ea clk: sunxi: Implement UART clocks by Jagan Teki · Sun Dec 30 21:29:24 2018 +0530
  7. 438e8f6 clk: sunxi: Add Allwinner A31 CLK driver by Jagan Teki · Thu Aug 02 23:15:34 2018 +0530