1. 78eaa49 armv8: New MMU setup code allowing to use 48+ bits PA/VA by Sergey Temerkhanov · Wed Oct 14 09:55:45 2015 -0700
  2. e28e18c armv8/layerscape: Update MMU table with execute-never bits by Alison Wang · Thu Nov 05 11:15:49 2015 +0800
  3. 7333c6a armv8: allow custom MMU setup routines on ARMv8 by Stephen Warren · Mon Oct 05 12:09:00 2015 -0600
  4. a3e45ab armv8/mmu: Set bits marked RES1 in TCR by Thierry Reding · Thu Aug 20 11:52:14 2015 +0200
  5. 7f8e178 armv8: fsl-lsch3: Rewrite MMU translation table entries by Alison Wang · Tue Aug 18 11:22:05 2015 +0800
  6. 2219026 ARM: cache: implement a default weak flush_cache() function by Wu, Josh · Mon Jul 27 11:40:17 2015 +0800
  7. aaa3545 ARM: cache: add an empty stub function for invalidate/flush dcache by Wu, Josh · Mon Jul 27 11:40:16 2015 +0800
  8. ba2432a armv8: caches: Added routine to set non cacheable region by Siva Durga Prasad Paladugu · Fri Jun 26 18:05:07 2015 +0530
  9. 59c364d armv8/cache: Fix page table creation by Thierry Reding · Wed Jul 22 17:10:11 2015 -0600
  10. 1ce575f armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack by York Sun · Tue Jan 06 13:18:42 2015 -0800
  11. a84cd72 ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC by York Sun · Mon Jun 23 15:15:54 2014 -0700
  12. ef63194 ARMv8: Adjust MMU setup by York Sun · Mon Jun 23 15:15:53 2014 -0700
  13. ef04201 armv8/cache: Change cache invalidate and flush function by York Sun · Wed Feb 26 13:26:04 2014 -0800
  14. 897947c armv8/cache: Consolidate setting for MAIR and TCR by York Sun · Wed Feb 26 13:26:02 2014 -0800
  15. 85fd5f1 arm64: core support by David Feng · Sat Dec 14 11:47:35 2013 +0800