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git01.mediatek.com / filogic / uboot / f94277d5ac6100f7e472fa01d4dc46c97bba6189 / drivers / crypto / fsl / jr.h
  1. d218033 drivers/crypto/fsl : Allocate output ring with size aligned to CACHELNE SIZE by Ruchika Gupta · Fri Jan 22 16:12:55 2016 +0530
  2. 4342182 crypto/fsl: SEC driver cleanup for 64 bit and endianness by Aneesh Bansal · Thu Oct 29 22:58:03 2015 +0530
  3. 66e26aa drivers/crypto/fsl: fix snooping for write transactions by horia.geanta@freescale.com · Wed Jul 08 17:24:57 2015 +0300
  4. ac1b269 fsl_sec: Add hardware accelerated SHA256 and SHA1 by Ruchika Gupta · Wed Oct 15 11:35:30 2014 +0530