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git01.mediatek.com / filogic / uboot / f6f0c09ee7dd6d07f8ab57467acb33b87e6a1a0f / include / versalpl.h
  1. dae95a4 fpga: xilinx: add bitstream flags to driver desc by Oleksandr Suvorov · Fri Jul 22 17:16:04 2022 +0300
  2. b739897 arm64: versal: fpga: Add PL bit stream load support by Siva Durga Prasad Paladugu · Mon Aug 05 15:54:59 2019 +0530